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/* Copyright (c) 2010 Atmel Corporation
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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* Neither the name of the copyright holders nor the names of
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE. */
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/* avr/iotn20.h - definitions for ATtiny20 */
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/* This file should only be included from <avr/io.h>, never directly. */
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# error "Include <avr/io.h> instead of this file."
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# define _AVR_IOXXX_H_ "iotn20.h"
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# error "Attempt to include more than one <avr/ioXXX.h> file."
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#ifndef _AVR_ATtiny20_H_
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#define _AVR_ATtiny20_H_ 1
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/* Registers and associated bit numbers. */
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#define PINA _SFR_IO8(0x00)
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#define DDRA _SFR_IO8(0x01)
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#define PORTA _SFR_IO8(0x02)
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#define PUEA _SFR_IO8(0x03)
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#define PINB _SFR_IO8(0x04)
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#define DDRB _SFR_IO8(0x05)
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#define PORTB _SFR_IO8(0x06)
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#define PUEB _SFR_IO8(0x07)
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#define PORTCR _SFR_IO8(0x08)
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#define PCMSK0 _SFR_IO8(0x09)
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#define PCMSK1 _SFR_IO8(0x0A)
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#define GIFR _SFR_IO8(0x0B)
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#define GIMSK _SFR_IO8(0x0C)
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#define DIDR0 _SFR_IO8(0x0D)
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#ifndef __ASSEMBLER__
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#define ADC _SFR_IO16(0x0E)
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#define ADCW _SFR_IO16(0x0E)
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#define ADCL _SFR_IO8(0x0E)
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#define ADCH _SFR_IO8(0x0F)
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#define ADMUX _SFR_IO8(0x10)
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#define ADCSRB _SFR_IO8(0x11)
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#define ADCSRA _SFR_IO8(0x12)
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#define ACSRB _SFR_IO8(0x13)
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#define ACSRA _SFR_IO8(0x14)
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#define OCR0B _SFR_IO8(0x15)
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#define OCR0A _SFR_IO8(0x16)
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#define TCNT0 _SFR_IO8(0x17)
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#define TCCR0B _SFR_IO8(0x18)
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#define TCCR0A _SFR_IO8(0x19)
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#define ICR1 _SFR_IO16(0x1A)
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#define ICR1L _SFR_IO8(0x1A)
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#define ICR1H _SFR_IO8(0x1B)
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#define OCR1B _SFR_IO16(0x1C)
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#define OCR1BL _SFR_IO8(0x1C)
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#define OCR1BH _SFR_IO8(0x1D)
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#define OCR1A _SFR_IO16(0x1E)
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#define OCR1AL _SFR_IO8(0x1E)
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#define OCR1AH _SFR_IO8(0x1F)
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#define TCNT1 _SFR_IO16(0x20)
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#define TCNT1L _SFR_IO8(0x20)
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#define TCNT1H _SFR_IO8(0x21)
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#define TCCR1C _SFR_IO8(0x22)
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#define TCCR1B _SFR_IO8(0x23)
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#define TCCR1A _SFR_IO8(0x24)
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#define TIFR _SFR_IO8(0x25)
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#define TIMSK _SFR_IO8(0x26)
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#define GTCCR _SFR_IO8(0x27)
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#define TWSD _SFR_IO8(0x28)
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#define TWSAM _SFR_IO8(0x29)
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#define TWSA _SFR_IO8(0x2A)
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#define TWSSRA _SFR_IO8(0x2B)
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#define TWSCRB _SFR_IO8(0x2C)
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#define TWSCRA _SFR_IO8(0x2D)
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#define SPDR _SFR_IO8(0x2E)
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#define SPSR _SFR_IO8(0x2F)
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#define SPCR _SFR_IO8(0x30)
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#define WDTCSR _SFR_IO8(0x31)
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#define NVMCSR _SFR_IO8(0x32)
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#define NVMCMD _SFR_IO8(0x33)
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#define QTCSR _SFR_IO8(0x34)
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#define PRR _SFR_IO8(0x35)
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#define CLKPSR _SFR_IO8(0x36)
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#define CLKMSR _SFR_IO8(0x37)
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#define OSCCAL _SFR_IO8(0x39)
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#define MCUCR _SFR_IO8(0x3A)
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#define RSTFLR _SFR_IO8(0x3B)
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#define CCP _SFR_IO8(0x3C)
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/* Interrupt vectors */
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/* Vector 0 is the reset vector */
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#define INT0_vect_num 1
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#define INT0_vect _VECTOR(1) /* External Interrupt Request 0 */
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#define PCINT0_vect_num 2
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#define PCINT0_vect _VECTOR(2) /* Pin Change Interrupt Request 0 */
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#define PCINT1_vect_num 3
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#define PCINT1_vect _VECTOR(3) /* Pin Change Interrupt Request 1 */
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#define WDT_vect_num 4
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#define WDT_vect _VECTOR(4) /* Watchdog Time-out */
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#define TIM1_CAPT_vect_num 5
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#define TIM1_CAPT_vect _VECTOR(5) /* Timer/Counter1 Input Capture */
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#define TIM1_COMPA_vect_num 6
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#define TIM1_COMPA_vect _VECTOR(6) /* Timer/Counter1 Compare Match A */
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#define TIM1_COMPB_vect_num 7
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#define TIM1_COMPB_vect _VECTOR(7) /* Timer/Counter1 Compare Match B */
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#define TIM1_OVF_vect_num 8
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#define TIM1_OVF_vect _VECTOR(8) /* Timer/Counter1 Overflow */
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#define TIM0_COMPA_vect_num 9
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#define TIM0_COMPA_vect _VECTOR(9) /* Timer/Counter0 Compare Match A */
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#define TIM0_COMPB_vect_num 10
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#define TIM0_COMPB_vect _VECTOR(10) /* Timer/Counter0 Compare Match B */
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#define TIM0_OVF_vect_num 11
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#define TIM0_OVF_vect _VECTOR(11) /* Timer/Counter0 Overflow */
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#define ANA_COMP_vect_num 12
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#define ANA_COMP_vect _VECTOR(12) /* Analog Comparator */
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#define ADC_ADC_vect_num 13
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#define ADC_ADC_vect _VECTOR(13) /* Conversion Complete */
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#define TWI_SLAVE_vect_num 14
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#define TWI_SLAVE_vect _VECTOR(14) /* Two-Wire Interface */
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#define SPI_vect_num 15
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#define SPI_vect _VECTOR(15) /* Serial Peripheral Interface */
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#define QTRIP_vect_num 16
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#define QTRIP_vect _VECTOR(16) /* Touch Sensing */
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#define _VECTOR_SIZE 2 /* Size of individual vector. */
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#define _VECTORS_SIZE (17 * _VECTOR_SIZE)
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#define SPM_PAGESIZE (64)
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#define RAMSTART (0x40)
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#define RAMSIZE (128)
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#define RAMEND (RAMSTART + RAMSIZE - 1)
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#define XRAMSTART (NA)
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#define XRAMEND (RAMEND)
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#define E2PAGESIZE (0)
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#define FLASHEND (0x7FF)
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#define FUSE_MEMORY_SIZE 0
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#define __LOCK_BITS_EXIST
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#define SIGNATURE_0 0x1E
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#define SIGNATURE_1 0x91
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#define SIGNATURE_2 0x0F
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/* Device Pin Definitions */
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#define ADC4_DDR DDRCINT
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#define ADC4_PORT PORTCINT
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#define ADC4_PIN PINCINT
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#define ADC4_BIT INT4
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#define ADC3_DDR DDRCINT
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#define ADC3_PORT PORTCINT
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#define ADC3_PIN PINCINT
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#define ADC3_BIT INT3
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#define AIN1_DDR DDRCINT
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#define AIN1_PORT PORTCINT
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#define AIN1_PIN PINCINT
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#define AIN1_BIT INT2
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#define ADC2_DDR DDRCINT
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#define ADC2_PORT PORTCINT
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#define ADC2_PIN PINCINT
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#define ADC2_BIT INT2
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#define AIN0_DDR DDRCINT
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#define AIN0_PORT PORTCINT
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#define AIN0_PIN PINCINT
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#define AIN0_BIT INT1
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#define ADC1_DDR DDRCINT
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#define ADC1_PORT PORTCINT
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#define ADC1_PIN PINCINT
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#define ADC1_BIT INT1
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#define ADC0_DDR DDRCINT
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#define ADC0_PORT PORTCINT
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#define ADC0_PIN PINCINT
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#define ADC0_BIT INT0
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#define T0_DDR DDRCLKI
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#define T0_PORT PORTCLKI
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#define T0_PIN PINCLKI
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#define TPICLK_DDR DDRCLKI
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#define TPICLK_PORT PORTCLKI
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#define TPICLK_PIN PINCLKI
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#define TPICLK_BIT CLKI
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#define PCINT8_DDR DDRCLKI
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#define PCINT8_PORT PORTCLKI
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#define PCINT8_PIN PINCLKI
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#define PCINT8_BIT CLKI
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#define SDA_DDR DDROC1A
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#define SDA_PORT PORTOC1A
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#define SDA_PIN PINOC1A
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#define MOSI_DDR DDROC1A
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#define MOSI_PORT PORTOC1A
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#define MOSI_PIN PINOC1A
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#define MOSI_BIT OC1A
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#define TPIDATA_DDR DDROC1A
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#define TPIDATA_PORT PORTOC1A
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#define TPIDATA_PIN PINOC1A
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#define TPIDATA_BIT OC1A
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#define PCINT9_DDR DDROC1A
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#define PCINT9_PORT PORTOC1A
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#define PCINT9_PIN PINOC1A
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#define PCINT9_BIT OC1A
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#define PCINT11_DDR DDRRESET
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#define PCINT11_PORT PORTRESET
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#define PCINT11_PIN PINRESET
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#define PCINT11_BIT RESET
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#define OC0A_DDR DDRCKOUT
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#define OC0A_PORT PORTCKOUT
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#define OC0A_PIN PINCKOUT
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#define OC0A_BIT CKOUT
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#define OC1B_DDR DDRCKOUT
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#define OC1B_PORT PORTCKOUT
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#define OC1B_PIN PINCKOUT
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#define OC1B_BIT CKOUT
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#define MISO_DDR DDRCKOUT
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#define MISO_PORT PORTCKOUT
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#define MISO_PIN PINCKOUT
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#define MISO_BIT CKOUT
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#define INT0_DDR DDRCKOUT
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#define INT0_PORT PORTCKOUT
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#define INT0_PIN PINCKOUT
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#define INT0_BIT CKOUT
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#define PCINT10_DDR DDRCKOUT
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#define PCINT10_PORT PORTCKOUT
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#define PCINT10_PIN PINCKOUT
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#define PCINT10_BIT CKOUT
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#define OC0B_DDR DDR(ADC
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#define OC0B_PORT PORT(ADC
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#define OC0B_PIN PIN(ADC
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#define OC0B_BIT (ADC7
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#define ICP1_DDR DDR(ADC
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#define ICP1_PORT PORT(ADC
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#define ICP1_PIN PIN(ADC
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#define ICP1_BIT (ADC7
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#define T1_DDR DDR(ADC
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#define T1_PORT PORT(ADC
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#define T1_PIN PIN(ADC
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#define SCL_DDR DDR(ADC
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#define SCL_PORT PORT(ADC
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#define SCL_PIN PIN(ADC
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#define SCL_BIT (ADC7
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#define SCK_DDR DDR(ADC
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#define SCK_PORT PORT(ADC
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#define SCK_PIN PIN(ADC
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#define SCK_BIT (ADC7
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#define PCINT7_DDR DDR(ADC
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#define PCINT7_PORT PORT(ADC
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#define PCINT7_PIN PIN(ADC
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#define PCINT7_BIT (ADC7
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#define SS_DDR DDRADC
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#define SS_PORT PORTADC
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#define SS_PIN PINADC
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#define PCINT6_DDR DDRADC
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#define PCINT6_PORT PORTADC
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#define PCINT6_PIN PINADC
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#define PCINT6_BIT ADC6
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#define PCINT5_DDR DDRADC
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#define PCINT5_PORT PORTADC
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#define PCINT5_PIN PINADC
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#define PCINT5_BIT ADC5
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#endif /* _AVR_ATtiny20_H_ */
added
removed
include/avr/iotn20.h
