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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE. */
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/* $Id: io4433.h 1873 2009-02-11 17:53:39Z arcanum $ */
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/* $Id: io4433.h 2225 2011-03-02 16:27:26Z arcanum $ */
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/* avr/io4433.h - definitions for AT90S4433 */
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/* Interrupt vectors */
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/* External Interrupt 0 */
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#define INT0_vect_num 1
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#define INT0_vect _VECTOR(1)
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#define SIG_INTERRUPT0 _VECTOR(1)
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/* External Interrupt 1 */
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#define INT1_vect_num 2
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#define INT1_vect _VECTOR(2)
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#define SIG_INTERRUPT1 _VECTOR(2)
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/* Timer/Counter Capture Event */
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#define TIMER1_CAPT_vect_num 3
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#define TIMER1_CAPT_vect _VECTOR(3)
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#define SIG_INPUT_CAPTURE1 _VECTOR(3)
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/* Timer/Counter1 Compare Match */
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#define TIMER1_COMP_vect_num 4
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#define TIMER1_COMP_vect _VECTOR(4)
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#define SIG_OUTPUT_COMPARE1A _VECTOR(4)
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/* Timer/Counter1 Overflow */
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#define TIMER1_OVF_vect_num 5
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#define TIMER1_OVF_vect _VECTOR(5)
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#define SIG_OVERFLOW1 _VECTOR(5)
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/* Timer/Counter0 Overflow */
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#define TIMER0_OVF_vect_num 6
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#define TIMER0_OVF_vect _VECTOR(6)
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#define SIG_OVERFLOW0 _VECTOR(6)
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/* Serial Transfer Complete */
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#define SPI_STC_vect_num 7
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#define SPI_STC_vect _VECTOR(7)
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#define SIG_SPI _VECTOR(7)
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/* UART, Rx Complete */
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#define UART_RX_vect_num 8
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#define UART_RX_vect _VECTOR(8)
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#define SIG_UART_RECV _VECTOR(8)
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/* UART Data Register Empty */
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#define UART_UDRE_vect_num 9
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#define UART_UDRE_vect _VECTOR(9)
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#define SIG_UART_DATA _VECTOR(9)
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/* UART, Tx Complete */
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#define UART_TX_vect_num 10
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#define UART_TX_vect _VECTOR(10)
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#define SIG_UART_TRANS _VECTOR(10)
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/* ADC Conversion Complete */
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#define ADC_vect_num 11
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#define ADC_vect _VECTOR(11)
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#define SIG_ADC _VECTOR(11)
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/* EEPROM Ready */
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#define EE_RDY_vect_num 12
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#define EE_RDY_vect _VECTOR(12)
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#define SIG_EEPROM_READY _VECTOR(12)
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/* Analog Comparator */
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#define ANA_COMP_vect_num 13
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#define ANA_COMP_vect _VECTOR(13)
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#define SIG_COMPARATOR _VECTOR(13)