191
191
BPP_LDO_POWB, BPP_LDO_SUSPEND);
194
static int rtl8411_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
194
static int rtl8411_do_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage,
195
int bpp_tuned18_shift, int bpp_asic_1v8)
199
mask = (BPP_REG_TUNED18 << BPP_TUNED18_SHIFT_8411) | BPP_PAD_MASK;
200
mask = (BPP_REG_TUNED18 << bpp_tuned18_shift) | BPP_PAD_MASK;
200
201
if (voltage == OUTPUT_3V3) {
201
202
err = rtsx_pci_write_register(pcr,
202
203
SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_3v3);
205
val = (BPP_ASIC_3V3 << BPP_TUNED18_SHIFT_8411) | BPP_PAD_3V3;
206
val = (BPP_ASIC_3V3 << bpp_tuned18_shift) | BPP_PAD_3V3;
206
207
} else if (voltage == OUTPUT_1V8) {
207
208
err = rtsx_pci_write_register(pcr,
208
209
SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_1v8);
211
val = (BPP_ASIC_1V8 << BPP_TUNED18_SHIFT_8411) | BPP_PAD_1V8;
212
val = (bpp_asic_1v8 << bpp_tuned18_shift) | BPP_PAD_1V8;
216
217
return rtsx_pci_write_register(pcr, LDO_CTL, mask, val);
220
static int rtl8411_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
222
return rtl8411_do_switch_output_voltage(pcr, voltage,
223
BPP_TUNED18_SHIFT_8411, BPP_ASIC_1V8);
226
static int rtl8402_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
228
return rtl8411_do_switch_output_voltage(pcr, voltage,
229
BPP_TUNED18_SHIFT_8402, BPP_ASIC_2V0);
219
232
static unsigned int rtl8411_cd_deglitch(struct rtsx_pcr *pcr)
221
234
unsigned int card_exist;
295
308
.force_power_down = rtl8411_force_power_down,
311
static const struct pcr_ops rtl8402_pcr_ops = {
312
.fetch_vendor_settings = rtl8411_fetch_vendor_settings,
313
.extra_init_hw = rtl8411_extra_init_hw,
314
.optimize_phy = NULL,
315
.turn_on_led = rtl8411_turn_on_led,
316
.turn_off_led = rtl8411_turn_off_led,
317
.enable_auto_blink = rtl8411_enable_auto_blink,
318
.disable_auto_blink = rtl8411_disable_auto_blink,
319
.card_power_on = rtl8411_card_power_on,
320
.card_power_off = rtl8411_card_power_off,
321
.switch_output_voltage = rtl8402_switch_output_voltage,
322
.cd_deglitch = rtl8411_cd_deglitch,
323
.conv_clk_and_div_n = rtl8411_conv_clk_and_div_n,
324
.force_power_down = rtl8411_force_power_down,
298
327
static const struct pcr_ops rtl8411b_pcr_ops = {
299
328
.fetch_vendor_settings = rtl8411b_fetch_vendor_settings,
300
329
.extra_init_hw = rtl8411b_extra_init_hw,
473
void rtl8411_init_common_params(struct rtsx_pcr *pcr)
475
pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104;
478
pcr->card_drive_sel = RTL8411_CARD_DRIVE_DEFAULT;
479
pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
480
pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
481
pcr->aspm_en = ASPM_L1_EN;
482
pcr->tx_initial_phase = SET_CLOCK_PHASE(23, 7, 14);
483
pcr->rx_initial_phase = SET_CLOCK_PHASE(4, 3, 10);
484
pcr->ic_version = rtl8411_get_ic_version(pcr);
444
487
void rtl8411_init_params(struct rtsx_pcr *pcr)
446
pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104;
489
rtl8411_init_common_params(pcr);
448
490
pcr->ops = &rtl8411_pcr_ops;
451
pcr->card_drive_sel = RTL8411_CARD_DRIVE_DEFAULT;
452
pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
453
pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
454
pcr->aspm_en = ASPM_L1_EN;
455
pcr->tx_initial_phase = SET_CLOCK_PHASE(23, 7, 14);
456
pcr->rx_initial_phase = SET_CLOCK_PHASE(4, 3, 10);
458
pcr->ic_version = rtl8411_get_ic_version(pcr);
459
pcr->sd_pull_ctl_enable_tbl = rtl8411_sd_pull_ctl_enable_tbl;
460
pcr->sd_pull_ctl_disable_tbl = rtl8411_sd_pull_ctl_disable_tbl;
461
pcr->ms_pull_ctl_enable_tbl = rtl8411_ms_pull_ctl_enable_tbl;
462
pcr->ms_pull_ctl_disable_tbl = rtl8411_ms_pull_ctl_disable_tbl;
491
set_pull_ctrl_tables(pcr, rtl8411);
465
494
void rtl8411b_init_params(struct rtsx_pcr *pcr)
467
pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104;
496
rtl8411_init_common_params(pcr);
469
497
pcr->ops = &rtl8411b_pcr_ops;
472
pcr->card_drive_sel = RTL8411_CARD_DRIVE_DEFAULT;
473
pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
474
pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
475
pcr->aspm_en = ASPM_L1_EN;
476
pcr->tx_initial_phase = SET_CLOCK_PHASE(23, 7, 14);
477
pcr->rx_initial_phase = SET_CLOCK_PHASE(4, 3, 10);
479
pcr->ic_version = rtl8411_get_ic_version(pcr);
481
if (rtl8411b_is_qfn48(pcr)) {
482
pcr->sd_pull_ctl_enable_tbl =
483
rtl8411b_qfn48_sd_pull_ctl_enable_tbl;
484
pcr->sd_pull_ctl_disable_tbl =
485
rtl8411b_qfn48_sd_pull_ctl_disable_tbl;
486
pcr->ms_pull_ctl_enable_tbl =
487
rtl8411b_qfn48_ms_pull_ctl_enable_tbl;
488
pcr->ms_pull_ctl_disable_tbl =
489
rtl8411b_qfn48_ms_pull_ctl_disable_tbl;
491
pcr->sd_pull_ctl_enable_tbl =
492
rtl8411b_qfn64_sd_pull_ctl_enable_tbl;
493
pcr->sd_pull_ctl_disable_tbl =
494
rtl8411b_qfn64_sd_pull_ctl_disable_tbl;
495
pcr->ms_pull_ctl_enable_tbl =
496
rtl8411b_qfn64_ms_pull_ctl_enable_tbl;
497
pcr->ms_pull_ctl_disable_tbl =
498
rtl8411b_qfn64_ms_pull_ctl_disable_tbl;
498
if (rtl8411b_is_qfn48(pcr))
499
set_pull_ctrl_tables(pcr, rtl8411b_qfn48);
501
set_pull_ctrl_tables(pcr, rtl8411b_qfn64);
504
void rtl8402_init_params(struct rtsx_pcr *pcr)
506
rtl8411_init_common_params(pcr);
507
pcr->ops = &rtl8402_pcr_ops;
508
set_pull_ctrl_tables(pcr, rtl8411);