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- Committer: Bazaar Package Importer
- Author(s): Guillem Jover
- Date: 2011-06-08 04:35:59 UTC
- Revision ID: james.westby@ubuntu.com-20110608043559-8ln88b583x0uqcox
Tags: 18-5
* Switch to debhelper compatibility level 7.
* Use dh_prep instead of “dh_clean -k”.
* Use $(filter ...) instead of $(findstring ...) to extract space separated
options from DEB_BUILD_OPTIONS in debian/rules.
* Switch to source format “3.0 (quilt)”:
- Remove quilt from Build-Depends.
- Remove quilt.make include from debian/rules.
- Remove patch and unpatch targets from debian/rules.
- Remove now unneeded debian/README.source.
* Now using Standards-Version 3.9.2 (no changes needed).
* Remove leading ‘./’ from lintian overrides.
* Rename build target to build-indep, install to install-indep, and add
an empty build-arch target.
* Use dpkg-buildflags to set CPPFLAGS, CFLAGS and LDFLAGS.
* Disable Sparc V9 specific unbuildable code.
* Add ${misc:Depends} to Depends field.
* Use dh_prep instead of “dh_clean -k”.
* Use $(filter ...) instead of $(findstring ...) to extract space separated
options from DEB_BUILD_OPTIONS in debian/rules.
* Switch to source format “3.0 (quilt)”:
- Remove quilt from Build-Depends.
- Remove quilt.make include from debian/rules.
- Remove patch and unpatch targets from debian/rules.
- Remove now unneeded debian/README.source.
* Now using Standards-Version 3.9.2 (no changes needed).
* Remove leading ‘./’ from lintian overrides.
* Rename build target to build-indep, install to install-indep, and add
an empty build-arch target.
* Use dpkg-buildflags to set CPPFLAGS, CFLAGS and LDFLAGS.
* Disable Sparc V9 specific unbuildable code.
* Add ${misc:Depends} to Depends field.
- files added:
- .pc
- .pc/001_qemu.patch
- .pc/001_qemu.patch/qemu
- .pc/001_qemu.patch/src
- .pc/002_gcc34.patch
- .pc/002_gcc34.patch/qemu
- .pc/002_gcc34.patch/src
- .pc/003_sparcv9.patch
- .pc/003_sparcv9.patch/src
- debian/source
- qemu
- files removed:
- debian/README.source
- files modified:
- Makefile
added
removed
.pc/001_qemu.patch/src/le.c
1
/*
2
* Primitive le diver made in 1999 from Linux sunlance.c.
3
* sunlance.c: Written 1995, 1996 by Miguel de Icaza <miguel@nuclecu.unam.mx>.
4
*/
5
6
// #include <linux/errno.h>
7
#define EAGAIN 11
8
9
/* #include <asm/byteorder.h> */ /* Used by the checksum routines */
10
// #include <psr.h> /* PSR_PIL */
11
#include <system.h> /* == <asm/system.h> */
12
#include <general.h> /* __P for netpriv.h */
13
#include <net.h> /* ETH_ALEN */
14
/* #include <asm/bitops.h> */
15
/* #include <asm/io.h> */
16
#include <dma.h> /* dmaga */
17
#include <netpriv.h>
18
#include <romlib.h>
19
20
#include "phys_jj.h" /* hardcoded address */
21
22
/*
23
* XXX Crude
24
*/
25
struct le_dma {
26
struct sparc_dma_registers *regs;
27
int bursizes;
28
enum dvma_rev revision;
29
};
30
31
/* Define: 2^4 Tx buffers and 2^4 Rx buffers */
32
#ifndef LANCE_LOG_TX_BUFFERS
33
#define LANCE_LOG_TX_BUFFERS 4
34
#define LANCE_LOG_RX_BUFFERS 4
35
#endif
36
37
#define CRC_POLYNOMIAL_BE 0x04c11db7UL /* Ethernet CRC, big endian */
38
#define CRC_POLYNOMIAL_LE 0xedb88320UL /* Ethernet CRC, little endian */
39
40
#define LE_CSR0 0
41
#define LE_CSR1 1
42
#define LE_CSR2 2
43
#define LE_CSR3 3
44
45
#define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
46
47
#define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
48
#define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
49
#define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
50
#define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
51
#define LE_C0_MERR 0x0800 /* ME: Memory error */
52
#define LE_C0_RINT 0x0400 /* Received interrupt */
53
#define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
54
#define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
55
#define LE_C0_INTR 0x0080 /* Interrupt or error */
56
#define LE_C0_INEA 0x0040 /* Interrupt enable */
57
#define LE_C0_RXON 0x0020 /* Receiver on */
58
#define LE_C0_TXON 0x0010 /* Transmitter on */
59
#define LE_C0_TDMD 0x0008 /* Transmitter demand */
60
#define LE_C0_STOP 0x0004 /* Stop the card */
61
#define LE_C0_STRT 0x0002 /* Start the card */
62
#define LE_C0_INIT 0x0001 /* Init the card */
63
64
#define LE_C3_BSWP 0x4 /* SWAP */
65
#define LE_C3_ACON 0x2 /* ALE Control */
66
#define LE_C3_BCON 0x1 /* Byte control */
67
68
/* Receive message descriptor 1 */
69
#define LE_R1_OWN 0x80 /* Who owns the entry */
70
#define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
71
#define LE_R1_FRA 0x20 /* FRA: Frame error */
72
#define LE_R1_OFL 0x10 /* OFL: Frame overflow */
73
#define LE_R1_CRC 0x08 /* CRC error */
74
#define LE_R1_BUF 0x04 /* BUF: Buffer error */
75
#define LE_R1_SOP 0x02 /* Start of packet */
76
#define LE_R1_EOP 0x01 /* End of packet */
77
#define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
78
79
#define LE_T1_OWN 0x80 /* Lance owns the packet */
80
#define LE_T1_ERR 0x40 /* Error summary */
81
#define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
82
#define LE_T1_EONE 0x08 /* Error: one retry needed */
83
#define LE_T1_EDEF 0x04 /* Error: deferred */
84
#define LE_T1_SOP 0x02 /* Start of packet */
85
#define LE_T1_EOP 0x01 /* End of packet */
86
#define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
87
88
#define LE_T3_BUF 0x8000 /* Buffer error */
89
#define LE_T3_UFL 0x4000 /* Error underflow */
90
#define LE_T3_LCOL 0x1000 /* Error late collision */
91
#define LE_T3_CLOS 0x0800 /* Error carrier loss */
92
#define LE_T3_RTY 0x0400 /* Error retry */
93
#define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
94
95
#define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
96
#define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
97
#define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
98
99
#define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
100
#define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
101
#define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
102
103
#define PKT_BUF_SZ 1544
104
#define RX_BUFF_SIZE PKT_BUF_SZ
105
#define TX_BUFF_SIZE PKT_BUF_SZ
106
107
struct lance_rx_desc {
108
unsigned short rmd0; /* low address of packet */
109
unsigned char rmd1_bits; /* descriptor bits */
110
unsigned char rmd1_hadr; /* high address of packet */
111
short length; /* This length is 2s complement (negative)!
112
* Buffer length
113
*/
114
unsigned short mblength; /* This is the actual number of bytes received */
115
};
116
117
struct lance_tx_desc {
118
unsigned short tmd0; /* low address of packet */
119
unsigned char tmd1_bits; /* descriptor bits */
120
unsigned char tmd1_hadr; /* high address of packet */
121
short length; /* Length is 2s complement (negative)! */
122
unsigned short misc;
123
};
124
125
/* The LANCE initialization block, described in databook. */
126
/* On the Sparc, this block should be on a DMA region */
127
struct lance_init_block {
128
unsigned short mode; /* Pre-set mode (reg. 15) */
129
unsigned char phys_addr[6]; /* Physical ethernet address */
130
unsigned filter[2]; /* Multicast filter. */
131
132
/* Receive and transmit ring base, along with extra bits. */
133
unsigned short rx_ptr; /* receive descriptor addr */
134
unsigned short rx_len; /* receive len and high addr */
135
unsigned short tx_ptr; /* transmit descriptor addr */
136
unsigned short tx_len; /* transmit len and high addr */
137
138
/* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
139
struct lance_rx_desc brx_ring[RX_RING_SIZE];
140
struct lance_tx_desc btx_ring[TX_RING_SIZE];
141
142
char tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
143
char pad[2]; /* align rx_buf for copy_and_sum(). */
144
char rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
145
};
146
147
#define libdesc_offset(rt, elem) \
148
((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
149
150
#define libbuff_offset(rt, elem) \
151
((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0])))))
152
153
struct le_private {
154
int active; /* initialized */
155
int inst; /* iface number */
156
157
volatile struct lance_regs *ll;
158
volatile struct lance_init_block *init_block;
159
__u32 init_block_dvma;
160
unsigned int irq; /* device IRQ number */
161
162
int rx_new, tx_new;
163
int rx_old, tx_old;
164
165
struct le_dma *ledma; /* If set this points to ledma */
166
/* and arch = sun4m */
167
int tpe; /* cable-selection is TPE */
168
int auto_select; /* cable-selection by carrier */
169
int burst_sizes; /* ledma SBus burst sizes */
170
171
unsigned short busmaster_regval;
172
unsigned short pio_buffer;
173
174
struct device edev; /* Inherit Ethernet */
175
char lename[4];
176
};
177
178
#define TX_BUFFS_AVAIL(lp) ((lp->tx_old<=lp->tx_new)?\
179
lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
180
lp->tx_old - lp->tx_new-1)
181
182
/* On the sparc, the lance control ports are memory mapped */
183
struct lance_regs {
184
unsigned short rdp; /* register data port */
185
unsigned short rap; /* register address port */
186
};
187
188
int sparc_lance_debug = 2;
189
190
/* The Lance uses 24 bit addresses */
191
/* On the Sun4c the DVMA will provide the remaining bytes for us */
192
/* On the Sun4m we have to instruct the ledma to provide them */
193
/* Even worse, on scsi/ether SBUS cards, the init block and the
194
* transmit/receive buffers are addresses as offsets from absolute
195
* zero on the lebuffer PIO area. -davem
196
*/
197
198
#define LANCE_ADDR(x) ((long)(x) & ~0xff000000)
199
200
/*
201
* XXX Turn this into PROM node when needed.
202
*/
203
struct le_info {
204
/*
205
* Properties
206
*/
207
__u32 physaddr[3];
208
int tpe; /* 0 = auto; 1 = AUI; 2 = TPE; */
209
int intr;
210
/*
211
* Non-properties
212
*/
213
struct le_dma *ledma;
214
};
215
216
/*
217
*/
218
static struct le_private le_arena[1];
219
static struct le_info le_node0;
220
static struct le_dma ledma0;
221
222
/* Load the CSR registers */
223
static void load_csrs (struct le_private *lp)
224
{
225
volatile struct lance_regs *ll = lp->ll;
226
__u32 ib_dvma = lp->init_block_dvma;
227
int leptr;
228
229
/* This is right now because when we are using a PIO buffered
230
* init block, init_block_dvma is set to zero. -DaveM
231
*/
232
leptr = LANCE_ADDR (ib_dvma);
233
234
ll->rap = LE_CSR1;
235
ll->rdp = (leptr & 0xFFFF);
236
ll->rap = LE_CSR2;
237
ll->rdp = leptr >> 16;
238
ll->rap = LE_CSR3;
239
ll->rdp = lp->busmaster_regval;
240
241
/* Point back to csr0 */
242
ll->rap = LE_CSR0;
243
}
244
245
#define ZERO 0
246
247
/* Setup the Lance Rx and Tx rings */
248
/* Sets dev->tbusy */
249
static void lance_init_ring (struct device *dev)
250
{
251
struct le_private *lp = (struct le_private *) dev->priv;
252
volatile struct lance_init_block *ib = lp->init_block;
253
__u32 ib_dvma = lp->init_block_dvma;
254
__u32 aib; /* for LANCE_ADDR computations */
255
int leptr;
256
int i;
257
258
/* This is right now because when we are using a PIO buffered
259
* init block, init_block_dvma is set to zero. -DaveM
260
*/
261
aib = ib_dvma;
262
263
/* Lock out other processes while setting up hardware */
264
dev->tbusy = 1;
265
lp->rx_new = lp->tx_new = 0;
266
lp->rx_old = lp->tx_old = 0;
267
268
ib->mode = 0;
269
270
/* Copy the ethernet address to the lance init block
271
* Note that on the sparc you need to swap the ethernet address.
272
* Note also we want the CPU ptr of the init_block here.
273
*/
274
ib->phys_addr [0] = dev->dev_addr [1];
275
ib->phys_addr [1] = dev->dev_addr [0];
276
ib->phys_addr [2] = dev->dev_addr [3];
277
ib->phys_addr [3] = dev->dev_addr [2];
278
ib->phys_addr [4] = dev->dev_addr [5];
279
ib->phys_addr [5] = dev->dev_addr [4];
280
281
if (ZERO)
282
printk ("TX rings:\n");
283
284
/* Setup the Tx ring entries */
285
for (i = 0; i <= TX_RING_SIZE; i++) {
286
leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i));
287
ib->btx_ring [i].tmd0 = leptr;
288
ib->btx_ring [i].tmd1_hadr = leptr >> 16;
289
ib->btx_ring [i].tmd1_bits = 0;
290
ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */
291
ib->btx_ring [i].misc = 0;
292
if (i < 3)
293
if (ZERO) printk ("%d: 0x%8.8x\n", i, leptr);
294
}
295
296
/* Setup the Rx ring entries */
297
if (ZERO)
298
printk ("RX rings:\n");
299
for (i = 0; i < RX_RING_SIZE; i++) {
300
leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i));
301
302
ib->brx_ring [i].rmd0 = leptr;
303
ib->brx_ring [i].rmd1_hadr = leptr >> 16;
304
ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
305
ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000;
306
ib->brx_ring [i].mblength = 0;
307
if (i < 3 && ZERO)
308
printk ("%d: 0x%8.8x\n", i, leptr);
309
}
310
311
/* Setup the initialization block */
312
313
/* Setup rx descriptor pointer */
314
leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0));
315
ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
316
ib->rx_ptr = leptr;
317
if (ZERO)
318
printk ("RX ptr: %8.8x\n", leptr);
319
320
/* Setup tx descriptor pointer */
321
leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0));
322
ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
323
ib->tx_ptr = leptr;
324
if (ZERO)
325
printk ("TX ptr: %8.8x\n", leptr);
326
327
/* Clear the multicast filter */
328
ib->filter [0] = 0;
329
ib->filter [1] = 0;
330
}
331
332
static int init_restart_lance (struct le_private *lp)
333
{
334
volatile struct lance_regs *ll = lp->ll;
335
int i;
336
337
if (lp->ledma) {
338
struct sparc_dma_registers *dregs = lp->ledma->regs;
339
unsigned long creg;
340
341
if (!(dregs->cond_reg & DMA_HNDL_ERROR)) {
342
/* E-Cache draining */
343
while (dregs->cond_reg & DMA_FIFO_ISDRAIN)
344
barrier();
345
}
346
347
creg = dregs->cond_reg;
348
if (lp->burst_sizes & DMA_BURST32)
349
creg |= DMA_E_BURST8;
350
else
351
creg &= ~DMA_E_BURST8;
352
353
creg |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV);
354
355
if (lp->tpe)
356
creg |= DMA_EN_ENETAUI;
357
else
358
creg &= ~DMA_EN_ENETAUI;
359
udelay(20);
360
dregs->cond_reg = creg;
361
udelay(200);
362
}
363
364
ll->rap = LE_CSR0;
365
ll->rdp = LE_C0_INIT;
366
367
/* Wait for the lance to complete initialization */
368
for (i = 0; (i < 100) && !(ll->rdp & (LE_C0_ERR | LE_C0_IDON)); i++)
369
barrier();
370
if ((i == 100) || (ll->rdp & LE_C0_ERR)) {
371
printk ("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
372
if (lp->ledma)
373
printk ("dcsr=%8.8x\n",
374
(unsigned int) lp->ledma->regs->cond_reg);
375
return -1;
376
}
377
378
/* Clear IDON by writing a "1", enable interrupts and start lance */
379
ll->rdp = LE_C0_IDON;
380
ll->rdp = LE_C0_INEA | LE_C0_STRT;
381
382
if (lp->ledma)
383
lp->ledma->regs->cond_reg |= DMA_INT_ENAB;
384
385
return 0;
386
}
387
388
static int lance_rx (struct device *dev)
389
{
390
struct le_private *lp = (struct le_private *) dev->priv;
391
volatile struct lance_init_block *ib = lp->init_block;
392
volatile struct lance_rx_desc *rd;
393
unsigned char bits;
394
int len;
395
struct sk_buff *skb;
396
397
#ifdef TEST_HITS
398
printk ("[");
399
for (i = 0; i < RX_RING_SIZE; i++) {
400
if (i == lp->rx_new)
401
printk ("%s",
402
ib->brx_ring [i].rmd1_bits & LE_R1_OWN ? "_" : "X");
403
else
404
printk ("%s",
405
ib->brx_ring [i].rmd1_bits & LE_R1_OWN ? "." : "1");
406
}
407
printk ("]");
408
#endif
409
410
for (rd = &ib->brx_ring [lp->rx_new];
411
!((bits = rd->rmd1_bits) & LE_R1_OWN);
412
rd = &ib->brx_ring [lp->rx_new]) {
413
414
/* We got an incomplete frame? */
415
if ((bits & LE_R1_POK) != LE_R1_POK) {
416
;
417
} else if (bits & LE_R1_ERR) {
418
/* Count only the end frame as a rx error,
419
* not the beginning
420
*/
421
#if 0
422
if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++;
423
if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++;
424
if (bits & LE_R1_OFL) lp->stats.rx_over_errors++;
425
if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++;
426
if (bits & LE_R1_EOP) lp->stats.rx_errors++;
427
#endif
428
} else {
429
len = (rd->mblength & 0xfff) - 4;
430
skb = dev_alloc_skb (len+2);
431
432
if (skb == 0) {
433
printk ("%s: Memory squeeze, deferring packet.\n",
434
dev->name);
435
rd->mblength = 0;
436
rd->rmd1_bits = LE_R1_OWN;
437
lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
438
return 0;
439
}
440
441
skb->dev = dev;
442
skb_reserve (skb, 2); /* 16 byte align */
443
skb_put (skb, len); /* make room */
444
eth_copy_and_sum(skb,
445
(unsigned char *)&(ib->rx_buf [lp->rx_new][0]),
446
len, 0);
447
skb->protocol = eth_type_trans (skb, dev);
448
netif_rx (skb);
449
}
450
451
/* Return the packet to the pool */
452
rd->mblength = 0;
453
rd->rmd1_bits = LE_R1_OWN;
454
lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
455
}
456
return 0;
457
}
458
459
static int lance_tx (struct device *dev)
460
{
461
struct le_private *lp = (struct le_private *) dev->priv;
462
volatile struct lance_init_block *ib = lp->init_block;
463
volatile struct lance_regs *ll = lp->ll;
464
volatile struct lance_tx_desc *td;
465
int i, j;
466
int status;
467
468
j = lp->tx_old;
469
for (i = j; i != lp->tx_new; i = j) {
470
td = &ib->btx_ring [i];
471
472
/* If we hit a packet not owned by us, stop */
473
if (td->tmd1_bits & LE_T1_OWN)
474
break;
475
476
if (td->tmd1_bits & LE_T1_ERR) {
477
status = td->misc;
478
#if 0
479
if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++;
480
if (status & LE_T3_LCOL) lp->stats.tx_window_errors++;
481
#endif
482
if (status & LE_T3_CLOS) {
483
if (lp->auto_select) {
484
lp->tpe = 1 - lp->tpe;
485
printk("%s: Carrier Lost, trying %s\n",
486
dev->name, lp->tpe?"TPE":"AUI");
487
/* Stop the lance */
488
ll->rap = LE_CSR0;
489
ll->rdp = LE_C0_STOP;
490
lance_init_ring (dev);
491
load_csrs (lp);
492
init_restart_lance (lp);
493
return 0;
494
}
495
}
496
497
/* Buffer errors and underflows turn off the
498
* transmitter, restart the adapter.
499
*/
500
if (status & (LE_T3_BUF|LE_T3_UFL)) {
501
printk ("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
502
dev->name);
503
/* Stop the lance */
504
ll->rap = LE_CSR0;
505
ll->rdp = LE_C0_STOP;
506
lance_init_ring (dev);
507
load_csrs (lp);
508
init_restart_lance (lp);
509
return 0;
510
}
511
} else if ((td->tmd1_bits & LE_T1_POK) == LE_T1_POK) {
512
/*
513
* So we don't count the packet more than once.
514
*/
515
td->tmd1_bits &= ~(LE_T1_POK);
516
517
#if 0
518
/* One collision before packet was sent. */
519
if (td->tmd1_bits & LE_T1_EONE)
520
lp->stats.collisions++;
521
522
/* More than one collision, be optimistic. */
523
if (td->tmd1_bits & LE_T1_EMORE)
524
lp->stats.collisions += 2;
525
526
lp->stats.tx_packets++;
527
#endif
528
}
529
530
j = (j + 1) & TX_RING_MOD_MASK;
531
}
532
lp->tx_old = j;
533
return 0;
534
}
535
536
static void lance_interrupt(void *dev_id)
537
{
538
struct device *dev = (struct device *)dev_id;
539
struct le_private *lp = (struct le_private *)dev->priv;
540
volatile struct lance_regs *ll = lp->ll;
541
int csr0;
542
543
if (dev->interrupt)
544
printk ("%s: again", dev->name);
545
546
dev->interrupt = 1;
547
548
ll->rap = LE_CSR0;
549
csr0 = ll->rdp;
550
551
/* Acknowledge all the interrupt sources ASAP */
552
ll->rdp = csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT);
553
554
if ((csr0 & LE_C0_ERR)) {
555
/* Clear the error condition */
556
ll->rdp = LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
557
LE_C0_CERR | LE_C0_MERR;
558
}
559
560
if (csr0 & LE_C0_RINT)
561
lance_rx (dev);
562
563
if (csr0 & LE_C0_TINT)
564
lance_tx (dev);
565
566
if ((TX_BUFFS_AVAIL(lp) >= 0) && dev->tbusy) {
567
dev->tbusy = 0;
568
mark_bh (NET_BH);
569
}
570
571
#if 0
572
if (csr0 & LE_C0_BABL)
573
lp->stats.tx_errors++;
574
575
if (csr0 & LE_C0_MISS)
576
lp->stats.rx_errors++;
577
#endif
578
579
if (csr0 & LE_C0_MERR) {
580
struct sparc_dma_registers *dregs = lp->ledma->regs;
581
unsigned long tst = (unsigned long)dregs->st_addr;
582
583
printk ("%s: Memory error, status %04x, addr %06lx\n",
584
dev->name, csr0, tst & 0xffffff);
585
586
ll->rdp = LE_C0_STOP;
587
588
if (lp->ledma)
589
lp->ledma->regs->cond_reg |= DMA_FIFO_INV;
590
591
lance_init_ring (dev);
592
load_csrs (lp);
593
init_restart_lance (lp);
594
dev->tbusy = 0;
595
}
596
597
ll->rdp = LE_C0_INEA;
598
dev->interrupt = 0;
599
}
600
601
static int lance_open (struct device *dev)
602
{
603
struct le_private *lp = (struct le_private *)dev->priv;
604
volatile struct lance_regs *ll = lp->ll;
605
int status = 0;
606
607
if (request_irq(lp->irq, &lance_interrupt, (void *)dev)) {
608
printk ("Lance: Can't get irq %d\n", lp->irq);
609
return -EAGAIN;
610
}
611
612
/* Stop the Lance */
613
ll->rap = LE_CSR0;
614
ll->rdp = LE_C0_STOP;
615
616
/* On the 4m, setup the ledma to provide the upper bits for buffers */
617
if (lp->ledma)
618
lp->ledma->regs->dma_test = ((__u32) lp->init_block_dvma) & 0xff000000;
619
620
lance_init_ring (dev);
621
load_csrs (lp);
622
623
dev->tbusy = 0;
624
dev->interrupt = 0;
625
dev->start = 1;
626
627
status = init_restart_lance (lp);
628
#if 0
629
/* To emulate SunOS, we add a route to the local network */
630
rt_add (RTF_UP,
631
dev->pa_addr & ip_get_mask (dev->pa_addr),
632
ip_get_mask (dev->pa_addr),
633
0, dev, dev->mtu, 0, 0);
634
#endif
635
#if 0
636
if (!status && lp->auto_select) {
637
/*
638
* Build a fake network packet and send it to ourselfs.
639
*/
640
volatile struct lance_init_block *ib = lp->init_block;
641
volatile unsigned long flush;
642
unsigned char packet[ETH_ZLEN];
643
struct ethhdr *eth = (struct ethhdr *)packet;
644
int i, entry;
645
646
memset(packet, 0, ETH_ZLEN);
647
for (i = 0; i < 6; i++) {
648
eth->h_dest[i] = dev->dev_addr[i];
649
eth->h_source[i] = dev->dev_addr[i];
650
}
651
652
entry = lp->tx_new & TX_RING_MOD_MASK;
653
ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000;
654
ib->btx_ring[entry].misc = 0;
655
656
bcopy(packet, (char *)&ib->tx_buf[entry][0], ETH_ZLEN);
657
ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
658
lp->tx_new = (lp->tx_new + 1) & TX_RING_MOD_MASK;
659
660
ll->rdp = LE_C0_INEA | LE_C0_TDMD;
661
flush = ll->rdp;
662
}
663
#endif
664
665
return status;
666
}
667
668
static int lance_close (struct device *dev)
669
{
670
struct le_private *lp = (struct le_private *) dev->priv;
671
volatile struct lance_regs *ll = lp->ll;
672
673
dev->start = 0;
674
dev->tbusy = 1;
675
676
/* Stop the card */
677
ll->rap = LE_CSR0;
678
ll->rdp = LE_C0_STOP;
679
680
free_irq (lp->irq, (void *) dev);
681
return 0;
682
}
683
684
static inline int lance_reset (struct device *dev)
685
{
686
struct le_private *lp = (struct le_private *)dev->priv;
687
volatile struct lance_regs *ll = lp->ll;
688
int status;
689
690
/* Stop the lance */
691
ll->rap = LE_CSR0;
692
ll->rdp = LE_C0_STOP;
693
694
/* On the 4m, reset the dma too */
695
if (lp->ledma) {
696
printk ("resetting ledma\n");
697
lp->ledma->regs->cond_reg |= DMA_RST_ENET;
698
udelay (200);
699
lp->ledma->regs->cond_reg &= ~DMA_RST_ENET;
700
lp->ledma->regs->dma_test = ((__u32) lp->init_block_dvma) & 0xff000000;
701
}
702
lance_init_ring (dev);
703
load_csrs (lp);
704
dev->trans_start = jiffies;
705
dev->interrupt = 0;
706
dev->start = 1;
707
dev->tbusy = 0;
708
status = init_restart_lance (lp);
709
#if 0
710
printk ("Lance restart=%d\n", status);
711
#endif
712
return status;
713
}
714
715
static int lance_start_xmit (struct sk_buff *skb, struct device *dev)
716
{
717
struct le_private *lp = (struct le_private *)dev->priv;
718
volatile struct lance_regs *ll = lp->ll;
719
volatile struct lance_init_block *ib = lp->init_block;
720
volatile unsigned long flush;
721
unsigned long flags;
722
int entry, skblen, len;
723
int status = 0;
724
static int outs;
725
726
/* Transmitter timeout, serious problems */
727
if (dev->tbusy) {
728
int tickssofar = jiffies - dev->trans_start;
729
730
if (tickssofar < 100) {
731
status = -1;
732
} else {
733
printk ("%s: transmit timed out, status %04x, reset\n",
734
dev->name, ll->rdp);
735
lance_reset (dev);
736
}
737
return status;
738
}
739
740
#if 0
741
/* Block a timer-based transmit from overlapping. */
742
if (test_and_set_bit (0, (void *) &dev->tbusy) != 0) {
743
printk ("Transmitter access conflict.\n");
744
return -1;
745
}
746
#else
747
if (dev->tbusy != 0) {
748
printk ("Transmitter access conflict.\n");
749
return -1;
750
}
751
dev->tbusy = 1;
752
#endif
753
754
skblen = skb->len;
755
756
save_and_cli(flags);
757
758
if (!TX_BUFFS_AVAIL(lp)) {
759
restore_flags(flags);
760
return -1;
761
}
762
763
len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
764
765
entry = lp->tx_new & TX_RING_MOD_MASK;
766
ib->btx_ring [entry].length = (-len) | 0xf000;
767
ib->btx_ring [entry].misc = 0;
768
769
bcopy(skb->data, (char *)&ib->tx_buf [entry][0], skblen);
770
771
/* Clear the slack of the packet, do I need this? */
772
/* For a firewall its a good idea - AC */
773
if (len != skblen)
774
bzero((char *) &ib->tx_buf [entry][skblen], len - skblen);
775
776
/* Now, give the packet to the lance */
777
ib->btx_ring [entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
778
lp->tx_new = (lp->tx_new+1) & TX_RING_MOD_MASK;
779
780
outs++;
781
/* Kick the lance: transmit now */
782
ll->rdp = LE_C0_INEA | LE_C0_TDMD;
783
dev->trans_start = jiffies;
784
dev_kfree_skb (skb);
785
786
if (TX_BUFFS_AVAIL(lp))
787
dev->tbusy = 0;
788
789
/* Read back CSR to invalidate the E-Cache.
790
* This is needed, because DMA_DSBL_WR_INV is set. */
791
if (lp->ledma)
792
flush = ll->rdp;
793
794
restore_flags(flags);
795
return status;
796
}
797
798
static int
799
le_init(struct le_private *le, struct le_info *info, int instance)
800
{
801
struct device *dev = &le->edev;
802
volatile struct lance_regs *ll;
803
int i;
804
805
le->inst = instance;
806
le->lename[0] = 'l';
807
le->lename[1] = 'e';
808
le->lename[2] = instance + '0';
809
le->lename[3] = '\0';
810
811
printk ("%s: LANCE ", le->lename);
812
/* Copy the IDPROM ethernet address to the device structure, later we
813
* will copy the address in the device structure to the lance
814
* initialization block.
815
*/
816
for (i = 0; i < 6; i++)
817
printk ("%x%c", dev->dev_addr[i] = idprom[i + 2],
818
i == 5 ? ' ': ':');
819
printk("\n");
820
821
/* Get the IO region */
822
ll = map_io(info->physaddr[1], sizeof (struct lance_regs));
823
if (ll == 0) return -1;
824
825
#if 0
826
/* Make certain the data structures used by the LANCE are aligned. */
827
dev->priv = (void *)(((unsigned long)dev->priv + 7) & ~7);
828
#endif
829
830
#if 0
831
lp->sbus = sdev->my_bus;
832
if (lebuffer){
833
prom_apply_sbus_ranges (lebuffer->my_bus,
834
&lebuffer->reg_addrs [0],
835
lebuffer->num_registers,
836
lebuffer);
837
838
le->init_block = (void *)
839
sparc_alloc_io (lebuffer->reg_addrs [0].phys_addr, 0,
840
sizeof (struct lance_init_block), "lebuffer",
841
lebuffer->reg_addrs [0].which_io, 0);
842
le->init_block_dvma = 0;
843
844
le->pio_buffer = 1;
845
} else {
846
#endif
847
le->init_block = dvma_alloc(sizeof (struct lance_init_block),
848
&le->init_block_dvma);
849
le->pio_buffer = 0;
850
#if 0
851
}
852
#endif
853
le->busmaster_regval = (LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON);
854
le->ll = ll;
855
le->ledma = info->ledma;
856
le->irq = info->intr;
857
858
le->burst_sizes = 0;
859
if (le->ledma) {
860
/* Find burst-size property for ledma */
861
le->burst_sizes = info->ledma->bursizes;
862
863
/* Get the cable-selection property */
864
if (info->tpe == 0) {
865
printk("le%d: using auto-carrier-detection.\n",
866
le->inst);
867
le->auto_select = 1;
868
le->tpe = 0;
869
} else if (info->tpe == 1) {
870
le->auto_select = 0;
871
le->tpe = 0;
872
} else {
873
le->auto_select = 0;
874
le->tpe = 1;
875
printk("le%d: using TPE.\n", le->inst);
876
}
877
878
/* Reset ledma */
879
le->ledma->regs->cond_reg |= DMA_RST_ENET;
880
udelay (200);
881
le->ledma->regs->cond_reg &= ~DMA_RST_ENET;
882
}
883
884
/* This should never happen. */
885
if ((unsigned long)(le->init_block->brx_ring) & 0x07) {
886
printk("%s: ERROR: Rx and Tx rings not on even boundary.\n",
887
dev->name);
888
return -1;
889
}
890
891
dev->name = le->lename;
892
dev->priv = le;
893
dev->open = &lance_open;
894
dev->stop = &lance_close;
895
dev->hard_start_xmit = &lance_start_xmit;
896
ether_setup (dev);
897
898
return 0;
899
}
900
901
static int ledma_init(struct le_dma *ledma)
902
{
903
void *p;
904
905
/* Hardcode everything for MrCoffee. */
906
if ((p = map_io(PHYS_JJ_LEDMA, 0x10)) == 0) {
907
printk("ledma_init: cannot map registers\n");
908
return -1;
909
}
910
ledma->regs = p;
911
ledma->bursizes = 0x3F;
912
913
printk("dma0: ");
914
915
switch((ledma->regs->cond_reg)&DMA_DEVICE_ID) {
916
case DMA_VERS0:
917
ledma->revision=dvmarev0;
918
printk("Revision 0 ");
919
break;
920
case DMA_ESCV1:
921
ledma->revision=dvmaesc1;
922
printk("ESC Revision 1 ");
923
break;
924
case DMA_VERS1:
925
ledma->revision=dvmarev1;
926
printk("Revision 1 ");
927
break;
928
case DMA_VERS2:
929
ledma->revision=dvmarev2;
930
printk("Revision 2 ");
931
break;
932
case DMA_VERHME:
933
ledma->revision=dvmahme;
934
printk("HME DVMA gate array ");
935
break;
936
case DMA_VERSPLUS:
937
ledma->revision=dvmarevplus;
938
printk("Revision 1 PLUS ");
939
break;
940
default:
941
printk("unknown dma version %x",
942
(ledma->regs->cond_reg)&DMA_DEVICE_ID);
943
/* ledma->allocated = 1; */
944
break;
945
}
946
printk("\n");
947
return 0;
948
}
949
950
/*
951
* Find all the lance cards on the system and initialize them
952
*/
953
void le_probe ()
954
{
955
956
/* Hardcode everything for MrCoffee. */
957
le_node0.physaddr[0] = 0;
958
le_node0.physaddr[1] = PHYS_JJ_LE;
959
le_node0.physaddr[3] = 4;
960
le_node0.tpe = 2;
961
le_node0.intr = 6; /* 0x26 - OBIO? */
962
963
if (le_arena[0].active) {
964
printk("le_probe: no free le\n");
965
return;
966
}
967
968
if (ledma_init(&ledma0) != 0) {
969
return;
970
}
971
le_node0.ledma = &ledma0;
972
973
if (le_init(&le_arena[0], &le_node0, 0) != 0) {
974
printk("le_probe: le0 init failed\n");
975
return;
976
}
977
le_arena[0].active = 1;
978
return;
979
}
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Version: 2.0.1