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  • Committer: Package Import Robot
  • Author(s): Joe Nahmias
  • Date: 2014-03-02 19:22:04 UTC
  • mfrom: (1.1.1)
  • Revision ID: package-import@ubuntu.com-20140302192204-9f0aehi5stfnhn7d
Tags: 2.2.2+dfsg0-1
* Imported Upstream version 2.2.2
  + remove patches merged upstream; refresh remaining
  + remove windows compiled help files and non-free Visual C files
* Use C++11 standard static assertion functionality
* fix upstream installation of support files
* New patch 0004-ignore-missing-windows-help-CHM-file.patch
* update d/copyright for new, renamed, deleted files
* d/control: bump std-ver to 3.9.5, no changes needed

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/* FCE Ultra - NES/Famicom Emulator
2
 
 *
3
 
 * Copyright notice for this file:
4
 
 *  Copyright (C) 2005 CaH4e3
5
 
 *
6
 
 * This program is free software; you can redistribute it and/or modify
7
 
 * it under the terms of the GNU General Public License as published by
8
 
 * the Free Software Foundation; either version 2 of the License, or
9
 
 * (at your option) any later version.
10
 
 *
11
 
 * This program is distributed in the hope that it will be useful,
12
 
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13
 
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
 
 * GNU General Public License for more details.
15
 
 *
16
 
 * You should have received a copy of the GNU General Public License
17
 
 * along with this program; if not, write to the Free Software
18
 
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
19
 
 *
20
 
 * VRC-5 (CAI Shogakko no Sansu)
21
 
 *
22
 
 */
23
 
 
24
 
#include "mapinc.h"
25
 
 
26
 
static uint8 QTAINTRAM[2048];
27
 
static writefunc old2007wrap;
28
 
 
29
 
static uint16 CHRSIZE = 8192;
30
 
static uint16 WRAMSIZE = 8192 + 4096;
31
 
static uint8 *CHRRAM = NULL;
32
 
static uint8 *WRAM = NULL;
33
 
 
34
 
static uint8 IRQa, K4IRQ;
35
 
static uint32 IRQLatch, IRQCount;
36
 
 
37
 
static uint8 regs[16];
38
 
//static uint8 test[8];
39
 
static SFORMAT StateRegs[] =
40
 
{
41
 
        { &IRQCount, 1, "IRQC" },
42
 
        { &IRQLatch, 1, "IRQL" },
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        { &IRQa, 1, "IRQA" },
44
 
        { &K4IRQ, 1, "KIRQ" },
45
 
        { regs, 16, "REGS" },
46
 
        { 0 }
47
 
};
48
 
 
49
 
static void chrSync(void) {
50
 
        setchr4r(0x10, 0x0000, regs[5] & 1);
51
 
        setchr4r(0x10, 0x1000, 0);
52
 
}
53
 
 
54
 
static void Sync(void) {
55
 
        chrSync();
56
 
//      if(regs[0xA]&0x10)
57
 
//      {
58
 
/*              setchr1r(0x10,0x0000,(((regs[5]&1))<<2)+0);
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                setchr1r(0x10,0x0400,(((regs[5]&1))<<2)+1);
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                setchr1r(0x10,0x0800,(((regs[5]&1))<<2)+2);
61
 
                setchr1r(0x10,0x0c00,(((regs[5]&1))<<2)+3);
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                setchr1r(0x10,0x1000,0);
63
 
                setchr1r(0x10,0x1400,1);
64
 
                setchr1r(0x10,0x1800,2);
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                setchr1r(0x10,0x1c00,3);*/
66
 
/*              setchr1r(0x10,0x0000,(((regs[5]&1))<<2)+0);
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                setchr1r(0x10,0x0400,(((regs[5]&1))<<2)+1);
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                setchr1r(0x10,0x0800,(((regs[5]&1))<<2)+2);
69
 
                setchr1r(0x10,0x0c00,(((regs[5]&1))<<2)+3);
70
 
                setchr1r(0x10,0x1000,(((regs[5]&1)^1)<<2)+4);
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                setchr1r(0x10,0x1400,(((regs[5]&1)^1)<<2)+5);
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                setchr1r(0x10,0x1800,(((regs[5]&1)^1)<<2)+6);
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                setchr1r(0x10,0x1c00,(((regs[5]&1)^1)<<2)+7);
74
 
*/
75
 
//      }
76
 
//      else
77
 
//      {
78
 
/*
79
 
                setchr1r(0x10,0x0000,(((regs[5]&1)^1)<<2)+0);
80
 
                setchr1r(0x10,0x0400,(((regs[5]&1)^1)<<2)+1);
81
 
                setchr1r(0x10,0x0800,(((regs[5]&1)^1)<<2)+2);
82
 
                setchr1r(0x10,0x0c00,(((regs[5]&1)^1)<<2)+3);
83
 
                setchr1r(0x10,0x1000,(((regs[5]&1))<<2)+4);
84
 
                setchr1r(0x10,0x1400,(((regs[5]&1))<<2)+5);
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                setchr1r(0x10,0x1800,(((regs[5]&1))<<2)+6);
86
 
                setchr1r(0x10,0x1c00,(((regs[5]&1))<<2)+7);
87
 
//      }
88
 
//*/
89
 
/*              setchr1r(1,0x0000,test[0]);
90
 
                setchr1r(1,0x0400,test[1]);
91
 
                setchr1r(1,0x0800,test[2]);
92
 
                setchr1r(1,0x0c00,test[3]);
93
 
                setchr1r(1,0x1000,test[4]);
94
 
                setchr1r(1,0x1400,test[5]);
95
 
                setchr1r(1,0x1800,test[6]);
96
 
                setchr1r(1,0x1c00,test[7]);
97
 
*/
98
 
        setprg4r(0x10, 0x6000, regs[0] & 1);
99
 
        if (regs[2] >= 0x40)
100
 
                setprg8r(1, 0x8000, (regs[2] - 0x40));
101
 
        else
102
 
                setprg8r(0, 0x8000, (regs[2] & 0x3F));
103
 
        if (regs[3] >= 0x40)
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                setprg8r(1, 0xA000, (regs[3] - 0x40));
105
 
        else
106
 
                setprg8r(0, 0xA000, (regs[3] & 0x3F));
107
 
        if (regs[4] >= 0x40)
108
 
                setprg8r(1, 0xC000, (regs[4] - 0x40));
109
 
        else
110
 
                setprg8r(0, 0xC000, (regs[4] & 0x3F));
111
 
 
112
 
        setprg8r(1, 0xE000, ~0);
113
 
        setmirror(MI_V);
114
 
}
115
 
 
116
 
/*static DECLFW(TestWrite)
117
 
{
118
 
        test[A&7] = V;
119
 
        Sync();
120
 
}*/
121
 
 
122
 
static DECLFW(M190Write) {
123
 
//      FCEU_printf("write %04x:%04x %d, %d\n",A,V,scanline,timestamp);
124
 
        regs[(A & 0x0F00) >> 8] = V;
125
 
        switch (A) {
126
 
        case 0xd600: IRQLatch &= 0xFF00; IRQLatch |= V; break;
127
 
        case 0xd700: IRQLatch &= 0x00FF; IRQLatch |= V << 8; break;
128
 
        case 0xd900: IRQCount = IRQLatch; IRQa = V & 2; K4IRQ = V & 1; X6502_IRQEnd(FCEU_IQEXT); break;
129
 
        case 0xd800: IRQa = K4IRQ; X6502_IRQEnd(FCEU_IQEXT); break;
130
 
        }
131
 
        Sync();
132
 
}
133
 
 
134
 
static DECLFR(M190Read) {
135
 
//      FCEU_printf("read  %04x:%04x %d, %d\n",A,regs[(A&0x0F00)>>8],scanline,timestamp);
136
 
        return regs[(A & 0x0F00) >> 8] + regs[0x0B];
137
 
}
138
 
static void VRC5IRQ(int a) {
139
 
        if (IRQa) {
140
 
                IRQCount += a;
141
 
                if (IRQCount & 0x10000) {
142
 
                        X6502_IRQBegin(FCEU_IQEXT);
143
 
                        IRQCount = IRQLatch;
144
 
                }
145
 
        }
146
 
}
147
 
 
148
 
//static void Mapper190_PPU(uint32 A)
149
 
//{
150
 
//      if(A<0x2000)
151
 
//              setchr4r(0x10,0x1000,QTAINTRAM[A&0x1FFF]&1);
152
 
//      else
153
 
//              chrSync();
154
 
//}
155
 
 
156
 
static DECLFW(M1902007Wrap) {
157
 
        if (A >= 0x2000) {
158
 
                if (regs[0xA] & 1)
159
 
                        QTAINTRAM[A & 0x1FFF] = V;
160
 
                else
161
 
                        old2007wrap(A, V);
162
 
        }
163
 
}
164
 
 
165
 
 
166
 
static void M190Power(void) {
167
 
/*      test[0]=0;
168
 
        test[1]=1;
169
 
        test[2]=2;
170
 
        test[3]=3;
171
 
        test[4]=4;
172
 
        test[5]=5;
173
 
        test[6]=6;
174
 
        test[7]=7;
175
 
*/
176
 
        setprg4r(0x10, 0x7000, 2);
177
 
 
178
 
        old2007wrap = GetWriteHandler(0x2007);
179
 
        SetWriteHandler(0x2007, 0x2007, M1902007Wrap);
180
 
 
181
 
        SetReadHandler(0x6000, 0xFFFF, CartBR);
182
 
//      SetWriteHandler(0x5000,0x5007,TestWrite);
183
 
        SetWriteHandler(0x6000, 0x7FFF, CartBW);
184
 
        SetWriteHandler(0x8000, 0xFFFF, M190Write);
185
 
        SetReadHandler(0xDC00, 0xDC00, M190Read);
186
 
        SetReadHandler(0xDD00, 0xDD00, M190Read);
187
 
        Sync();
188
 
}
189
 
 
190
 
static void M190Close(void) {
191
 
        if (CHRRAM)
192
 
                FCEU_gfree(CHRRAM);
193
 
        CHRRAM = NULL;
194
 
        if (WRAM)
195
 
                FCEU_gfree(WRAM);
196
 
        WRAM = NULL;
197
 
}
198
 
 
199
 
static void StateRestore(int version) {
200
 
        Sync();
201
 
}
202
 
 
203
 
void Mapper190_Init(CartInfo *info) {
204
 
        info->Power = M190Power;
205
 
        info->Close = M190Close;
206
 
        GameStateRestore = StateRestore;
207
 
 
208
 
        MapIRQHook = VRC5IRQ;
209
 
//      PPU_hook=Mapper190_PPU;
210
 
 
211
 
        CHRRAM = (uint8*)FCEU_gmalloc(CHRSIZE);
212
 
        SetupCartCHRMapping(0x10, CHRRAM, CHRSIZE, 1);
213
 
        AddExState(CHRRAM, CHRSIZE, 0, "CRAM");
214
 
 
215
 
        WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
216
 
        SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
217
 
        AddExState(WRAM, WRAMSIZE, 0, "WRAM");
218
 
 
219
 
        if (info->battery) {
220
 
                info->SaveGame[0] = WRAM;
221
 
                info->SaveGameLen[0] = WRAMSIZE - 4096;
222
 
        }
223
 
 
224
 
        AddExState(&StateRegs, ~0, 0, 0);
225
 
}