2
* Purpose: Driver for Creative Audigy LS audio controller
4
* This sound card has been sold under many different names.
8
* This file is part of Open Sound System.
10
* Copyright (C) 4Front Technologies 1996-2008.
12
* This this source file is released under GPL v2 license (no other versions).
13
* See the COPYING file included in the main directory of this source
14
* distribution for the license terms and conditions.
18
#include "oss_audigyls_cfg.h"
21
#include "midi_core.h"
24
#define DEFAULT_RATE 48000
28
#define PCI_VENDOR_ID_CREATIVE 0x1102
29
#define PCI_DEVICE_ID_CREATIVE_AUDIGYLS 0x0007
56
#define RCD 0x050 /* 0x50-0z5f */
57
#define P17RECSEL 0x060
58
#define P17RECVOLL 0x061
59
#define P17RECVOLH 0x062
61
#define HMIXMAP_SPDIF 0x63
62
#define SMIXMAP_SPDIF 0x64
63
#define MIXCTL_SPDIF 0x65
64
#define MIXVOL_SPDIF 0x66
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#define HMIXMAP_I2S 0x67
66
#define SMIXMAP_I2S 0x68
67
#define MIXCTL_I2S 0x69
68
#define MIXVOL_I2S 0x6a
80
#define AINT_ENABLE 0x075
81
#define AINT_STATUS 0x076
91
* Global Interrupt bits
95
#define INTR_PCI (1<< 0)
96
#define INTR_TXA (1<< 1)
97
#define INTR_RXA (1<< 2)
98
#define INTR_IT1 (1<< 3)
99
#define INTR_IT2 (1<< 4)
100
#define INTR_SS_ (1<< 5)
101
#define INTR_SRT (1<< 6)
102
#define INTR_GP (1<< 7)
103
#define INTR_AI (1<< 8)
104
#define INTR_I2Cdac (1<< 9)
105
#define INTR_I2CEE (1<< 10)
106
#define INTR_SPI (1<< 11)
107
#define INTR_SPF (1<< 12)
108
#define INTR_SUO (1<< 13)
109
#define INTR_SUI (1<< 14)
110
#define INTR_TXB (1<< 16)
111
#define INTR_RXB (1<< 17)
114
* Audio interrupt bits
117
#define AI_PFH (1<< 0)
118
#define AI_PFF (1<< 4)
119
#define AI_TFH (1<< 8)
120
#define AI_TFF (1<< 12)
121
#define AI_RFH (1<< 16)
122
#define AI_RFF (1<< 20)
123
#define AI_EAI (1<< 24)
128
extern int audigyls_spdif_enable;
145
int play_ptr, rec_ptr;
152
oss_native_word base;
154
oss_mutex_t low_mutex;
156
unsigned int subvendor;
157
int rec_src; /* record channel src spdif/i2s/ac97/src */
158
#define RECSEL_SPDIFOUT 0
159
#define RECSEL_I2SOUT 1
160
#define RECSEL_SPDIFIN 2
161
#define RECSEL_I2SIN 3
162
#define RECSEL_AC97 4
168
int spread; /* copy front to surr/center channels */
169
int loopback; /* record channel input from /dev/dspXX */
170
int input_source; /* input from mic/line/aux/etc */
171
int captmon; /* hear what you record*/
172
int fbvol; /* recording monitor volume */
176
oss_midi_inputbyte_t midi_input_intr;
177
int midi_opened, midi_disabled;
178
volatile unsigned char input_byte;
183
audigyls_portc portc[MAX_PORTC];
189
static void audigylsuartintr (audigyls_devc * devc);
192
read_reg (audigyls_devc * devc, int reg, int chn)
194
oss_native_word flags;
197
MUTEX_ENTER_IRQDISABLE (devc->low_mutex, flags);
198
OUTL (devc->osdev, (reg << 16) | (chn & 0xffff), devc->base + 0x00); /* Pointer */
199
val = INL (devc->osdev, devc->base + 0x04); /* Data */
200
MUTEX_EXIT_IRQRESTORE (devc->low_mutex, flags);
202
/*printk("Read reg %03x (ch %d) = %08x\n", reg, chn, val);*/
207
write_reg (audigyls_devc * devc, int reg, int chn, unsigned int value)
209
oss_native_word flags;
211
/*printk("Write reg %03x (ch %d) = %08x\n", reg, chn, value); */
212
MUTEX_ENTER_IRQDISABLE (devc->low_mutex, flags);
213
OUTL (devc->osdev, (reg << 16) | (chn & 0xffff), devc->base + 0x00); /* Pointer */
214
OUTL (devc->osdev, value, devc->base + 0x04); /* Data */
215
MUTEX_EXIT_IRQRESTORE (devc->low_mutex, flags);
220
sprintf (tmp, "@w%d %04x/%s %x", chn, reg, emu_regname (reg, &ok), value);
229
audigyls_ac97_read (void *devc_, int wAddr)
231
audigyls_devc *devc = devc_;
234
oss_native_word flags;
236
MUTEX_ENTER_IRQDISABLE (devc->low_mutex, flags);
237
OUTB (devc->osdev, wAddr, devc->base + 0x1e);
238
for (i = 0; i < 10000; i++)
239
if (INB (devc->osdev, devc->base + 0x1e) & 0x80)
243
MUTEX_EXIT_IRQRESTORE (devc->low_mutex, flags);
246
dtemp = INW (devc->osdev, devc->base + 0x1c);
247
MUTEX_EXIT_IRQRESTORE (devc->low_mutex, flags);
249
return dtemp & 0xffff;
253
audigyls_ac97_write (void *devc_, int wAddr, int wData)
255
audigyls_devc *devc = devc_;
256
oss_native_word flags;
259
MUTEX_ENTER_IRQDISABLE (devc->low_mutex, flags);
260
OUTB (devc->osdev, wAddr, devc->base + 0x1e);
261
for (i = 0; i < 10000; i++)
262
if (INB (devc->osdev, devc->base + 0x1e) & 0x80)
266
MUTEX_EXIT_IRQRESTORE (devc->low_mutex, flags);
269
OUTW (devc->osdev, wData, devc->base + 0x1c);
270
MUTEX_EXIT_IRQRESTORE (devc->low_mutex, flags);
276
check_recording_intr (audigyls_devc * devc, audigyls_portc * portc)
282
dmap = audio_engines[portc->audio_dev]->dmap_in;
284
pos = read_reg (devc, CRFA, portc->rec_port);
285
pos /= dmap->fragment_size;
286
while (dmap_get_qtail (dmap) != pos && n++ < dmap->nfrags)
288
oss_audio_inputintr (portc->audio_dev, 0);
292
check_playback_intr (audigyls_devc * devc, audigyls_portc * portc)
298
dmap = audio_engines[portc->audio_dev]->dmap_out;
300
pos = read_reg (devc, CPFA, portc->play_port);
301
pos /= dmap->fragment_size;
302
while (dmap_get_qhead (dmap) != pos && n++ < dmap->nfrags)
304
oss_audio_outputintr (portc->audio_dev, 0);
308
audigylsintr (oss_device_t * osdev)
312
unsigned int astatus = 0;
314
audigyls_devc *devc = osdev->devc;
315
audigyls_portc *portc;
316
oss_native_word flags;
318
flags = 0; /* To fix compiler warnings about unused variable */
319
MUTEX_ENTER (devc->mutex, flags);
321
status = INL (devc->osdev, devc->base + 0x08);
323
if (status & INTR_RXA) /* MIDI RX interrupt */
325
audigylsuartintr (devc);
328
if (status & INTR_AI)
330
astatus = read_reg (devc, AINT_STATUS, 0);
331
for (i = 0; i < MAX_PORTC; i++)
333
portc = &devc->portc[i];
335
if ((portc->trigger_bits & PCM_ENABLE_OUTPUT) &&
336
(astatus & ((AI_PFF | AI_PFH) << portc->play_port)))
338
dmap_t *dmap = audio_engines[portc->audio_dev]->dmap_out;
340
if (astatus & (AI_PFF << portc->play_port))
342
if (astatus & (AI_PFH << portc->play_port))
343
portc->play_ptr = dmap->bytes_in_use / 2;
345
oss_audio_outputintr (portc->audio_dev, 0);
347
if ((portc->trigger_bits & PCM_ENABLE_INPUT) &&
348
(astatus & ((AI_RFF | AI_RFH) << portc->rec_port)))
350
dmap_t *dmap = audio_engines[portc->audio_dev]->dmap_in;
352
if (astatus & (AI_RFF << portc->rec_port))
354
if (astatus & (AI_RFH << portc->rec_port))
355
portc->rec_ptr = dmap->bytes_in_use / 2;
357
oss_audio_inputintr (portc->audio_dev, 0);
360
write_reg (devc, AINT_STATUS, 0, astatus);
363
if (status & INTR_IT1)
365
for (i = 0; i < MAX_PORTC; i++)
367
portc = &devc->portc[i];
369
if ((portc->trigger_bits & PCM_ENABLE_OUTPUT))
370
check_playback_intr (devc, portc);
372
if ((portc->trigger_bits & PCM_ENABLE_INPUT))
373
check_recording_intr (devc, portc);
378
OUTL (devc->osdev, status, devc->base + 0x08); /* Acknowledge */
379
MUTEX_EXIT (devc->mutex, flags);
384
audigyls_set_rate (int dev, int arg)
386
audigyls_portc *portc = audio_engines[dev]->portc;
391
if (audio_engines[dev]->flags & ADEV_FIXEDRATE)
394
if (arg != 44100 && arg != 48000 && arg != 96000 && arg != 192000)
402
audigyls_set_channels (int dev, short arg)
404
audigyls_portc *portc = audio_engines[dev]->portc;
407
return portc->channels;
412
if (portc->open_mode & OPEN_READ)
413
return portc->channels = 2;
415
if (arg != 1 && arg != 2)
416
return portc->channels = 2;
417
return portc->channels = arg;
421
audigyls_set_format (int dev, unsigned int arg)
423
audigyls_portc *portc = audio_engines[dev]->portc;
428
if (arg != AFMT_AC3 && arg != AFMT_S16_LE)
429
return portc->bits = AFMT_S16_LE;
431
return portc->bits = arg;
436
audigyls_ioctl (int dev, unsigned int cmd, ioctl_arg arg)
441
static void audigyls_trigger (int dev, int state);
444
audigyls_reset (int dev)
446
audigyls_trigger (dev, 0);
451
audigyls_open (int dev, int mode, int open_flags)
453
audigyls_portc *portc = audio_engines[dev]->portc;
454
audigyls_devc *devc = audio_engines[dev]->devc;
455
oss_native_word flags;
457
MUTEX_ENTER_IRQDISABLE (devc->mutex, flags);
458
if (portc->open_mode)
460
MUTEX_EXIT_IRQRESTORE (devc->mutex, flags);
463
portc->open_mode = mode;
464
portc->audio_enabled = ~mode;
465
portc->play_ptr = portc->rec_ptr = 0;
467
MUTEX_EXIT_IRQRESTORE (devc->mutex, flags);
472
audigyls_close (int dev, int mode)
474
audigyls_portc *portc = audio_engines[dev]->portc;
476
audigyls_reset (dev);
477
portc->open_mode = 0;
478
portc->audio_enabled &= ~mode;
483
audigyls_output_block (int dev, oss_native_word buf, int count, int fragsize,
490
audigyls_start_input (int dev, oss_native_word buf, int count, int fragsize,
493
audigyls_portc *portc = audio_engines[dev]->portc;
495
portc->audio_enabled |= PCM_ENABLE_INPUT;
496
portc->trigger_bits &= ~PCM_ENABLE_INPUT;
501
check_itimer (audigyls_devc * devc)
504
unsigned int t = 0x1fffffff;
505
audigyls_portc *portc;
508
for (i = 0; i < MAX_PORTC; i++)
510
portc = &devc->portc[i];
511
if (portc->frag_192khz != 0 && portc->frag_192khz < t)
512
t = portc->frag_192khz;
514
if (t == 0x1fffffff) /* No audio devices active */
516
tmp = INL (devc->osdev, devc->base + IE);
518
OUTL (devc->osdev, tmp, devc->base + IE);
525
write_reg (devc, IT, 0, t);
526
tmp = INL (devc->osdev, devc->base + IE);
528
OUTL (devc->osdev, tmp, devc->base + IE);
533
adjust_itimer (audigyls_devc * devc, audigyls_portc * portc, dmap_p dmap)
537
/* Compute byte rate */
539
t = portc->speed * portc->channels;
557
/* Compute the number of 192kHz ticks per fragment */
559
t = (dmap->fragment_size * 192000) / t; /* msecs / fragment */
563
portc->frag_192khz = t;
569
audigyls_trigger (int dev, int state)
571
audigyls_devc *devc = audio_engines[dev]->devc;
572
audigyls_portc *portc = audio_engines[dev]->portc;
574
oss_native_word flags;
576
MUTEX_ENTER_IRQDISABLE (devc->mutex, flags);
578
if (portc->open_mode & OPEN_WRITE)
580
if (state & PCM_ENABLE_OUTPUT)
582
if ((portc->audio_enabled & PCM_ENABLE_OUTPUT) &&
583
!(portc->trigger_bits & PCM_ENABLE_OUTPUT))
585
tmp = read_reg (devc, SA, 0);
586
tmp |= 1 << portc->play_port;
587
write_reg (devc, SA, 0, tmp);
591
tmp = read_reg (devc, AINT_ENABLE, 0);
592
tmp |= ((AI_PFH | AI_PFF) << portc->play_port);
593
write_reg (devc, AINT_ENABLE, 0, tmp);
595
portc->trigger_bits |= PCM_ENABLE_OUTPUT;
601
if ((portc->audio_enabled & PCM_ENABLE_OUTPUT) &&
602
(portc->trigger_bits & PCM_ENABLE_OUTPUT))
604
portc->audio_enabled &= ~PCM_ENABLE_OUTPUT;
605
portc->trigger_bits &= ~PCM_ENABLE_OUTPUT;
607
portc->frag_192khz = 0;
610
/* Disable Play channel */
611
tmp = read_reg (devc, SA, 0);
612
tmp &= ~(1 << portc->play_port);
613
write_reg (devc, SA, 0, tmp);
615
tmp = read_reg (devc, AINT_ENABLE, 0);
616
tmp &= ~((AI_PFH | AI_PFF) << portc->play_port);
617
write_reg (devc, AINT_ENABLE, 0, tmp);
623
if (portc->open_mode & OPEN_READ)
625
if (state & PCM_ENABLE_INPUT)
627
if ((portc->audio_enabled & PCM_ENABLE_INPUT) &&
628
!(portc->trigger_bits & PCM_ENABLE_INPUT))
630
/* Enable Rec Channel */
631
tmp = read_reg (devc, SA, 0);
632
tmp |= 0x100 << portc->rec_port; /* enable record */
633
write_reg (devc, SA, 0, tmp);
637
tmp = read_reg (devc, AINT_ENABLE, 0);
638
tmp |= ((AI_RFF | AI_RFH) << portc->rec_port);
639
write_reg (devc, AINT_ENABLE, 0, tmp);
641
portc->trigger_bits |= PCM_ENABLE_INPUT;
646
if ((portc->audio_enabled & PCM_ENABLE_INPUT) &&
647
(portc->trigger_bits & PCM_ENABLE_INPUT))
649
portc->audio_enabled &= ~PCM_ENABLE_INPUT;
650
portc->trigger_bits &= ~PCM_ENABLE_INPUT;
652
portc->frag_192khz = 0;
655
/* disable channel */
656
tmp = read_reg (devc, SA, 0);
657
tmp &= ~(0x100 << portc->rec_port);
658
write_reg (devc, SA, 0, tmp);
660
tmp = read_reg (devc, AINT_ENABLE, 0);
661
tmp &= ~((AI_RFF | AI_RFH) << portc->rec_port);
662
write_reg (devc, AINT_ENABLE, 0, tmp);
668
MUTEX_EXIT_IRQRESTORE (devc->mutex, flags);
673
audigyls_prepare_for_input (int dev, int bsize, int bcount)
675
unsigned int tmp, recmap, reg;
676
/*LINTED*/ unsigned int oversample;
677
audigyls_devc *devc = audio_engines[dev]->devc;
678
audigyls_portc *portc = audio_engines[dev]->portc;
679
dmap_p dmap = audio_engines[dev]->dmap_in;
680
oss_native_word flags;
682
MUTEX_ENTER_IRQDISABLE (devc->mutex, flags);
683
write_reg (devc, CRFA, portc->rec_port, 0);
684
write_reg (devc, CRCAV, portc->rec_port, 0);
686
write_reg (devc, RFBA, portc->rec_port, dmap->dmabuf_phys);
687
write_reg (devc, RFBS, portc->rec_port, (dmap->bytes_in_use) << 16);
690
tmp = INL (devc->osdev, devc->base + 0x14);
691
if (portc->bits == AFMT_S16_LE)
692
tmp &= ~0x400; /*16 bit */
694
tmp |= 0x400; /*24 bit */
695
OUTL (devc->osdev, tmp, devc->base + 0x14);
697
/* set recording speed */
698
reg = read_reg (devc, SRCTL, 0) & ~0xc000;
700
switch (portc->speed)
723
write_reg (devc, SRCTL, 0, reg);
724
/* audigyls_i2c_write(devc, 0xc, oversample);*/
726
/* setup record input */
729
devc->rec_src = RECSEL_I2SOUT;
736
devc->rec_src = RECSEL_AC97; /* audigy LS */
740
devc->rec_src = RECSEL_I2SIN; /* sb 7.1 value */
744
tmp = recmap; /* default record input map */
745
tmp |= devc->rec_src << 28 | devc->rec_src << 24 | devc->rec_src << 20 | devc->rec_src << 16;
746
//write_reg (devc, SMIXMAP_SPDIF, 0, 0x76767676);
747
write_reg (devc, P17RECSEL, 0, tmp);
748
portc->audio_enabled &= ~PCM_ENABLE_INPUT;
749
portc->trigger_bits &= ~PCM_ENABLE_INPUT;
752
adjust_itimer (devc, portc, dmap);
755
MUTEX_EXIT_IRQRESTORE (devc->mutex, flags);
762
audigyls_prepare_for_output (int dev, int bsize, int bcount)
764
audigyls_devc *devc = audio_engines[dev]->devc;
765
audigyls_portc *portc = audio_engines[dev]->portc;
766
dmap_p dmap = audio_engines[dev]->dmap_out;
767
unsigned int tmp, reg;
768
oss_native_word flags;
770
MUTEX_ENTER_IRQDISABLE (devc->mutex, flags);
771
if (portc->bits == AFMT_AC3)
774
write_reg (devc, PTBA, portc->play_port, 0);
775
write_reg (devc, PTBS, portc->play_port, 0);
776
write_reg (devc, PTCA, portc->play_port, 0);
778
write_reg (devc, CPFA, portc->play_port, 0);
779
write_reg (devc, PFEA, portc->play_port, 0);
780
write_reg (devc, CPCAV, portc->play_port, 0);
784
tmp = INL (devc->osdev, devc->base + 0x14);
785
if (portc->bits == AFMT_S16_LE)
786
tmp &= ~0x800; /*16 bit */
788
tmp |= 0x800; /*24 bit */
789
OUTL (devc->osdev, tmp, devc->base + 0x14);
791
/* set playback rate */
792
tmp = read_reg (devc, SA, 0) & ~0xff0000;
793
reg = read_reg (devc, SRCTL, 0) & ~0x0303000f;
795
switch (portc->speed)
818
tmp |= 0; /* default is 48000 */
823
write_reg (devc, SA, 0, tmp << (portc->play_port * 2));
824
write_reg (devc, SRCTL, 0, reg);
826
/* Single buffering mode */
827
write_reg (devc, PFBA, portc->play_port, dmap->dmabuf_phys);
828
write_reg (devc, PFBS, portc->play_port, (dmap->bytes_in_use) << 16);
830
if (audigyls_spdif_enable)
832
if (portc->bits == AFMT_AC3)
834
audigyls_ac97_write (devc, 0x1c, 0x8000);
835
write_reg (devc, SCS3, 0, 0x02108006); /* Non Audio */
837
write_reg (devc, SCS0, 0, 0x02108006); /* Non Audio */
838
write_reg (devc, SCS1, 0, 0x02108006); /* Non Audio */
839
write_reg (devc, SCS2, 0, 0x02108006); /* Non Audio */
844
write_reg (devc, SCS3, 0, 0x02108004); /* Audio */
846
write_reg (devc, SCS0, 0, 0x02108004); /* Audio */
847
write_reg (devc, SCS1, 0, 0x02108004); /* Audio */
848
write_reg (devc, SCS2, 0, 0x02108004); /* Audio */
852
portc->audio_enabled |= PCM_ENABLE_OUTPUT;
853
portc->trigger_bits &= ~PCM_ENABLE_OUTPUT;
856
adjust_itimer (devc, portc, dmap);
859
MUTEX_EXIT_IRQRESTORE (devc->mutex, flags);
864
audigyls_get_buffer_pointer (int dev, dmap_t * dmap, int direction)
867
audigyls_portc *portc = audio_engines[dev]->portc;
870
audigyls_devc *devc = audio_engines[dev]->devc;
872
if (direction == PCM_ENABLE_OUTPUT)
874
p = read_reg (devc, CPFA, portc->play_port);
877
if (direction == PCM_ENABLE_INPUT)
879
p = read_reg (devc, CRFA, portc->rec_port);
883
* Round to the nearest fragment boundary.
885
p = (p + dmap->fragment_size / 2);
886
p = (p / dmap->fragment_size) * dmap->fragment_size;
888
if (direction == PCM_ENABLE_OUTPUT)
890
return portc->play_ptr;
893
if (direction == PCM_ENABLE_INPUT)
895
return portc->rec_ptr;
899
return p % dmap->bytes_in_use;
902
static audiodrv_t audigyls_audio_driver = {
905
audigyls_output_block,
906
audigyls_start_input,
908
audigyls_prepare_for_input,
909
audigyls_prepare_for_output,
918
audigyls_set_channels,
923
NULL, /* audigyls_alloc_buffer, */
924
NULL, /* audigyls_free_buffer */
927
audigyls_get_buffer_pointer
931
static __inline__ int
932
audigylsuart_status (audigyls_devc * devc)
934
return read_reg (devc, MUCMDA, 0);
937
#define input_avail(devc) (!(audigylsuart_status(devc)&INPUT_AVAIL))
938
#define output_ready(devc) (!(audigylsuart_status(devc)&OUTPUT_READY))
940
audigylsuart_cmd (audigyls_devc * devc, unsigned char cmd)
942
write_reg (devc, MUCMDA, 0, cmd);
945
static __inline__ int
946
audigylsuart_read (audigyls_devc * devc)
948
return read_reg (devc, MUDATA, 0);
951
static __inline__ void
952
audigylsuart_write (audigyls_devc * devc, unsigned char byte)
954
write_reg (devc, MUDATA, 0, byte);
957
#define OUTPUT_READY 0x40
958
#define INPUT_AVAIL 0x80
960
#define MPU_RESET 0xFF
961
#define UART_MODE_ON 0x3F
963
static int reset_audigylsuart (audigyls_devc * devc);
964
static void enter_uart_mode (audigyls_devc * devc);
967
audigylsuart_input_loop (audigyls_devc * devc)
969
while (input_avail (devc))
971
unsigned char c = audigylsuart_read (devc);
974
devc->input_byte = c;
975
else if (devc->midi_opened & OPEN_READ && devc->midi_input_intr)
976
devc->midi_input_intr (devc->midi_dev, c);
981
audigylsuartintr (audigyls_devc * devc)
983
audigylsuart_input_loop (devc);
988
audigylsuart_open (int dev, int mode, oss_midi_inputbyte_t inputbyte,
989
oss_midi_inputbuf_t inputbuf,
990
oss_midi_outputintr_t outputintr)
992
audigyls_devc *devc = (audigyls_devc *) midi_devs[dev]->devc;
994
if (devc->midi_opened)
999
while (input_avail (devc))
1000
audigylsuart_read (devc);
1002
devc->midi_input_intr = inputbyte;
1003
devc->midi_opened = mode;
1004
enter_uart_mode (devc);
1005
devc->midi_disabled = 0;
1012
audigylsuart_close (int dev, int mode)
1014
audigyls_devc *devc = (audigyls_devc *) midi_devs[dev]->devc;
1015
reset_audigylsuart (devc);
1017
enter_uart_mode (devc);
1018
reset_audigylsuart (devc);
1019
devc->midi_opened = 0;
1024
audigylsuart_out (int dev, unsigned char midi_byte)
1027
audigyls_devc *devc = (audigyls_devc *) midi_devs[dev]->devc;
1028
oss_native_word flags;
1031
* Test for input since pending input seems to block the output.
1034
MUTEX_ENTER_IRQDISABLE (devc->mutex, flags);
1036
if (input_avail (devc))
1037
audigylsuart_input_loop (devc);
1039
MUTEX_EXIT_IRQRESTORE (devc->mutex, flags);
1042
* Sometimes it takes about 130000 loops before the output becomes ready
1043
* (After reset). Normally it takes just about 10 loops.
1046
for (timeout = 130000; timeout > 0 && !output_ready (devc); timeout--);
1048
if (!output_ready (devc))
1050
cmn_err (CE_WARN, "UART timeout - Device not responding\n");
1051
devc->midi_disabled = 1;
1052
reset_audigylsuart (devc);
1053
enter_uart_mode (devc);
1057
audigylsuart_write (devc, midi_byte);
1063
audigylsuart_ioctl (int dev, unsigned cmd, ioctl_arg arg)
1068
static midi_driver_t audigyls_midi_driver = {
1076
enter_uart_mode (audigyls_devc * devc)
1079
oss_native_word flags;
1081
MUTEX_ENTER_IRQDISABLE (devc->mutex, flags);
1082
for (timeout = 30000; timeout > 0 && !output_ready (devc); timeout--);
1084
devc->input_byte = 0;
1085
audigylsuart_cmd (devc, UART_MODE_ON);
1088
for (timeout = 50000; timeout > 0 && !ok; timeout--)
1089
if (devc->input_byte == MPU_ACK)
1091
else if (input_avail (devc))
1092
if (audigylsuart_read (devc) == MPU_ACK)
1095
MUTEX_EXIT_IRQRESTORE (devc->mutex, flags);
1100
attach_audigylsuart (audigyls_devc * devc)
1102
enter_uart_mode (devc);
1103
devc->midi_dev = oss_install_mididev (OSS_MIDI_DRIVER_VERSION, "AUDIGYLS", "AudigyLS UART", &audigyls_midi_driver, sizeof (midi_driver_t),
1104
0, devc, devc->osdev);
1105
devc->midi_opened = 0;
1109
reset_audigylsuart (audigyls_devc * devc)
1114
* Send the RESET command. Try again if no success at the first time.
1119
for (n = 0; n < 2 && !ok; n++)
1121
for (timeout = 30000; timeout > 0 && !output_ready (devc); timeout--);
1123
devc->input_byte = 0;
1124
audigylsuart_cmd (devc, MPU_RESET);
1127
* Wait at least 25 msec. This method is not accurate so let's make the
1128
* loop bit longer. Cannot sleep since this is called during boot.
1131
for (timeout = 50000; timeout > 0 && !ok; timeout--)
1132
if (devc->input_byte == MPU_ACK) /* Interrupt */
1134
else if (input_avail (devc))
1135
if (audigylsuart_read (devc) == MPU_ACK)
1143
audigylsuart_input_loop (devc); /*
1144
* Flush input before enabling interrupts
1152
probe_audigylsuart (audigyls_devc * devc)
1155
oss_native_word flags;
1157
DDB (cmn_err (CE_CONT, "Entered probe_audigylsuart\n"));
1159
devc->midi_input_intr = NULL;
1160
devc->midi_opened = 0;
1161
devc->input_byte = 0;
1163
MUTEX_ENTER_IRQDISABLE (devc->mutex, flags);
1164
ok = reset_audigylsuart (devc);
1165
MUTEX_EXIT_IRQRESTORE (devc->mutex, flags);
1169
DDB (cmn_err (CE_CONT, "Reset UART401 OK\n"));
1174
(CE_CONT, "Reset UART401 failed (no hardware present?).\n"));
1176
(CE_CONT, "mpu401 status %02x\n", audigylsuart_status (devc)));
1179
DDB (cmn_err (CE_CONT, "audigylsuart detected OK\n"));
1184
unload_audigylsuart (audigyls_devc * devc)
1186
reset_audigylsuart (devc);
1191
attach_mpu (audigyls_devc * devc)
1193
devc->mpu_attached = 1;
1194
attach_audigylsuart (devc);
1197
/* only for SBLive 7.1 */
1199
audigyls_i2c_write (audigyls_devc * devc, int reg, int data)
1201
int i, timeout, tmp;
1204
tmp = (reg << 9 | data) << 16; /* set the upper 16 bits */
1205
/* first write the command to the data reg */
1206
write_reg (devc, I2C_1, 0, tmp);
1207
for (i = 0; i < 20; i++)
1209
tmp = read_reg (devc, I2C_A, 0) & ~0x6fe;
1210
/* see audigyls.pdf for bits */
1211
tmp |= 0x400 | 0x100 | 0x34;
1212
write_reg (devc, I2C_A, 0, tmp);
1213
/* now wait till controller sets valid bit (0x100) to 0 */
1215
/*LINTED*/ while (1)
1217
tmp = read_reg (devc, I2C_A, 0);
1218
if ((tmp & 0x100) == 0)
1227
/* transaction aborted */
1235
audigyls_spi_write (audigyls_devc * devc, int data)
1241
tmp = read_reg (devc, SPI, 0);
1242
orig = (tmp & ~0x3ffff) | 0x30000;
1243
write_reg (devc, SPI, 0, orig | data);
1245
/* Wait for status bit to return to 0 */
1246
for (i = 0; i < 1000; i++)
1249
tmp = read_reg (devc, SPI, 0);
1250
if (!(tmp & 0x10000))
1256
if (!valid) /* Timed out */
1263
mix_scale (int left, int right, int bits)
1265
left = mix_cvt[left];
1266
right = mix_cvt[right];
1268
return ((left * ((1 << bits) - 1) / 100) << 8) | (right *
1269
((1 << bits) - 1) / 100);
1273
audigyls_set_volume (audigyls_devc * devc, int codecid, int value)
1275
audigyls_portc *portc = NULL;
1276
int left, right, i2s_vol;
1278
portc = &devc->portc[codecid];
1280
left = value & 0xff;
1281
right = (value >> 8) & 0xff;
1286
devc->playvol[codecid] = left | (right << 8);
1288
i2s_vol = 65535 - mix_scale (left, right, 8);
1289
write_reg (devc, MIXVOL_I2S, portc->play_port, (i2s_vol << 16));
1290
return devc->playvol[codecid];
1294
audigyls_mix_control (int dev, int ctrl, unsigned int cmd, int value)
1296
audigyls_devc *devc = mixer_devs[dev]->hw_devc;
1299
if (cmd == SNDCTL_MIX_READ)
1304
case 1: /* spread */
1305
value = devc->spread;
1308
case 2: /* record what you hear */
1309
value = devc->loopback;
1314
value = devc->recvol;
1319
value = devc->input_source;
1322
value = devc->captmon;
1325
value = devc->fbvol;
1329
if (cmd == SNDCTL_MIX_WRITE)
1333
case 1: /* recording source */
1334
devc->spread = value;
1336
write_reg (devc, HMIXMAP_I2S, 0, 0x10101010);
1338
write_reg (devc, HMIXMAP_I2S, 0, 0x76543210);
1341
case 2: /* record what you hear */
1342
devc->loopback = value;
1347
val = (255 - value) & 0xff;
1348
write_reg (devc, P17RECVOLL, 0,
1349
val << 24 | val << 16 | val << 8 | val);
1350
write_reg (devc, P17RECVOLH, 0,
1351
val << 24 | val << 16 | val << 8 | val);
1352
/* write_reg (devc, SRCTL, 1,
1353
0xff << 24 | 0xff << 16 | val << 8 | val); */
1354
devc->recvol = value & 0xff;
1362
case 0: /* for mic input remove GPIO */
1364
OUTL (devc->osdev, INL (devc->osdev, devc->base + 0x18) | 0x400,
1366
audigyls_i2c_write (devc, 0x15, 0x2); /* Mic */
1372
INL (devc->osdev, devc->base + 0x18) & ~0x400,
1374
audigyls_i2c_write (devc, 0x15, 0x4); /* Line */
1380
INL (devc->osdev, devc->base + 0x18) & ~0x400,
1382
audigyls_i2c_write (devc, 0x15, 0x8); /* Aux */
1386
devc->input_source = value;
1391
devc->captmon = value;
1392
/* Send analog capture to front speakers */
1394
write_reg (devc, SMIXMAP_I2S, 0, 0x76767676);
1396
write_reg (devc, SMIXMAP_I2S, 0, 0x10101010);
1401
/*Set recording monitor volume */
1402
val = (255 - value) & 0xff;
1403
write_reg (devc, SRCTL, 1, val << 8 | val);
1404
devc->fbvol = value & 0xff;
1413
audigyls_mix_init (int dev)
1416
audigyls_devc *devc = mixer_devs[dev]->hw_devc;
1418
if ((group = mixer_ext_create_group (dev, 0, "EXT")) < 0)
1421
if ((err = mixer_ext_create_control (dev, group, 1, audigyls_mix_control,
1422
MIXT_ONOFF, "Spread", 1,
1423
MIXF_READABLE | MIXF_WRITEABLE)) < 0)
1426
if ((err = mixer_ext_create_control (dev, group, 2, audigyls_mix_control,
1427
MIXT_ONOFF, "LOOPBACK", 1,
1428
MIXF_READABLE | MIXF_WRITEABLE)) < 0)
1432
if ((err = mixer_ext_create_control (dev, group, 3, audigyls_mix_control,
1433
MIXT_MONOSLIDER, "RECORDVOL", 255,
1434
MIXF_READABLE | MIXF_WRITEABLE |
1438
if (!devc->has_ac97)
1441
mixer_ext_create_control (dev, group, 4, audigyls_mix_control,
1442
MIXT_ENUM, "RECORDSRC", 3,
1443
MIXF_READABLE | MIXF_WRITEABLE)) < 0)
1445
mixer_ext_set_strings (dev, err, "MIC LINE AUX", 0);
1447
if ((err = mixer_ext_create_control (dev, group, 7, audigyls_mix_control,
1448
MIXT_MONOSLIDER, "monitorvol", 255,
1449
MIXF_READABLE | MIXF_WRITEABLE |
1452
if ((err = mixer_ext_create_control (dev, group, 5, audigyls_mix_control,
1453
MIXT_ONOFF, "RecMon", 1,
1454
MIXF_READABLE | MIXF_WRITEABLE)) < 0)
1459
static const int bindings[MAX_PORTC] = {
1461
DSP_BIND_CENTER_LFE,
1466
install_audio_devices (audigyls_devc * devc)
1471
int fmts = AFMT_S16_LE | AFMT_AC3;
1472
static char *names[] = {
1474
"AudigyLS center/lfe",
1479
if (audigyls_spdif_enable == 1)
1483
for (i = 0; i < MAX_PORTC; i++)
1485
audigyls_portc *portc = &devc->portc[i];
1488
ADEV_AUTOMODE | ADEV_16BITONLY | ADEV_STEREOONLY | ADEV_FIXEDRATE;
1493
portc->play_port = 0;
1494
portc->rec_port = 2;
1495
flags |= ADEV_DUPLEX;
1498
portc->play_port = 1;
1499
portc->rec_port = 2;
1500
flags |= ADEV_NOINPUT;
1503
portc->play_port = 3;
1504
portc->rec_port = 2;
1505
flags |= ADEV_NOINPUT;
1509
if ((adev = oss_install_audiodev (OSS_AUDIO_DRIVER_VERSION,
1513
&audigyls_audio_driver,
1514
sizeof (audiodrv_t),
1515
flags, fmts, devc, -1)) < 0)
1523
audio_engines[adev]->portc = portc;
1524
audio_engines[adev]->max_fragments = 2;
1525
audio_engines[adev]->dmabuf_alloc_flags |= DMABUF_SIZE_16BITS;
1526
audio_engines[adev]->rate_source = frontdev;
1527
audio_engines[adev]->mixer_dev = devc->mixer_dev;
1528
audio_engines[adev]->binding = bindings[i];
1529
if (audio_engines[adev]->flags & ADEV_FIXEDRATE)
1531
audio_engines[adev]->fixed_rate = DEFAULT_RATE;
1532
audio_engines[adev]->min_rate = DEFAULT_RATE;
1533
audio_engines[adev]->max_rate = DEFAULT_RATE;
1537
audio_engines[adev]->min_rate = 44100;
1538
audio_engines[adev]->max_rate = 192000;
1540
portc->audio_dev = adev;
1541
portc->open_mode = 0;
1542
devc->playvol[i] = 0x3030;
1544
portc->bits = AFMT_S16_LE;
1550
if (audigyls_spdif_enable && devc->has_ac97)
1551
remux_install ("AudigyLS 4.0 output", devc->osdev, frontdev,
1552
frontdev + 2, -1, -1);
1554
remux_install ("AudigyLS 5.1 output", devc->osdev, frontdev,
1555
frontdev + 2, frontdev + 1, -1);
1559
#ifdef CONFIG_OSS_VMIX
1561
vmix_attach_audiodev(devc->osdev, frontdev, -1, 0);
1567
select_out3_mode (audigyls_devc * devc, int mode)
1570
* Set the out3/spdif combo jack format.
1571
* mode0=analog rear/center, 1=spdif
1576
write_reg (devc, SPC, 0, 0x00000f00);
1580
write_reg (devc, SPC, 0, 0x0000000f);
1586
audigyls_mixer_ioctl (int dev, int audiodev, unsigned int cmd, ioctl_arg arg)
1588
audigyls_devc *devc = mixer_devs[dev]->devc;
1590
if (((cmd >> 8) & 0xff) == 'M')
1594
if (IOC_IS_OUTPUT (cmd))
1597
case SOUND_MIXER_RECSRC:
1601
case SOUND_MIXER_PCM:
1603
return *arg = audigyls_set_volume (devc, 0, val);
1605
case SOUND_MIXER_CENTERVOL:
1607
return *arg = audigyls_set_volume (devc, 1, val);
1609
case SOUND_MIXER_REARVOL:
1611
return *arg = audigyls_set_volume (devc, 2, val);
1614
switch (cmd & 0xff) /* Return Parameter */
1616
case SOUND_MIXER_RECSRC:
1617
case SOUND_MIXER_RECMASK:
1621
case SOUND_MIXER_DEVMASK:
1623
SOUND_MASK_PCM | SOUND_MASK_REARVOL | SOUND_MASK_CENTERVOL;
1626
case SOUND_MIXER_STEREODEVS:
1628
SOUND_MASK_PCM | SOUND_MASK_REARVOL | SOUND_MASK_CENTERVOL;
1631
case SOUND_MIXER_CAPS:
1632
return *arg = SOUND_CAP_EXCL_INPUT;
1635
case SOUND_MIXER_PCM:
1636
return *arg = devc->playvol[0];
1639
case SOUND_MIXER_CENTERVOL:
1640
return *arg = devc->playvol[2];
1643
case SOUND_MIXER_REARVOL:
1644
return *arg = devc->playvol[3];
1654
static mixer_driver_t audigyls_mixer_driver = {
1655
audigyls_mixer_ioctl
1659
oss_audigyls_attach (oss_device_t * osdev)
1661
int tmp, err, i, tries;
1662
unsigned char pci_irq_line, pci_revision;
1663
unsigned short pci_command, vendor, device;
1664
unsigned int pci_ioaddr;
1665
unsigned int subvendor;
1666
audigyls_devc *devc;
1668
static unsigned int spi_dac[] = {
1669
0x00ff, 0x02ff, 0x0400, 0x530, 0x0622, 0x08ff, 0x0aff, 0x0cff,
1670
0x0eff, 0x10ff, 0x1200, 0x1400, 0x1800, 0x1aff, 0x1cff,
1674
DDB (cmn_err (CE_WARN, "Entered AUDIGYLS probe routine\n"));
1676
pci_read_config_word (osdev, PCI_VENDOR_ID, &vendor);
1677
pci_read_config_word (osdev, PCI_DEVICE_ID, &device);
1679
if (vendor != PCI_VENDOR_ID_CREATIVE ||
1680
device != PCI_DEVICE_ID_CREATIVE_AUDIGYLS)
1683
pci_read_config_dword (osdev, 0x2c, &subvendor);
1684
pci_read_config_byte (osdev, PCI_REVISION_ID, &pci_revision);
1685
pci_read_config_word (osdev, PCI_COMMAND, &pci_command);
1686
pci_read_config_irq (osdev, PCI_INTERRUPT_LINE, &pci_irq_line);
1687
pci_read_config_dword (osdev, PCI_BASE_ADDRESS_0, &pci_ioaddr);
1690
if (pci_ioaddr == 0)
1692
cmn_err (CE_WARN, "I/O address not assigned by BIOS.\n");
1696
if (pci_irq_line == 0)
1698
cmn_err (CE_WARN, "IRQ not assigned by BIOS.\n");
1702
if ((devc = PMALLOC (osdev, sizeof (*devc))) == NULL)
1704
cmn_err (CE_WARN, "Out of memory\n");
1708
devc->osdev = osdev;
1710
devc->card_name = "AudigyLS";
1711
devc->subvendor = subvendor;
1713
pci_command |= PCI_COMMAND_MASTER | PCI_COMMAND_IO;
1714
pci_write_config_word (osdev, PCI_COMMAND, pci_command);
1716
devc->base = MAP_PCI_IOADDR (devc->osdev, 0, pci_ioaddr);
1719
MUTEX_INIT (osdev, devc->mutex, MH_DRV);
1720
MUTEX_INIT (osdev, devc->low_mutex, MH_DRV + 1);
1722
oss_register_device (osdev, devc->card_name);
1725
oss_register_interrupts (devc->osdev, 0, audigylsintr, NULL)) < 0)
1727
cmn_err (CE_WARN, "Can't register interrupt handler, err=%d\n", err);
1735
if (subvendor == 0x10021102) /* original audigyls */
1737
devc->mixer_dev = ac97_install (&devc->ac97devc, devc->card_name,
1738
audigyls_ac97_read, audigyls_ac97_write,
1741
audigyls_ac97_write (devc, 0x1c, 0x8000);
1745
devc->mixer_dev = oss_install_mixer (OSS_MIXER_DRIVER_VERSION,
1749
&audigyls_mixer_driver,
1750
sizeof (mixer_driver_t), devc);
1751
devc->has_ac97 = 0; /* no ac97 */
1752
mixer_devs[devc->mixer_dev]->hw_devc = devc;
1753
mixer_devs[devc->mixer_dev]->priority = 1; /* Possible default mixer candidate */
1756
mixer_ext_set_init_fn (devc->mixer_dev, audigyls_mix_init, 10);
1759
write_reg (devc, SCS0, 0, 0x02108504);
1760
write_reg (devc, SCS1, 0, 0x02108504);
1761
write_reg (devc, SCS2, 0, 0x02108504);
1763
write_reg (devc, SCS3, 0, 0x02108504);
1765
write_reg (devc, AUDCTL, 0, 0x0f0f003f); /* enable all outputs */
1767
select_out3_mode (devc, audigyls_spdif_enable);
1769
/**********************************************************************
1770
* In P17, there's 8 GPIO pins.
1771
* GPIO register: 0x00XXYYZZ
1772
* XX: Configure GPIO to be either GPI (0) or GPO (1).
1773
* YY: GPO values, applicable if the pin is configure to be GPO.
1774
* ZZ: GPI values, applicable if the pin is configure to be GPI.
1776
* in SB570, pin 0-4 and 6 is used as GPO and pin 5 and 7 is used as GPI.
1779
* 1 ==> Analog output
1780
* 0 ==> Digital output
1782
* 1 ==> Enable output on card
1783
* 0 ==> Diable output on card
1785
* 1 ==> Enable Mic Bias and Mic Path
1786
* 0 ==> Disable Mic Bias and Mic Path
1788
* 1 ==> Disable SPDIF-IO output
1789
* 0 ==> Enable SPDIF-IO output
1791
* DAC sampling rate selection:
1792
* Not applicable to SB570 since DAC is controlled through SPI
1794
* 1 ==> Front Panel is not connected
1795
* 0 ==> Front Panel is connected
1797
* 1 ==> Front Panel Headphone is not connected
1798
* 0 ==> Front Panel Headphone is connected
1799
***********************************************************/
1801
OUTL (devc->osdev, 0, devc->base + 0x18); /* GPIO */
1803
OUTL (devc->osdev, 0x005f03a3, devc->base + 0x18);
1806
/* for SBLive 7.1 */
1807
OUTL (devc->osdev, 0x005f4301, devc->base + 0x18);
1808
audigyls_i2c_write (devc, 0x15, 0x4);
1811
for (i = 0; i < sizeof (spi_dac); i++)
1813
if (!audigyls_spi_write (devc, spi_dac[i]) && tries < 100)
1821
OUTL (devc->osdev, INTR_PCI | INTR_RXA | INTR_AI, devc->base + IE);
1822
OUTL (devc->osdev, 0x00000009, devc->base + 0x14); /* Enable audio */
1824
tmp = read_reg (devc, SRCTL, 0);
1826
tmp |= 0xf0c81000; /* record src0/src1 from ac97 */
1828
tmp |= 0x50c81000; /* record src0/src1 from I2SIN */
1829
write_reg (devc, SRCTL, 0, tmp);
1830
write_reg (devc, HMIXMAP_I2S, 0, 0x76543210); /* default out route */
1831
install_audio_devices (devc);
1833
if (devc->has_ac97) /* only attach midi for AudigyLS */
1840
oss_audigyls_detach (oss_device_t * osdev)
1842
unsigned int status;
1843
audigyls_devc *devc = (audigyls_devc *) osdev->devc;
1845
if (oss_disable_device (osdev) < 0)
1849
write_reg (devc, SA, 0, 0);
1850
OUTL (devc->osdev, 0x00000000, devc->base + IE); /* Interrupt disable */
1851
write_reg (devc, AINT_ENABLE, 0, 0); /* Disable audio interrupts */
1852
status = INL (devc->osdev, devc->base + 0x08);
1853
OUTL (devc->osdev, status, devc->base + 0x08); /* Acknowledge */
1855
if (devc->mpu_attached)
1856
unload_audigylsuart (devc);
1858
oss_unregister_interrupts (devc->osdev);
1860
MUTEX_CLEANUP (devc->mutex);
1861
MUTEX_CLEANUP (devc->low_mutex);
1862
UNMAP_PCI_IOADDR (devc->osdev, 0);
1864
oss_unregister_device (osdev);