38
38
#if defined(COUNT_INSTR)
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inc_m32abs(&instr_count[111]);
39
inc_m32rel(&instr_count[111]);
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41
#ifdef INTERPRET_MFC1
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gencallinterp((unsigned long long)MFC1, 0);
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44
gencheck_cop1_unusable();
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mov_reg64_m64abs(RAX, (unsigned long long *)(®_cop1_simple[dst->f.r.nrd]));
45
mov_xreg64_m64rel(RAX, (unsigned long long *)(®_cop1_simple[dst->f.r.nrd]));
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mov_reg32_preg64(EBX, RAX);
47
mov_m32abs_reg32((unsigned int*)dst->f.r.rt, EBX);
47
mov_m32rel_xreg32((unsigned int*)dst->f.r.rt, EBX);
48
48
sar_reg32_imm8(EBX, 31);
49
mov_m32abs_reg32(((unsigned int*)dst->f.r.rt)+1, EBX);
49
mov_m32rel_xreg32(((unsigned int*)dst->f.r.rt)+1, EBX);
53
53
void gendmfc1(void)
55
55
#if defined(COUNT_INSTR)
56
inc_m32abs(&instr_count[112]);
56
inc_m32rel(&instr_count[112]);
58
58
#ifdef INTERPRET_DMFC1
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gencallinterp((unsigned long long)DMFC1, 0);
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61
gencheck_cop1_unusable();
62
mov_reg64_m64abs(RAX, (unsigned long long *) (®_cop1_double[dst->f.r.nrd]));
62
mov_xreg64_m64rel(RAX, (unsigned long long *) (®_cop1_double[dst->f.r.nrd]));
63
63
mov_reg32_preg64(EBX, RAX);
64
64
mov_reg32_preg64pimm32(ECX, RAX, 4);
65
mov_m32abs_reg32((unsigned int*)dst->f.r.rt, EBX);
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mov_m32abs_reg32(((unsigned int*)dst->f.r.rt)+1, ECX);
65
mov_m32rel_xreg32((unsigned int*)dst->f.r.rt, EBX);
66
mov_m32rel_xreg32(((unsigned int*)dst->f.r.rt)+1, ECX);
72
72
#if defined(COUNT_INSTR)
73
inc_m32abs(&instr_count[113]);
73
inc_m32rel(&instr_count[113]);
75
75
#ifdef INTERPRET_CFC1
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76
gencallinterp((unsigned long long)CFC1, 0);
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78
gencheck_cop1_unusable();
79
if(dst->f.r.nrd == 31) mov_reg32_m32abs(EAX, (unsigned int*)&FCR31);
80
else mov_reg32_m32abs(EAX, (unsigned int*)&FCR0);
81
mov_m32abs_reg32((unsigned int*)dst->f.r.rt, EAX);
79
if(dst->f.r.nrd == 31) mov_xreg32_m32rel(EAX, (unsigned int*)&FCR31);
80
else mov_xreg32_m32rel(EAX, (unsigned int*)&FCR0);
81
mov_m32rel_xreg32((unsigned int*)dst->f.r.rt, EAX);
82
82
sar_reg32_imm8(EAX, 31);
83
mov_m32abs_reg32(((unsigned int*)dst->f.r.rt)+1, EAX);
83
mov_m32rel_xreg32(((unsigned int*)dst->f.r.rt)+1, EAX);
89
89
#if defined(COUNT_INSTR)
90
inc_m32abs(&instr_count[114]);
90
inc_m32rel(&instr_count[114]);
92
92
#ifdef INTERPRET_MTC1
93
93
gencallinterp((unsigned long long)MTC1, 0);
95
95
gencheck_cop1_unusable();
96
mov_reg32_m32abs(EAX, (unsigned int*)dst->f.r.rt);
97
mov_reg64_m64abs(RBX, (unsigned long long *)(®_cop1_simple[dst->f.r.nrd]));
96
mov_xreg32_m32rel(EAX, (unsigned int*)dst->f.r.rt);
97
mov_xreg64_m64rel(RBX, (unsigned long long *)(®_cop1_simple[dst->f.r.nrd]));
98
98
mov_preg64_reg32(RBX, EAX);
102
102
void gendmtc1(void)
104
104
#if defined(COUNT_INSTR)
105
inc_m32abs(&instr_count[115]);
105
inc_m32rel(&instr_count[115]);
107
107
#ifdef INTERPRET_DMTC1
108
108
gencallinterp((unsigned long long)DMTC1, 0);
110
110
gencheck_cop1_unusable();
111
mov_reg32_m32abs(EAX, (unsigned int*)dst->f.r.rt);
112
mov_reg32_m32abs(EBX, ((unsigned int*)dst->f.r.rt)+1);
113
mov_reg64_m64abs(RDX, (unsigned long long *)(®_cop1_double[dst->f.r.nrd]));
111
mov_xreg32_m32rel(EAX, (unsigned int*)dst->f.r.rt);
112
mov_xreg32_m32rel(EBX, ((unsigned int*)dst->f.r.rt)+1);
113
mov_xreg64_m64rel(RDX, (unsigned long long *)(®_cop1_double[dst->f.r.nrd]));
114
114
mov_preg64_reg32(RDX, EAX);
115
115
mov_preg64pimm32_reg32(RDX, 4, EBX);
127
127
gencheck_cop1_unusable();
129
129
if (dst->f.r.nrd != 31) return;
130
mov_reg32_m32abs(EAX, (unsigned int*)dst->f.r.rt);
131
mov_m32abs_reg32((unsigned int*)&FCR31, EAX);
130
mov_xreg32_m32rel(EAX, (unsigned int*)dst->f.r.rt);
131
mov_m32rel_xreg32((unsigned int*)&FCR31, EAX);
132
132
and_eax_imm32(3);
134
134
cmp_eax_imm32(0);
136
mov_m32abs_imm32((unsigned int*)&rounding_mode, 0x33F); // 11
136
mov_m32rel_imm32((unsigned int*)&rounding_mode, 0x33F); // 11
137
137
jmp_imm_short(51); // 2
139
139
cmp_eax_imm32(1); // 5
141
mov_m32abs_imm32((unsigned int*)&rounding_mode, 0xF3F); // 11
141
mov_m32rel_imm32((unsigned int*)&rounding_mode, 0xF3F); // 11
142
142
jmp_imm_short(31); // 2
144
144
cmp_eax_imm32(2); // 5
146
mov_m32abs_imm32((unsigned int*)&rounding_mode, 0xB3F); // 11
146
mov_m32rel_imm32((unsigned int*)&rounding_mode, 0xB3F); // 11
147
147
jmp_imm_short(11); // 2
149
mov_m32abs_imm32((unsigned int*)&rounding_mode, 0x73F); // 11
149
mov_m32rel_imm32((unsigned int*)&rounding_mode, 0x73F); // 11
151
fldcw_m16abs((unsigned short*)&rounding_mode);
151
fldcw_m16rel((unsigned short*)&rounding_mode);