821
830
for (i = 0; i < smp_cpus; i++) {
822
env = cpu_init(cpu_model);
831
cpu = cpu_mips_init(cpu_model);
824
833
fprintf(stderr, "Unable to find CPU definition\n");
827
838
/* Init internal devices */
828
839
cpu_mips_irq_init_cpu(env);
829
840
cpu_mips_clock_init(env);
830
qemu_register_reset(main_cpu_reset, env);
841
qemu_register_reset(main_cpu_reset, cpu);
851
malta_fpga_init(system_memory, 0x1f000000LL, env->irq[2], serial_hds[2]);
862
malta_fpga_init(system_memory, FPGA_ADDRESS, env->irq[2], serial_hds[2]);
853
/* Load firmware in flash / BIOS unless we boot directly into a kernel. */
864
/* Load firmware in flash / BIOS. */
865
dinfo = drive_get(IF_PFLASH, 0, fl_idx);
866
#ifdef DEBUG_BOARD_INIT
868
printf("Register parallel flash %d size " TARGET_FMT_lx " at "
869
"addr %08llx '%s' %x\n",
870
fl_idx, bios_size, FLASH_ADDRESS,
871
bdrv_get_device_name(dinfo->bdrv), fl_sectors);
874
fl = pflash_cfi01_register(FLASH_ADDRESS, NULL, "mips_malta.bios",
875
BIOS_SIZE, dinfo ? dinfo->bdrv : NULL,
877
4, 0x0000, 0x0000, 0x0000, 0x0000, be);
878
bios = pflash_cfi01_get_memory(fl);
854
880
if (kernel_filename) {
855
881
/* Write a small bootloader to the flash location. */
856
bios = g_new(MemoryRegion, 1);
857
memory_region_init_ram(bios, "mips_malta.bios", BIOS_SIZE);
858
vmstate_register_ram_global(bios);
859
memory_region_set_readonly(bios, true);
860
memory_region_init_alias(bios_alias, "bios.1fc", bios, 0, BIOS_SIZE);
861
/* Map the bios at two physical locations, as on the real board. */
862
memory_region_add_subregion(system_memory, 0x1e000000LL, bios);
863
memory_region_add_subregion(system_memory, 0x1fc00000LL, bios_alias);
864
882
loaderparams.ram_size = ram_size;
865
883
loaderparams.kernel_filename = kernel_filename;
866
884
loaderparams.kernel_cmdline = kernel_cmdline;
868
886
kernel_entry = load_kernel();
869
887
write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
871
dinfo = drive_get(IF_PFLASH, 0, fl_idx);
873
/* Load firmware from flash. */
874
bios_size = 0x400000;
875
fl_sectors = bios_size >> 16;
876
#ifdef DEBUG_BOARD_INIT
877
printf("Register parallel flash %d size " TARGET_FMT_lx " at "
878
"addr %08llx '%s' %x\n",
879
fl_idx, bios_size, 0x1e000000LL,
880
bdrv_get_device_name(dinfo->bdrv), fl_sectors);
882
fl = pflash_cfi01_register(0x1e000000LL,
883
NULL, "mips_malta.bios", BIOS_SIZE,
884
dinfo->bdrv, 65536, fl_sectors,
885
4, 0x0000, 0x0000, 0x0000, 0x0000, be);
886
bios = pflash_cfi01_get_memory(fl);
887
/* Map the bios at two physical locations, as on the real board. */
888
memory_region_init_alias(bios_alias, "bios.1fc",
890
memory_region_add_subregion(system_memory, 0x1fc00000LL,
894
bios = g_new(MemoryRegion, 1);
895
memory_region_init_ram(bios, "mips_malta.bios", BIOS_SIZE);
896
vmstate_register_ram_global(bios);
897
memory_region_set_readonly(bios, true);
898
memory_region_init_alias(bios_alias, "bios.1fc",
900
/* Map the bios at two physical locations, as on the real board. */
901
memory_region_add_subregion(system_memory, 0x1e000000LL, bios);
902
memory_region_add_subregion(system_memory, 0x1fc00000LL,
889
/* Load firmware from flash. */
904
891
/* Load a BIOS image. */
905
if (bios_name == NULL)
892
if (bios_name == NULL) {
906
893
bios_name = BIOS_FILENAME;
907
895
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
909
bios_size = load_image_targphys(filename, 0x1fc00000LL,
897
bios_size = load_image_targphys(filename, FLASH_ADDRESS,
911
899
g_free(filename);
924
/* Map the BIOS at a 2nd physical location, as on the real board. */
925
memory_region_init_alias(bios_alias, "bios.1fc", bios, 0, BIOS_SIZE);
926
memory_region_add_subregion(system_memory, RESET_ADDRESS, bios_alias);
936
928
/* Board ID = 0x420 (Malta Board with CoreLV)
937
929
XXX: theoretically 0x1e000010 should map to flash and 0x1fc00010 should
938
930
map to the board ID. */
966
958
isa_bus_irqs(isa_bus, s->i8259);
967
959
pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1);
968
usb_uhci_piix4_init(pci_bus, piix4_devfn + 2);
960
pci_create_simple(pci_bus, piix4_devfn + 2, "piix4-usb-uhci");
969
961
smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100,
970
isa_get_irq(NULL, 9), NULL, 0);
962
isa_get_irq(NULL, 9), NULL, 0, NULL);
971
963
/* TODO: Populate SPD eeprom data. */
972
964
smbus_eeprom_init(smbus, 8, NULL, 0);
973
965
pit = pit_init(isa_bus, 0x40, 0, NULL);