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/*********************************************************
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* Copyright (C) 2007 VMware, Inc. All rights reserved.
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation version 2 and no later version.
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*********************************************************/
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* Definitions for UPTv1
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#define UPT1_MAX_TX_QUEUES 64
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#define UPT1_MAX_RX_QUEUES 64
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#define UPT1_MAX_INTRS (UPT1_MAX_TX_QUEUES + UPT1_MAX_RX_QUEUES)
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#include "vmware_pack_begin.h"
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struct UPT1_RingDesc {
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uint64 basePA; /* physical addr of the ring */
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uint16 size; /* # of descriptors */
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uint16 prodIdx; /* index of the descriptor the producer of the ring
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* will write to next */
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uint16 consIdx; /* index of the descriptor the consumer of the ring
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#include "vmware_pack_end.h"
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#include "vmware_pack_begin.h"
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uint64 TSOPktsTxOK; /* TSO pkts post-segmentation */
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uint64 ucastBytesTxOK;
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uint64 mcastBytesTxOK;
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uint64 bcastBytesTxOK;
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#include "vmware_pack_end.h"
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#include "vmware_pack_begin.h"
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struct UPT1_TxQueueState {
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UPT1_RingDesc dataRing;
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UPT1_RingDesc compRing;
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uint8 tcGen; /* value of the TCGEN register */
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uint8 intrIdx; /* which MSI/MSI-X vector to use for the tx queue */
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Bool stopped; /* is the queue stopped? */
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uint32 error; /* error code if the queue is stopped due to error */
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UPT1_TxStats stats; /* stats for the tx queue */
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#include "vmware_pack_end.h"
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#include "vmware_pack_begin.h"
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uint64 LROPktsRxOK; /* LRO pkts */
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uint64 LROBytesRxOK; /* bytes from LRO pkts */
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/* the following counters are for pkts from the wire, i.e., pre-LRO */
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uint64 ucastBytesRxOK;
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uint64 mcastBytesRxOK;
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uint64 bcastBytesRxOK;
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uint64 pktsRxOutOfBuf;
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#include "vmware_pack_end.h"
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#include "vmware_pack_begin.h"
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struct UPT1_RxQueueState {
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UPT1_RingDesc rxRing[2];
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UPT1_RingDesc compRing;
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uint8 rcGen; /* value of the RCGEN register */
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uint8 intrIdx; /* which MSI/MSI-X vector to use for the rx queue */
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Bool stopped; /* is the queue stopped? */
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uint32 error; /* error code if the queue is stopped due to error */
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UPT1_RxStats stats; /* stats for the rx queue */
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#include "vmware_pack_end.h"
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/* physical dev intr type */
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/* interrupt moderation level */
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#define UPT1_IML_NONE 0 /* no interrupt moderation */
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#define UPT1_IML_HIGHEST 7 /* least intr generated */
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#define UPT1_IML_ADAPTIVE 8 /* adpative intr moderation */
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typedef struct UPT1_IntrState {
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uint8 numIntrs; /* # of MSI/MSI-X vectors allocated */
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uint8 *modLevels; /* interrupt moderation level */
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uint8 *imr; /* IMR register values */
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/* values for UPT1_RSSConf.hashFunc */
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#define UPT1_RSS_HASH_TYPE_NONE 0x0
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#define UPT1_RSS_HASH_TYPE_IPV4 0x01
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#define UPT1_RSS_HASH_TYPE_TCP_IPV4 0x02
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#define UPT1_RSS_HASH_TYPE_IPV6 0x04
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#define UPT1_RSS_HASH_TYPE_TCP_IPV6 0x08
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#define UPT1_RSS_HASH_FUNC_NONE 0x0
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#define UPT1_RSS_HASH_FUNC_TOEPLITZ 0x01
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#define UPT1_RSS_MAX_KEY_SIZE 40
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#define UPT1_RSS_MAX_IND_TABLE_SIZE 128
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#include "vmware_pack_begin.h"
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struct UPT1_RSSConf {
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uint8 hashKey[UPT1_RSS_MAX_KEY_SIZE];
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uint8 indTable[UPT1_RSS_MAX_IND_TABLE_SIZE];
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#include "vmware_pack_end.h"
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#define UPT1_F_RXCSUM 0x0001 /* rx csum verification */
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#define UPT1_F_RSS 0x0002
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#define UPT1_F_RXVLAN 0x0004 /* VLAN tag stripping */
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#define UPT1_F_LRO 0x0008