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Viewing changes to pc-bios/bios-pq/0016-use-correct-mask-to-size-pci-option-rom-bar.patch

  • Committer: Bazaar Package Importer
  • Author(s): Riku Voipio, Josh Triplett, Riku Voipio
  • Date: 2009-07-29 13:28:05 UTC
  • mfrom: (1.4.1 upstream)
  • mto: (12.1.1 sid) (10.1.13 sid)
  • mto: This revision was merged to the branch mainline in revision 13.
  • Revision ID: james.westby@ubuntu.com-20090729132805-cau7rfexh7dawyb8
Tags: 0.10.50+git20090729-1
[ Josh Triplett ]
* Remove myself from Uploaders.

[ Riku Voipio ]
* new upstream RC version
* nuke all linux-user patches (applied upstream)
  06_exit_segfault
  12_signal_powerpc_support
  21_net_soopts
  30_syscall_ipc
  32_syscall_sysctl
  35_syscall_sockaddr
  48_signal_terminate
  55_unmux_socketcall
* nuke all other applied-upstream patches
  01_nostrip (better version upstream)
  07_i386_exec_name (can be reintroduced in debian/rules)
  50_linuxbios_isa_bios_ram (shouldn't be needed anymore)
  51_linuxbios_piix_ram_size (applied)
  56_dhcp (crap)
  60_ppc_ld (reintroduce if needed)
  64_ppc_asm_constraints (ditto)
  66_tls_ld.patch (ditto)
  81_compile_dtb.patch (applied upstream)
  82_qemu-img_decimal (ditto)
* move to git
* simplify build rules
* Correct my email address

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Lines of Context:
pc-bios/bios-pq/0016-use-correct-mask-to-size-pci-option-rom-bar.patch
 
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Subject: [PATCH] bios: Use the correct mask to size the PCI option ROM BAR
 
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From:   Alex Williamson <alex.williamson@hp.com>
 
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Bit 0 is the enable bit, which we not only don't want to set, but
 
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it will stick and make us think it's an I/O port resource.
 
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Signed-off-by: Alex Williamson <alex.williamson@hp.com>
 
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Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
 
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---
 
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diff --git a/bios/rombios32.c b/bios/rombios32.c
 
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index d7e18e9..f861f81 100644
 
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--- a/bios/rombios32.c
 
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+++ b/bios/rombios32.c
 
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@@ -985,11 +985,13 @@ static void pci_bios_init_device(PCIDevice *d)
 
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             int ofs;
 
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             uint32_t val, size ;
 
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-            if (i == PCI_ROM_SLOT)
 
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+            if (i == PCI_ROM_SLOT) {
 
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                 ofs = 0x30;
 
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-            else
 
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+                pci_config_writel(d, ofs, 0xfffffffe);
 
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+            } else {
 
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                 ofs = 0x10 + i * 4;
 
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-            pci_config_writel(d, ofs, 0xffffffff);
 
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+                pci_config_writel(d, ofs, 0xffffffff);
 
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+            }
 
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             val = pci_config_readl(d, ofs);
 
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             if (val != 0) {
 
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                 size = (~(val & ~0xf)) + 1;
 
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