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* Copyright (c) 2012-2015 Etnaviv Project
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sub license,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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* Wladimir J. van der Laan <laanwj@gmail.com>
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#include "etnaviv_texture.h"
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#include "hw/common.xml.h"
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#include "etnaviv_clear_blit.h"
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#include "etnaviv_context.h"
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#include "etnaviv_emit.h"
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#include "etnaviv_format.h"
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#include "etnaviv_texture_desc.h"
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#include "etnaviv_texture_state.h"
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#include "etnaviv_translate.h"
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#include "util/u_inlines.h"
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#include "util/u_memory.h"
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#include "drm-uapi/drm_fourcc.h"
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etna_bind_sampler_states(struct pipe_context *pctx, enum pipe_shader_type shader,
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unsigned start_slot, unsigned num_samplers,
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/* bind fragment sampler */
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struct etna_context *ctx = etna_context(pctx);
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struct etna_screen *screen = ctx->screen;
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case PIPE_SHADER_FRAGMENT:
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ctx->num_fragment_samplers = num_samplers;
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case PIPE_SHADER_VERTEX:
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offset = screen->specs.vertex_sampler_offset;
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assert(!"Invalid shader");
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uint32_t mask = 1 << offset;
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for (int idx = 0; idx < num_samplers; ++idx, mask <<= 1) {
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ctx->sampler[offset + idx] = samplers[idx];
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ctx->active_samplers |= mask;
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ctx->active_samplers &= ~mask;
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ctx->dirty |= ETNA_DIRTY_SAMPLERS;
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etna_configure_sampler_ts(struct etna_sampler_ts *sts, struct pipe_sampler_view *pview, bool enable)
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bool dirty = (sts->enable != enable);
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sts->TS_SAMPLER_CONFIG = 0;
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sts->TS_SAMPLER_STATUS_BASE.bo = NULL;
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struct etna_resource *rsc = etna_resource(pview->texture);
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struct etna_resource_level *lev = &rsc->levels[0];
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if (lev->clear_value != sts->TS_SAMPLER_CLEAR_VALUE)
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assert(rsc->ts_bo && lev->ts_valid);
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sts->mode = lev->ts_mode;
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sts->comp = lev->ts_compress_fmt >= 0;
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sts->TS_SAMPLER_CONFIG =
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VIVS_TS_SAMPLER_CONFIG_ENABLE |
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COND(lev->ts_compress_fmt >= 0, VIVS_TS_SAMPLER_CONFIG_COMPRESSION) |
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VIVS_TS_SAMPLER_CONFIG_COMPRESSION_FORMAT(lev->ts_compress_fmt);
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sts->TS_SAMPLER_CLEAR_VALUE = lev->clear_value;
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sts->TS_SAMPLER_CLEAR_VALUE2 = lev->clear_value >> 32;
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sts->TS_SAMPLER_STATUS_BASE.bo = rsc->ts_bo;
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sts->TS_SAMPLER_STATUS_BASE.offset = lev->ts_offset;
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sts->TS_SAMPLER_STATUS_BASE.flags = ETNA_RELOC_READ;
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/* Return true if the GPU can use sampler TS with this sampler view.
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* Sampler TS is an optimization used when rendering to textures, where
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* a resolve-in-place can be avoided when rendering has left a (valid) TS.
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etna_can_use_sampler_ts(struct pipe_sampler_view *view, int num)
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/* Can use sampler TS when:
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* - the hardware supports sampler TS.
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* - the sampler view will be bound to sampler <VIVS_TS_SAMPLER__LEN.
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* HALTI5 adds a mapping from sampler to sampler TS unit, but this is AFAIK
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* absent on earlier models.
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* - it is a texture, not a buffer.
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* - the sampler view has a supported format for sampler TS.
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* - the sampler will have one LOD, and it happens to be level 0.
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* (it is not sure if the hw supports it for other levels, but available
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* state strongly suggests only one at a time).
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* - the resource TS is valid for level 0.
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struct etna_resource *rsc = etna_resource(view->texture);
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struct etna_screen *screen = etna_screen(rsc->base.screen);
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return VIV_FEATURE(screen, chipMinorFeatures2, TEXTURE_TILED_READ) &&
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num < VIVS_TS_SAMPLER__LEN &&
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rsc->base.target != PIPE_BUFFER &&
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(rsc->levels[0].ts_compress_fmt < 0 || screen->specs.v4_compression) &&
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view->u.tex.first_level == 0 && MIN2(view->u.tex.last_level, rsc->base.last_level) == 0 &&
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rsc->levels[0].ts_valid;
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etna_update_sampler_source(struct pipe_sampler_view *view, int num)
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struct etna_resource *base = etna_resource(view->texture);
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struct etna_resource *to = base, *from = base;
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struct etna_context *ctx = etna_context(view->context);
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bool enable_sampler_ts = false;
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if (base->render && etna_resource_newer(etna_resource(base->render), base))
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from = etna_resource(base->render);
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to = etna_resource(base->texture);
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if ((to != from) && etna_resource_older(to, from)) {
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etna_copy_resource(view->context, &to->base, &from->base, 0,
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view->texture->last_level);
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to->seqno = from->seqno;
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ctx->dirty |= ETNA_DIRTY_TEXTURE_CACHES;
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} else if ((to == from) && etna_resource_needs_flush(to)) {
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if (ctx->ts_for_sampler_view && etna_can_use_sampler_ts(view, num)) {
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enable_sampler_ts = true;
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/* Do not set flush_seqno because the resolve-to-self was bypassed */
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/* Resolve TS if needed */
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etna_copy_resource(view->context, &to->base, &from->base, 0,
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view->texture->last_level);
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to->flush_seqno = from->seqno;
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ctx->dirty |= ETNA_DIRTY_TEXTURE_CACHES;
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} else if ((to == from) && (to->flush_seqno < from->seqno)) {
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to->flush_seqno = from->seqno;
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ctx->dirty |= ETNA_DIRTY_TEXTURE_CACHES;
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if (ctx->ts_for_sampler_view &&
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etna_configure_sampler_ts(ctx->ts_for_sampler_view(view), view, enable_sampler_ts)) {
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ctx->dirty |= ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_TEXTURE_CACHES;
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ctx->dirty_sampler_views |= (1 << num);
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etna_resource_sampler_compatible(struct etna_resource *res)
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if (util_format_is_compressed(res->base.format))
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struct etna_screen *screen = etna_screen(res->base.screen);
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/* This GPU supports texturing from supertiled textures? */
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if (res->layout == ETNA_LAYOUT_SUPER_TILED && VIV_FEATURE(screen, chipMinorFeatures2, SUPERTILED_TEXTURE))
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/* This GPU supports texturing from linear textures? */
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if (res->layout == ETNA_LAYOUT_LINEAR && VIV_FEATURE(screen, chipMinorFeatures1, LINEAR_TEXTURE_SUPPORT))
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/* Otherwise, only support tiled layouts */
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if (res->layout != ETNA_LAYOUT_TILED)
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/* If we have HALIGN support, we can allow for the RS padding */
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if (VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN))
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/* Non-HALIGN GPUs only accept 4x4 tile-aligned textures */
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if (res->halign != TEXTURE_HALIGN_FOUR)
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struct etna_resource *
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etna_texture_handle_incompatible(struct pipe_context *pctx, struct pipe_resource *prsc)
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struct etna_resource *res = etna_resource(prsc);
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if (!etna_resource_sampler_compatible(res)) {
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/* The original resource is not compatible with the sampler.
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* Allocate an appropriately tiled texture. */
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struct pipe_resource templat = *prsc;
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templat.bind &= ~(PIPE_BIND_DEPTH_STENCIL | PIPE_BIND_RENDER_TARGET |
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PIPE_BIND_BLENDABLE);
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etna_resource_alloc(pctx->screen, ETNA_LAYOUT_TILED,
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DRM_FORMAT_MOD_LINEAR, &templat);
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res = etna_resource(res->texture);
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set_sampler_views(struct etna_context *ctx, unsigned start, unsigned end,
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unsigned nr, bool take_ownership, struct pipe_sampler_view **views)
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uint32_t mask = 1 << start;
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uint32_t prev_active_sampler_views = ctx->active_sampler_views;
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for (i = start, j = 0; j < nr; i++, j++, mask <<= 1) {
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struct pipe_sampler_view *view = views ? views[j] : NULL;
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if (take_ownership) {
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pipe_sampler_view_reference(&ctx->sampler_view[i], NULL);
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ctx->sampler_view[i] = view;
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pipe_sampler_view_reference(&ctx->sampler_view[i], view);
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ctx->active_sampler_views |= mask;
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ctx->dirty_sampler_views |= mask;
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ctx->active_sampler_views &= ~mask;
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for (; i < end; i++, mask <<= 1) {
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pipe_sampler_view_reference(&ctx->sampler_view[i], NULL);
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ctx->active_sampler_views &= ~mask;
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/* sampler views that changed state (even to inactive) are also dirty */
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ctx->dirty_sampler_views |= ctx->active_sampler_views ^ prev_active_sampler_views;
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etna_fragtex_set_sampler_views(struct etna_context *ctx, unsigned nr,
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struct pipe_sampler_view **views)
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struct etna_screen *screen = ctx->screen;
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unsigned end = start + screen->specs.fragment_sampler_count;
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set_sampler_views(ctx, start, end, nr, take_ownership, views);
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ctx->num_fragment_sampler_views = nr;
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etna_vertex_set_sampler_views(struct etna_context *ctx, unsigned nr,
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struct pipe_sampler_view **views)
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struct etna_screen *screen = ctx->screen;
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unsigned start = screen->specs.vertex_sampler_offset;
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unsigned end = start + screen->specs.vertex_sampler_count;
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set_sampler_views(ctx, start, end, nr, take_ownership, views);
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etna_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
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unsigned start_slot, unsigned num_views,
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unsigned unbind_num_trailing_slots,
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struct pipe_sampler_view **views)
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struct etna_context *ctx = etna_context(pctx);
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assert(start_slot == 0);
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ctx->dirty |= ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_TEXTURE_CACHES;
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case PIPE_SHADER_FRAGMENT:
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etna_fragtex_set_sampler_views(ctx, num_views, take_ownership, views);
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case PIPE_SHADER_VERTEX:
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etna_vertex_set_sampler_views(ctx, num_views, take_ownership, views);
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etna_texture_barrier(struct pipe_context *pctx, unsigned flags)
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struct etna_context *ctx = etna_context(pctx);
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/* clear color and texture cache to make sure that texture unit reads
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* what has been written */
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mtx_lock(&ctx->lock);
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etna_set_state(ctx->stream, VIVS_GL_FLUSH_CACHE, VIVS_GL_FLUSH_CACHE_COLOR | VIVS_GL_FLUSH_CACHE_TEXTURE);
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mtx_unlock(&ctx->lock);
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active_samplers_bits(struct etna_context *ctx)
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return ctx->active_sampler_views & ctx->active_samplers;
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etna_texture_init(struct pipe_context *pctx)
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struct etna_context *ctx = etna_context(pctx);
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struct etna_screen *screen = ctx->screen;
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pctx->bind_sampler_states = etna_bind_sampler_states;
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pctx->set_sampler_views = etna_set_sampler_views;
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pctx->texture_barrier = etna_texture_barrier;
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if (screen->specs.halti >= 5)
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etna_texture_desc_init(pctx);
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etna_texture_state_init(pctx);