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* eepro100.c -- This file implements the eepro100 driver for etherboot.
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* Copyright (C) AW Computer Systems.
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* written by R.E.Wolff -- R.E.Wolff@BitWizard.nl
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* AW Computer Systems is contributing to the free software community
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* by paying for this driver and then putting the result under GPL.
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* If you need a Linux device driver, please contact BitWizard for a
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2, or (at
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* your option) any later version.
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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* date version by what
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* Written: May 29 1997 V0.10 REW Initial revision.
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* changes: May 31 1997 V0.90 REW Works!
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* Jun 1 1997 V0.91 REW Cleanup
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* Jun 2 1997 V0.92 REW Add some code documentation
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* Jul 25 1997 V1.00 REW Tested by AW to work in a PROM
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* Cleanup for publication
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* This is the etherboot intel etherexpress Pro/100B driver.
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* It was written from scratch, with Donald Beckers eepro100.c kernel
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* driver as a guideline. Mostly the 82557 related definitions and the
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* lower level routines have been cut-and-pasted into this source.
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* The driver was finished before Intel got the NDA out of the closet.
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* I still don't have the docs.
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/* Philosophy of this driver.
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* Using the pci.c functions of the Etherboot code, the 82557 chip is detected.
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* It is verified that the BIOS initialized everything properly and if
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* something is missing it is done now.
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* The chip is then initialized to "know" its ethernet address, and to
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* start recieving packets. The Linux driver has a whole transmit and
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* recieve ring of buffers. This is neat if you need high performance:
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* you can write the buffers asynchronously to the chip reading the
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* buffers and transmitting them over the network. Performance is NOT
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* an issue here. We can boot a 400k kernel in about two
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* seconds. (Theory: 0.4 seconds). Booting a system is going to take
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* about half a minute anyway, so getting 10 times closer to the
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* theoretical limit is going to make a difference of a few percent.
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* Transmitting and recieving.
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* We have only one transmit descriptor. It has two buffer descriptors:
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* one for the header, and the other for the data.
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* We have only one receive buffer. The chip is told to recieve packets,
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* and suspend itself once it got one. The recieve (poll) routine simply
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* looks at the recieve buffer to see if there is already a packet there.
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* if there is, the buffer is copied, and the reciever is restarted.
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* The etherboot framework moves the code to the 32k segment from
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* 0x98000 to 0xa0000. There is just a little room between the end of
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* this driver and the 0xa0000 address. If you compile in too many
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* features, this will overflow.
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* The number under "hex" in the output of size that scrolls by while
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* compiling should be less than 8000. Maybe even the stack is up there,
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* so that you need even more headroom.
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/* The etherboot authors seem to dislike the argument ordering in
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* outb macros that Linux uses. I disklike the confusion that this
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* has caused even more.... This file uses the Linux argument ordering. */
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/* Sorry not us. It's inherted code from FreeBSD. [The authors] */
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#include "etherboot.h"
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#define virt_to_bus(x) ((unsigned long)x)
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typedef unsigned char u8;
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typedef signed char s8;
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typedef unsigned short u16;
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typedef signed short s16;
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typedef unsigned int u32;
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typedef signed int s32;
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enum speedo_offsets {
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SCBStatus = 0, SCBCmd = 2, /* Rx/Command Unit command and status. */
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SCBPointer = 4, /* General purpose pointer. */
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SCBPort = 8, /* Misc. commands and operands. */
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SCBflash = 12, SCBeeprom = 14, /* EEPROM and flash memory control. */
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SCBCtrlMDI = 16, /* MDI interface control. */
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SCBEarlyRx = 20, /* Early receive byte count. */
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static int do_eeprom_cmd(int cmd, int cmd_len);
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void hd(void *where, int n);
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/***********************************************************************/
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/* I82557 related defines */
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/***********************************************************************/
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/* Serial EEPROM section.
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A "bit" grungy, but we work our way through bit-by-bit :->. */
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/* EEPROM_Ctrl bits. */
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#define EE_SHIFT_CLK 0x01 /* EEPROM shift clock. */
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#define EE_CS 0x02 /* EEPROM chip select. */
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#define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */
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#define EE_DATA_READ 0x08 /* EEPROM chip data out. */
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#define EE_WRITE_0 0x4802
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#define EE_WRITE_1 0x4806
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#define EE_ENB (0x4800 | EE_CS)
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#define udelay(n) waiton_timer2(((n)*TICKS_PER_MS)/1000)
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/* The EEPROM commands include the alway-set leading bit. */
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#define EE_READ_CMD 6
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/* The SCB accepts the following controls for the Tx and Rx units: */
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#define CU_START 0x0010
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#define CU_RESUME 0x0020
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#define CU_STATSADDR 0x0040
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#define CU_SHOWSTATS 0x0050 /* Dump statistics counters. */
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#define CU_CMD_BASE 0x0060 /* Base address to add to add CU commands. */
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#define CU_DUMPSTATS 0x0070 /* Dump then reset stats counters. */
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#define RX_START 0x0001
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#define RX_RESUME 0x0002
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#define RX_ABORT 0x0004
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#define RX_ADDR_LOAD 0x0006
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#define RX_RESUMENR 0x0007
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#define INT_MASK 0x0100
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#define DRVR_INT 0x0200 /* Driver generated interrupt. */
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enum phy_chips { NonSuchPhy=0, I82553AB, I82553C, I82503, DP83840, S80C240,
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S80C24, PhyUndefined, DP83840A=10, };
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/* Commands that can be put in a command list entry. */
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CmdMulticastList = 3,
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/* And some extra flags: */
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CmdSuspend = 0x4000, /* Suspend after completion. */
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CmdIntr = 0x2000, /* Interrupt after completion. */
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CmdTxFlex = 0x0008, /* Use "Flexible mode" for CmdTx command. */
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/* How to wait for the command unit to accept a command.
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Typically this takes 0 ticks. */
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static inline void wait_for_cmd_done(int cmd_ioaddr)
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while(inb(cmd_ioaddr) && --wait >= 0);
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/* Elements of the dump_statistics block. This block must be lword aligned. */
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static struct speedo_stats {
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u32 rx_resource_errs;
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/* A speedo3 TX buffer descriptor with two buffers... */
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u32 link; /* void * */
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u32 tx_desc_addr; /* (almost) Always points to the tx_buf_addr element. */
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s32 count; /* # of TBD (=2), Tx start thresh., etc. */
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/* This constitutes two "TBD" entries: hdr and data */
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u32 tx_buf_addr0; /* void *, header of frame to be transmitted. */
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s32 tx_buf_size0; /* Length of Tx hdr. */
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u32 tx_buf_addr1; /* void *, data to be transmitted. */
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s32 tx_buf_size1; /* Length of Tx data. */
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struct RxFD { /* Receive frame descriptor. */
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u32 link; /* struct RxFD * */
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u32 rx_buf_addr; /* void * */
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#ifdef USE_LOWMEM_BUFFER
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#define rxfd ((struct RxFD *)(0x10000 - sizeof(struct RxFD)))
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#define ACCESS(x) x->
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static struct RxFD rxfd;
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static int congenb = 0; /* Enable congestion control in the DP83840. */
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static int txfifo = 8; /* Tx FIFO threshold in 4 byte units, 0-15 */
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static int rxfifo = 8; /* Rx FIFO threshold, default 32 bytes. */
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static int txdmacount = 0; /* Tx DMA burst length, 0-127, default 0. */
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static int rxdmacount = 0; /* Rx DMA length, 0 means no preemption. */
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/* I don't understand a byte in this structure. It was copied from the
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* Linux kernel initialization for the eepro100. -- REW */
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static struct ConfCmd {
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unsigned char data[22];
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{22, 0x08, 0, 0, 0, 0x80, 0x32, 0x03, 1, /* 1=Use MII 0=Use AUI */
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0xf2, 0x48, 0, 0x40, 0xf2, 0x80, /* 0x40=Force full-duplex */
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/***********************************************************************/
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/* Locally used functions */
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/***********************************************************************/
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/* Support function: mdio_write
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* This probably writes to the "physical media interface chip".
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static int mdio_write(int phy_id, int location, int value)
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int val, boguscnt = 64*4; /* <64 usec. to complete, typ 27 ticks */
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outl(0x04000000 | (location<<16) | (phy_id<<21) | value,
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ioaddr + SCBCtrlMDI);
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val = inl(ioaddr + SCBCtrlMDI);
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if (--boguscnt < 0) {
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printf(" mdio_write() timed out with val = %X.\n", val);
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} while (! (val & 0x10000000));
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/* Support function: mdio_read
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* This probably reads a register in the "physical media interface chip".
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static int mdio_read(int phy_id, int location)
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int val, boguscnt = 64*4; /* <64 usec. to complete, typ 27 ticks */
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outl(0x08000000 | (location<<16) | (phy_id<<21), ioaddr + SCBCtrlMDI);
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val = inl(ioaddr + SCBCtrlMDI);
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if (--boguscnt < 0) {
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printf( " mdio_read() timed out with val = %X.\n", val);
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} while (! (val & 0x10000000));
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/* The fixes for the code were kindly provided by Dragan Stancevic
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<visitor@valinux.com> to strictly follow Intel specifications of EEPROM
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The publicly available sheet 64486302 (sec. 3.1) specifies 1us access
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interval for serial EEPROM. However, it looks like that there is an
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additional requirement dictating larger udelay's in the code below.
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static int do_eeprom_cmd(int cmd, int cmd_len)
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long ee_addr = ioaddr + SCBeeprom;
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outw(EE_ENB, ee_addr); udelay(2);
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outw(EE_ENB | EE_SHIFT_CLK, ee_addr); udelay(2);
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/* Shift the command bits out. */
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short dataval = (cmd & (1 << cmd_len)) ? EE_WRITE_1 : EE_WRITE_0;
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outw(dataval, ee_addr); udelay(2);
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outw(dataval | EE_SHIFT_CLK, ee_addr); udelay(2);
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retval = (retval << 1) | ((inw(ee_addr) & EE_DATA_READ) ? 1 : 0);
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} while (--cmd_len >= 0);
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outw(EE_ENB, ee_addr); udelay(2);
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/* Terminate the EEPROM access. */
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outw(EE_ENB & ~EE_CS, ee_addr);
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static inline void whereami (const char *str)
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printf ("%s\n", str);
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/* function: eepro100_reset
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* resets the card. This is used to allow Etherboot to probe the card again
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* from a "virginal" state....
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static void eepro100_reset(struct nic *nic)
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outl(0, ioaddr + SCBPort);
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/* function: eepro100_transmit
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* This transmits a packet.
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* Arguments: char d[6]: destination ethernet address.
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* unsigned short t: ethernet protocol type.
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* unsigned short s: size of the data-part of the packet.
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* char *p: the data for the packet.
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static void eepro100_transmit(struct nic *nic, const char *d, unsigned int t, unsigned int s, const char *p)
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unsigned char dst_addr[ETH_ALEN];
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unsigned char src_addr[ETH_ALEN];
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unsigned short status;
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status = inw(ioaddr + SCBStatus);
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/* Acknowledge all of the current interrupt sources ASAP. */
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outw(status & 0xfc00, ioaddr + SCBStatus);
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printf ("transmitting type %hX packet (%d bytes). status = %hX, cmd=%hX\n",
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t, s, status, inw (ioaddr + SCBCmd));
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memcpy (&hdr.dst_addr, d, ETH_ALEN);
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memcpy (&hdr.src_addr, nic->node_addr, ETH_ALEN);
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hdr.type = htons (t);
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txfd.command = CmdSuspend | CmdTx | CmdTxFlex;
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txfd.link = virt_to_bus (&txfd);
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txfd.count = 0x02208000;
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txfd.tx_desc_addr = (u32)&txfd.tx_buf_addr0;
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txfd.tx_buf_addr0 = virt_to_bus (&hdr);
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txfd.tx_buf_size0 = sizeof (hdr);
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txfd.tx_buf_addr1 = virt_to_bus (p);
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txfd.tx_buf_size1 = s;
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hd (&txfd, sizeof (txfd));
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outl(virt_to_bus(&txfd), ioaddr + SCBPointer);
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outw(INT_MASK | CU_START, ioaddr + SCBCmd);
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wait_for_cmd_done(ioaddr + SCBCmd);
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s1 = inw (ioaddr + SCBStatus);
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load_timer2(10*TICKS_PER_MS); /* timeout 10 ms for transmit */
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while (!txfd.status && timer2_running())
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s2 = inw (ioaddr + SCBStatus);
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printf ("s1 = %hX, s2 = %hX.\n", s1, s2);
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/* function: eepro100_poll / eth_poll
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* This recieves a packet from the network.
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* returns: 1 if a packet was recieved.
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* 0 if no pacet was recieved.
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* returns the packet in the array nic->packet.
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* returns the length of the packet in nic->packetlen.
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static int eepro100_poll(struct nic *nic)
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if (!ACCESS(rxfd)status)
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/* Ok. We got a packet. Now restart the reciever.... */
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ACCESS(rxfd)status = 0;
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ACCESS(rxfd)command = 0xc000;
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outl(virt_to_bus(&(ACCESS(rxfd)status)), ioaddr + SCBPointer);
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outw(INT_MASK | RX_START, ioaddr + SCBCmd);
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wait_for_cmd_done(ioaddr + SCBCmd);
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printf ("Got a packet: Len = %d.\n", ACCESS(rxfd)count & 0x3fff);
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nic->packetlen = ACCESS(rxfd)count & 0x3fff;
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memcpy (nic->packet, ACCESS(rxfd)packet, nic->packetlen);
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hd (nic->packet, 0x30);
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static void eepro100_disable(struct nic *nic)
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/* See if this PartialReset solves the problem with interfering with
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kernel operation after Etherboot hands over. - Ken 20001102 */
470
outl(2, ioaddr + SCBPort);
473
/* exported function: eepro100_probe / eth_probe
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* leaves the ioaddress of the 82557 chip in the variable ioaddr.
478
* leaves the 82557 initialized, and ready to recieve packets.
481
struct nic *eepro100_probe(struct nic *nic, unsigned short *probeaddrs, struct pci_device *p)
483
unsigned short sum = 0;
485
int read_cmd, ee_size;
486
unsigned short value;
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/* we cache only the first few words of the EEPROM data
491
be careful not to access beyond this array */
492
unsigned short eeprom[16];
494
if (probeaddrs == 0 || probeaddrs[0] == 0)
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ioaddr = probeaddrs[0] & ~3; /* Mask the bit that says "this is an io addr" */
498
adjust_pci_device(p);
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if ((do_eeprom_cmd(EE_READ_CMD << 24, 27) & 0xffe0000)
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read_cmd = EE_READ_CMD << 24;
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read_cmd = EE_READ_CMD << 22;
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for (i = 0, sum = 0; i < ee_size; i++) {
510
unsigned short value = do_eeprom_cmd(read_cmd | (i << 16), 27);
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if (i < (int)(sizeof(eeprom)/sizeof(eeprom[0])))
516
for (i=0;i<ETH_ALEN;i++) {
517
nic->node_addr[i] = (eeprom[i/2] >> (8*(i&1))) & 0xff;
519
printf ("Ethernet addr: %!\n", nic->node_addr);
522
printf("eepro100: Invalid EEPROM checksum %#hX, "
523
"check settings before activating this device!\n", sum);
524
outl(0, ioaddr + SCBPort);
527
whereami ("Got eeprom.");
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outl(virt_to_bus(&lstats), ioaddr + SCBPointer);
530
outw(INT_MASK | CU_STATSADDR, ioaddr + SCBCmd);
531
wait_for_cmd_done(ioaddr + SCBCmd);
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whereami ("set stats addr.");
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outl(0, ioaddr + SCBPointer);
538
outw(INT_MASK | RX_ADDR_LOAD, ioaddr + SCBCmd);
539
wait_for_cmd_done(ioaddr + SCBCmd);
541
whereami ("set rx base addr.");
543
ACCESS(rxfd)status = 0x0001;
544
ACCESS(rxfd)command = 0x0000;
545
ACCESS(rxfd)link = virt_to_bus(&(ACCESS(rxfd)status));
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ACCESS(rxfd)rx_buf_addr = (int) &nic->packet;
547
ACCESS(rxfd)count = 0;
548
ACCESS(rxfd)size = 1528;
550
outl(virt_to_bus(&(ACCESS(rxfd)status)), ioaddr + SCBPointer);
551
outw(INT_MASK | RX_START, ioaddr + SCBCmd);
552
wait_for_cmd_done(ioaddr + SCBCmd);
554
whereami ("started RX process.");
556
/* Start the reciever.... */
557
ACCESS(rxfd)status = 0;
558
ACCESS(rxfd)command = 0xc000;
559
outl(virt_to_bus(&(ACCESS(rxfd)status)), ioaddr + SCBPointer);
560
outw(INT_MASK | RX_START, ioaddr + SCBCmd);
565
outl(0, ioaddr + SCBPointer);
566
outw(INT_MASK | CU_CMD_BASE, ioaddr + SCBCmd);
567
wait_for_cmd_done(ioaddr + SCBCmd);
569
whereami ("set TX base addr.");
571
txfd.command = (CmdIASetup);
572
txfd.status = 0x0000;
573
txfd.link = virt_to_bus (&confcmd);
576
char *t = (char *)&txfd.tx_desc_addr;
578
for (i=0;i<ETH_ALEN;i++)
579
t[i] = nic->node_addr[i];
583
printf ("Setup_eaddr:\n");
586
/* options = 0x40; */ /* 10mbps half duplex... */
587
options = 0x00; /* Autosense */
591
if ( ((eeprom[6]>>8) & 0x3f) == DP83840
592
|| ((eeprom[6]>>8) & 0x3f) == DP83840A) {
593
int mdi_reg23 = mdio_read(eeprom[6] & 0x1f, 23) | 0x0422;
596
printf(" DP83840 specific setup, setting register 23 to %hX.\n",
598
mdio_write(eeprom[6] & 0x1f, 23, mdi_reg23);
600
whereami ("Done DP8340 special setup.");
602
mdio_write(eeprom[6] & 0x1f, 0,
603
((options & 0x20) ? 0x2000 : 0) | /* 100mbps? */
604
((options & 0x10) ? 0x0100 : 0)); /* Full duplex? */
605
whereami ("set mdio_register.");
608
confcmd.command = CmdSuspend | CmdConfigure;
609
confcmd.status = 0x0000;
610
confcmd.link = virt_to_bus (&txfd);
611
confcmd.data[1] = (txfifo << 4) | rxfifo;
612
confcmd.data[4] = rxdmacount;
613
confcmd.data[5] = txdmacount + 0x80;
614
confcmd.data[15] = promisc ? 0x49: 0x48;
615
confcmd.data[19] = (options & 0x10) ? 0xC0 : 0x80;
616
confcmd.data[21] = promisc ? 0x0D: 0x05;
618
outl(virt_to_bus(&txfd), ioaddr + SCBPointer);
619
outw(INT_MASK | CU_START, ioaddr + SCBCmd);
620
wait_for_cmd_done(ioaddr + SCBCmd);
622
whereami ("started TX thingy (config, iasetup).");
624
load_timer2(10*TICKS_PER_MS);
625
while (!txfd.status && timer2_running())
628
nic->reset = eepro100_reset;
629
nic->poll = eepro100_poll;
630
nic->transmit = eepro100_transmit;
631
nic->disable = eepro100_disable;
635
/*********************************************************************/
639
/* Hexdump a number of bytes from memory... */
640
void hd (void *where, int n)
645
printf ("%X ", where);
646
for (i=0;i < ( (n>16)?16:n);i++)
647
printf (" %hhX", ((char *)where)[i]);