~ubuntu-branches/debian/sid/gcc-4.5/sid : revision 45

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# DP: updates from the 4.5 branch upto 20110421 (r172810).

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# DP: updates from the 4.5 branch upto 20110608 (r174800).

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last_updated()

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{

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cat > ${dir}LAST_UPDATED <<EOF

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Thu Apr 21 07:08:12 CEST 2011

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Thu Apr 21 05:08:12 UTC 2011 (revision 172810)

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Wed Jun 8 11:49:21 CEST 2011

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Wed Jun 8 09:49:21 UTC 2011 (revision 174800)

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EOF

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}

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svn diff svn://gcc.gnu.org/svn/gcc/tags/gcc_4_5_2_release svn://gcc.gnu.org/svn/gcc/branches/gcc-4_5-branch \

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svn diff svn://gcc.gnu.org/svn/gcc/tags/gcc_4_5_3_release svn://gcc.gnu.org/svn/gcc/branches/gcc-4_5-branch \

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| sed -r 's,^--- (\S+)\t(\S+)(.*)$,--- a/src/\1\t\2,;s,^\+\+\+ (\S+)\t(\S+)(.*)$,+++ b/src/\1\t\2,' \

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| awk '/^Index:.*\.(class|texi)/ {skip=1; next} /^Index:/ { skip=0 } skip==0'

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Index: libgomp/fortran.c

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===================================================================

17

--- a/src/libgomp/fortran.c (.../tags/gcc_4_5_3_release)

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+++ b/src/libgomp/fortran.c (.../branches/gcc-4_5-branch)

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@@ -1,4 +1,4 @@

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21

22

Contributed by Jakub Jelinek <jakub@redhat.com>.

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This file is part of the GNU OpenMP Library (libgomp).

25

@@ -27,6 +27,7 @@

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#include "libgomp.h"

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#include "libgomp_f.h"

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#include <stdlib.h>

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+#include <limits.h>

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#ifdef HAVE_ATTRIBUTE_ALIAS

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/* Use internal aliases if possible. */

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@@ -244,6 +245,8 @@

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omp_lock_symver (omp_test_nest_lock_)

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#endif

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+#define TO_INT(x) ((x) > INT_MIN ? (x) < INT_MAX ? (x) : INT_MAX : INT_MIN)

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+

39

void

40

omp_set_dynamic_ (const int32_t *set)

41

{

42

@@ -253,7 +256,7 @@

43

void

44

omp_set_dynamic_8_ (const int64_t *set)

45

{

46

- omp_set_dynamic (*set);

47

+ omp_set_dynamic (!!*set);

48

}

49

50

void

51

@@ -265,7 +268,7 @@

52

void

53

omp_set_nested_8_ (const int64_t *set)

54

{

55

- omp_set_nested (*set);

56

+ omp_set_nested (!!*set);

57

}

58

59

void

60

@@ -277,7 +280,7 @@

61

void

62

omp_set_num_threads_8_ (const int64_t *set)

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{

64

- omp_set_num_threads (*set);

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+ omp_set_num_threads (TO_INT (*set));

66

}

67

68

int32_t

69

@@ -343,7 +346,7 @@

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void

71

omp_set_schedule_8_ (const int32_t *kind, const int64_t *modifier)

72

{

73

- omp_set_schedule (*kind, *modifier);

74

+ omp_set_schedule (*kind, TO_INT (*modifier));

75

}

76

77

void

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@@ -381,7 +384,7 @@

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void

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omp_set_max_active_levels_8_ (const int64_t *levels)

81

{

82

- omp_set_max_active_levels (*levels);

83

+ omp_set_max_active_levels (TO_INT (*levels));

84

}

85

86

int32_t

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@@ -405,7 +408,7 @@

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int32_t

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omp_get_ancestor_thread_num_8_ (const int64_t *level)

90

{

91

- return omp_get_ancestor_thread_num (*level);

92

+ return omp_get_ancestor_thread_num (TO_INT (*level));

93

}

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int32_t

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@@ -417,7 +420,7 @@

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int32_t

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omp_get_team_size_8_ (const int64_t *level)

99

{

100

- return omp_get_team_size (*level);

101

+ return omp_get_team_size (TO_INT (*level));

102

}

103

104

int32_t

105

Index: libgomp/ChangeLog

106

===================================================================

107

--- a/src/libgomp/ChangeLog (.../tags/gcc_4_5_3_release)

108

+++ b/src/libgomp/ChangeLog (.../branches/gcc-4_5-branch)

109

@@ -1,3 +1,15 @@

110

+2011-05-06 Jakub Jelinek <jakub@redhat.com>

111

+

112

+ PR fortran/48894

113

+ * fortran.c: Include limits.h.

114

+ (TO_INT): Define.

115

+ (omp_set_dynamic_8_, omp_set_num_threads_8_): Use !!*set instead of

116

+ *set.

117

+ (omp_set_num_threads_8_, omp_set_schedule_8_,

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+ omp_set_max_active_levels_8_, omp_get_ancestor_thread_num_8_,

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+ omp_get_team_size_8_): Use TO_INT macro.

120

+ * testsuite/libgomp.fortran/pr48894.f90: New test.

121

+

122

2011-04-28 Release Manager

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* GCC 4.5.3 released.

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Index: libgomp/testsuite/libgomp.fortran/pr48894.f90

126

===================================================================

127

--- a/src/libgomp/testsuite/libgomp.fortran/pr48894.f90 (.../tags/gcc_4_5_3_release)

128

+++ b/src/libgomp/testsuite/libgomp.fortran/pr48894.f90 (.../branches/gcc-4_5-branch)

129

@@ -0,0 +1,23 @@

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+! PR fortran/48894

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+! { dg-do run }

132

+! { dg-options "-fdefault-integer-8" }

133

+

134

+ use omp_lib

135

+ integer, parameter :: zero = 0

136

+ integer :: err

137

+ logical :: l

138

+ err = 0

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+ !$omp parallel

140

+ !$omp parallel private (l)

141

+ l = omp_get_ancestor_thread_num (-HUGE (zero)) .ne. -1

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+ l = l .or. (omp_get_ancestor_thread_num (HUGE (zero)) .ne. -1)

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+ l = l .or. (omp_get_team_size (-HUGE (zero)) .ne. -1)

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+ l = l .or. (omp_get_team_size (HUGE (zero)) .ne. -1)

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+ if (l) then

146

+ !$omp atomic

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+ err = err + 1

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+ endif

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+ !$omp end parallel

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+ !$omp end parallel

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+ if (err .ne. 0) call abort

152

+end

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Index: gcc/fwprop.c

154

===================================================================

155

--- a/src/gcc/fwprop.c (.../tags/gcc_4_5_3_release)

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+++ b/src/gcc/fwprop.c (.../branches/gcc-4_5-branch)

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@@ -228,8 +228,11 @@

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159

process_uses (df_get_artificial_uses (bb_index), DF_REF_AT_TOP);

160

process_defs (df_get_artificial_defs (bb_index), DF_REF_AT_TOP);

161

- df_simulate_initialize_forwards (bb, local_lr);

162

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+ /* We don't call df_simulate_initialize_forwards, as it may overestimate

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+ the live registers if there are unused artificial defs. We prefer

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+ liveness to be underestimated. */

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+

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FOR_BB_INSNS (bb, insn)

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if (INSN_P (insn))

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{

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Index: gcc/DATESTAMP

171

===================================================================

172

--- a/src/gcc/DATESTAMP (.../tags/gcc_4_5_3_release)

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+++ b/src/gcc/DATESTAMP (.../branches/gcc-4_5-branch)

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@@ -1 +1 @@

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-20110428

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+20110608

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Index: gcc/tree-tailcall.c

178

===================================================================

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--- a/src/gcc/tree-tailcall.c (.../tags/gcc_4_5_3_release)

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+++ b/src/gcc/tree-tailcall.c (.../branches/gcc-4_5-branch)

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@@ -1007,6 +1007,14 @@

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integer_one_node);

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}

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+ if (a_acc || m_acc)

186

+ {

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+ /* When the tail call elimination using accumulators is performed,

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+ statements adding the accumulated value are inserted at all exits.

189

+ This turns all other tail calls to non-tail ones. */

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+ opt_tailcalls = false;

191

+ }

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+

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for (; tailcalls; tailcalls = next)

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{

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next = tailcalls->next;

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Index: gcc/final.c

197

===================================================================

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--- a/src/gcc/final.c (.../tags/gcc_4_5_3_release)

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+++ b/src/gcc/final.c (.../branches/gcc-4_5-branch)

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@@ -2241,6 +2241,11 @@

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location_t loc;

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expanded_location expanded;

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+ /* Make sure we flush any queued register saves in case this

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+ clobbers affected registers. */

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+ if (dwarf2out_do_frame ())

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+ dwarf2out_frame_debug (insn, false);

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+

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/* There's no telling what that did to the condition codes. */

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CC_STATUS_INIT;

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Index: gcc/fold-const.c

213

===================================================================

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--- a/src/gcc/fold-const.c (.../tags/gcc_4_5_3_release)

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+++ b/src/gcc/fold-const.c (.../branches/gcc-4_5-branch)

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@@ -2784,8 +2784,6 @@

217

218

case VOID_TYPE:

219

tem = fold_ignored_result (arg);

220

- if (TREE_CODE (tem) == MODIFY_EXPR)

221

- goto fold_convert_exit;

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return fold_build1_loc (loc, NOP_EXPR, type, tem);

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default:

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Index: gcc/ChangeLog

226

===================================================================

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--- a/src/gcc/ChangeLog (.../tags/gcc_4_5_3_release)

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+++ b/src/gcc/ChangeLog (.../branches/gcc-4_5-branch)

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@@ -1,3 +1,281 @@

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+2011-06-08 Kaz Kojima <kkojima@gcc.gnu.org>

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+

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+ Backport from mainline

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+ 2011-06-01 Kaz Kojima <kkojima@gcc.gnu.org>

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+

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+ PR target/49238

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+ * config/sh/sh.c (expand_cbranchdi4): Use a scratch register if

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+ needed when original operands are used for msw_skip comparison.

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+

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+2011-06-05 Eric Botcazou <ebotcazou@adacore.com>

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+

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+ * config/sparc/sparc.c (output_return): Fix thinko in the output of an

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+ EH return when delayed branches are disabled.

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+

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+2011-06-05 Kaz Kojima <kkojima@gcc.gnu.org>

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+

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+ Backport from mainline

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+ 2011-05-30 Kaz Kojima <kkojima@gcc.gnu.org>

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+

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+ PR target/49186

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+ * config/sh/sh.c (expand_cbranchdi4): Set msw_skip when the high

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+ part of the second operand is 0.

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+

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+2011-06-04 Ira Rosen <ira.rosen@linaro.org>

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+

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+ PR tree-optimization/49038

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+ * tree-vect-loop-manip.c (vect_generate_tmps_on_preheader):

257

+ Ensure at least one epilogue iteration if required by data

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+ accesses with gaps.

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+ * tree-vectorizer.h (struct _loop_vec_info): Add new field

260

+ to mark loops that require peeling for gaps.

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+ * tree-vect-loop.c (new_loop_vec_info): Initialize new field.

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+ (vect_estimate_min_profitable_iters): Take peeling for gaps into

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+ account.

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+ (vect_transform_loop): Generate epilogue if required by data

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+ access with gaps.

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+ * tree-vect-data-refs.c (vect_analyze_group_access): Mark the

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+ loop as requiring an epilogue if there are gaps in the end of

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+ the strided group.

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+

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+2011-05-29 Richard Sandiford <rdsandiford@googlemail.com>

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+

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+ PR target/43700

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+ * config/mips/mips.c (mips_cfun_call_saved_reg_p): Handle global

274

+ registers.

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+

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+2011-05-29 Richard Sandiford <rdsandiford@googlemail.com>

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+

278

+ PR target/43995

279

+ * config/mips/mips.c (mips_pic_call_symbol_from_set): Add a

280

+ recurse_p argument. Only follow register copies if it is set,

281

+ and prevent mips_find_pic_call_symbol from recursing.

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+ (mips_find_pic_call_symbol): Add a recurse_p argument.

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+ Pass it to mips_pic_call_symbol_from_set.

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+ (mips_annotate_pic_calls): Update accordingly.

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+

286

+2011-05-26 Eric Botcazou <ebotcazou@adacore.com>

287

+

288

+ * config/sparc/sparc-protos.h (sparc_optimization_options): Declare.

289

+ * config/sparc/sparc.h (OPTIMIZATION_OPTIONS): Define.

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+ * config/sparc/sparc.c (sparc_optimization_options): New function.

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+ Set flag_ira_share_save_slots to 0.

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+

293

+ Backport from mainline

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+ 2011-01-21 Jeff Law <law@redhat.com>

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+

296

+ PR rtl-optimization/41619

297

+ * caller-save.c (setup_save_areas): Break out code to determine

298

+ which hard regs are live across calls by examining the reload chains

299

+ so that it is always used.

300

+ Eliminate code which checked REG_N_CALLS_CROSSED.

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+

302

+2011-05-25 Uros Bizjak <ubizjak@gmail.com>

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+

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+ PR target/49133

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+ * config/i386/sse.md (sse2_loadhpd): Remove shufpd alternative.

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+

307

+2011-05-21 Eric Botcazou <ebotcazou@adacore.com>

308

+

309

+ * config/sparc/sparc.md (setjmp): Handle PIC mode and use the hard

310

+ frame pointer.

311

+

312

+2011-05-21 Eric Botcazou <ebotcazou@adacore.com>

313

+

314

+ * config/sparc/sparc.c (eligible_for_return_delay): Do not return

315

+ false if there are call-saved registers here...

316

+ (sparc_can_use_return_insn_p): ...but here instead.

317

+ (save_or_restore_regs): Fix thinko.

318

+ (sparc_expand_prologue): Use current_function_is_leaf.

319

+ (sparc_frame_pointer_required): Likewise.

320

+

321

+2011-05-20 Nick Clifton <nickc@redhat.com>

322

+

323

+ * config/rx/rx.h (HAVE_PRE_DECREMENT): Fix typo in macro name.

324

+

325

+2011-05-16 Uros Bizjak <ubizjak@gmail.com>

326

+

327

+ * config/i386/i386.md (*movxf_internal): Disable CONST_DOUBLE

328

+ optimization for CM_MEDIUM and CM_LARGE code models. Fix usage

329

+ of standard_80387_constant_p.

330

+ (*movxf_internal_nointeger): Ditto.

331

+ (*movdf_internal): Remove dead code-size optimization.

332

+ (*movdf_internal_rex64): Fix usage of standard_80387_constant_p.

333

+ (*movdf_internal_nointeger): Ditto.

334

+ (*movsf_internal): Ditto.

335

+ (floating point move splitters): Ditto.

336

+ * config/i386/constraints.md (G): Ditto.

337

+ * config/i386/i386.c (ix86_preferred_reload_class): Ditto.

338

+

339

+2011-05-11 Michael Meissner <meissner@linux.vnet.ibm.com>

340

+

341

+ Backport from mainline

342

+ 2011-05-10 Michael Meissner <meissner@linux.vnet.ibm.com>

343

+

344

+ PR target/48857, 48495

345

+ * config/rs6000/rs6000.h (VSX_SCALAR_MODE): Delete.

346

+ (VSX_MODE): Ditto.

347

+ (VSX_MOVE_MODE): Ditto.

348

+ (ALTIVEC_OR_VSX_VECTOR_MODE): New macro, combine all Altivec and

349

+ VSX vector types. Add V2DImode.

350

+ (HARD_REGNO_CALLER_SAVE_MODE): Use it instead of

351

+ ALTIVEC_VECTOR_MODE and VSX_VECTOR_MODE calls.

352

+ (MODES_TIEABLE_P): Ditto.

353

+

354

+ * config/rs6000/rs6000.c (rs6000_emit_move): Use

355

+ ALTIVEC_OR_VSX_MODE instead of ALTIVEC_VECTOR_MODE and

356

+ VSX_VECTOR_MODE.

357

+ (init_cumulative_args): Ditto.

358

+ (rs6000_function_arg_boundary): Ditto.

359

+ (rs6000_function_arg_advance_1): Ditto.

360

+ (rs6000_function_arg): Ditto.

361

+ (rs6000_function_ok_for_sibcall): Ditto.

362

+ (emit_frame_save): Ditto.

363

+ (rs6000_function_value): Ditto.

364

+ (rs6000_libcall_value): Ditto.

365

+

366

+2011-05-10 Jakub Jelinek <jakub@redhat.com>

367

+

368

+ Backported from mainline

369

+ 2011-05-07 Zdenek Dvorak <ook@ucw.cz>

370

+

371

+ PR tree-optimization/48837

372

+ * tree-tailcall.c (tree_optimize_tail_calls_1): Do not mark tailcalls

373

+ when accumulator transformation is performed.

374

+

375

+2011-05-09 Eric Botcazou <ebotcazou@adacore.com>

376

+

377

+ * var-tracking.c (find_mem_expr_in_1pdv): Fix thinko.

378

+ (dataflow_set_preserve_mem_locs): Likewise.

379

+

380

+2011-05-07 Alan Modra <amodra@gmail.com>

381

+

382

+ PR target/48900

383

+ * config/rs6000/rs6000.c (rs6000_legitimize_tls_address): Use

384

+ const0_rtx as the arg to the dummy __tls_get_addr libcall.

385

+

386

+2011-05-05 Jason Merrill <jason@redhat.com>

387

+

388

+ PR c++/40975

389

+ * tree-inline.c (copy_tree_r): Handle STATEMENT_LIST.

390

+

391

+2011-05-05 Julian Brown <julian@codesourcery.com>

392

+

393

+ * config/arm/neon.md (vec_set<mode>_internal): Fix misplaced

394

+ parenthesis in D-register case.

395

+

396

+2011-05-05 Ira Rosen <ira.rosen@linaro.org>

397

+

398

+ Backport from mainline:

399

+ 2011-04-18 Ulrich Weigand <ulrich.weigand@linaro.org>

400

+ Ira Rosen <ira.rosen@linaro.org>

401

+

402

+ PR target/48252

403

+ * config/arm/arm.c (neon_emit_pair_result_insn): Swap arguments

404

+ to match neon_vzip/vuzp/vtrn_internal.

405

+ * config/arm/neon.md (neon_vtrn<mode>_internal): Make both

406

+ outputs explicitly dependent on both inputs.

407

+ (neon_vzip<mode>_internal, neon_vuzp<mode>_internal): Likewise.

408

+

409

+2011-05-04 Uros Bizjak <ubizjak@gmail.com>

410

+

411

+ Backport from mainline

412

+ 2011-04-21 Uros Bizjak <ubizjak@gmail.com>

413

+

414

+ PR target/48708

415

+ * config/i386/i386.c (ix86_expand_vector_set) <V2DImode>: Generate

416

+ vec_extract and vec_concat for non-SSE4_1 targets.

417

+

418

+2011-05-04 Uros Bizjak <ubizjak@gmail.com>

419

+

420

+ * config/i386/i386.md (*movdi_internal_rex64) <TYPE_SSEMOV>:

421

+ Use %v prefix in insn mnemonic to handle TARGET_AVX.

422

+ (*movdi_internal): Use "maybe_vex" instead of "vex" in "prefix"

423

+ attribute calculation.

424

+ (*movdf_internal): Output AVX mnemonics. Add "prefix" attribute.

425

+ * config/i386/sse.md (*sse2_storeq_rex64): Do not emit %v prefix

426

+ for mov{q} mnemonic.

427

+ (*vec_extractv2di_1_rex64_avx): Ditto.

428

+ (*vec_concatv2di_rex64_sse4_1): Use %vmovd for reg<->xmm moves.

429

+ (*vec_concatv2di_rex64_sse): Use movd for reg<->xmm moves.

430

+ * config/i386/mmx.md (*mov<mode>_internal_rex64): Ditto.

431

+

432

+2011-05-03 Uros Bizjak <ubizjak@gmail.com>

433

+ Jakub Jelinek <jakub@redhat.com>

434

+

435

+ PR target/48774

436

+ * config/i386/i386.c (ix86_match_ccmode): For CC{A,C,O,S}mode

437

+ only succeed if req_mode is the same as set_mode.

438

+

439

+2011-05-03 Jakub Jelinek <jakub@redhat.com>

440

+

441

+ Backport from mainline

442

+ 2011-04-30 Jakub Jelinek <jakub@redhat.com>

443

+

444

+ PR tree-optimization/48809

445

+ * tree-switch-conversion.c (build_arrays): Compute tidx in unsigned

446

+ type.

447

+ (gen_inbound_check): Don't compute index_expr - range_min in utype

448

+ again, instead reuse SSA_NAME initialized in build_arrays.

449

+ Remove two useless gsi_for_stmt calls.

450

+

451

+ 2011-04-28 Jakub Jelinek <jakub@redhat.com>

452

+

453

+ PR middle-end/48597

454

+ * final.c (final_scan_insn): Call dwarf2out_frame_debug even for

455

+ inline asm.

456

+

457

+ 2011-04-27 Jakub Jelinek <jakub@redhat.com>

458

+

459

+ PR c/48742

460

+ * c-typeck.c (build_binary_op): Don't wrap arguments if

461

+ int_operands is true.

462

+

463

+ 2011-04-23 Jakub Jelinek <jakub@redhat.com>

464

+

465

+ PR c/48685

466

+ * fold-const.c (fold_convert_loc): Add NOP_EXPR when casting

467

+ to VOID_TYPE even around MODIFY_EXPR.

468

+

469

+2011-05-02 Ulrich Weigand <ulrich.weigand@linaro.org>

470

+

471

+ PR middle-end/43085

472

+ Backport from mainline:

473

+

474

+ 2010-04-29 Bernd Schmidt <bernds@codesourcery.com>

475

+

476

+ From Dominique d'Humieres <dominiq@lps.ens.fr>

477

+ PR bootstrap/43858

478

+ * ifcvt.c (dead_or_predicable): Use df_simulate_find_defs to compute

479

+ test_set.

480

+

481

+ 2010-04-26 Bernd Schmidt <bernds@codesourcery.com>

482

+

483

+ * df-problems.c (df_simulate_initialize_forwards): Set, don't clear,

484

+ bits for artificial defs at the top of the block.

485

+ * fwprop.c (single_def_use_enter_block): Don't call it.

486

+

487

+ 2010-04-22 Bernd Schmidt <bernds@codesourcery.com>

488

+

489

+ * ifcvt.c (dead_or_predicable): Use df_simulate_find_defs and

490

+ df_simulate_find_noclobber_defs as appropriate. Keep track of an

491

+ extra set merge_set_noclobber, and use it to relax the final test

492

+ slightly.

493

+ * df.h (df_simulate_find_noclobber_defs): Declare.

494

+ * df-problems.c (df_simulate_find_defs): Don't ignore partial or

495

+ conditional defs.

496

+ (df_simulate_find_noclobber_defs): New function.

497

+

498

+2011-04-29 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>

499

+

500

+ PR target/48288

501

+ * config/pa/predicates.md (ior_operand): Delete predicate.

502

+ (cint_ior_operand, reg_or_cint_ior_operand): New predicates.

503

+ * config/pa/pa.md (iordi3): Use reg_or_cint_ior_operand predicate in

504

+ expander. Use cint_ior_operand in unnamed insn.

505

+ (iorsi3): Likewise.

506

+ * config/pa/pa-protos.h (ior_operand): Delete declarations.

507

+

508

2011-04-28 Release Manager

509

510

* GCC 4.5.3 released.

511

Index: gcc/tree-vect-loop-manip.c

512

===================================================================

513

--- a/src/gcc/tree-vect-loop-manip.c (.../tags/gcc_4_5_3_release)

514

+++ b/src/gcc/tree-vect-loop-manip.c (.../branches/gcc-4_5-branch)

515

@@ -1516,7 +1516,7 @@

516

edge pe;

517

basic_block new_bb;

518

gimple_seq stmts;

519

- tree ni_name;

520

+ tree ni_name, ni_minus_gap_name;

521

tree var;

522

tree ratio_name;

523

tree ratio_mult_vf_name;

524

@@ -1533,9 +1533,39 @@

525

ni_name = vect_build_loop_niters (loop_vinfo, cond_expr_stmt_list);

526

log_vf = build_int_cst (TREE_TYPE (ni), exact_log2 (vf));

527

528

+ /* If epilogue loop is required because of data accesses with gaps, we

529

+ subtract one iteration from the total number of iterations here for

530

+ correct calculation of RATIO. */

531

+ if (LOOP_VINFO_PEELING_FOR_GAPS (loop_vinfo))

532

+ {

533

+ ni_minus_gap_name = fold_build2 (MINUS_EXPR, TREE_TYPE (ni_name),

534

+ ni_name,

535

+ build_one_cst (TREE_TYPE (ni_name)));

536

+ if (!is_gimple_val (ni_minus_gap_name))

537

+ {

538

+ var = create_tmp_var (TREE_TYPE (ni), "ni_gap");

539

+ add_referenced_var (var);

540

+

541

+ stmts = NULL;

542

+ ni_minus_gap_name = force_gimple_operand (ni_minus_gap_name, &stmts,

543

+ true, var);

544

+ if (cond_expr_stmt_list)

545

+ gimple_seq_add_seq (&cond_expr_stmt_list, stmts);

546

+ else

547

+ {

548

+ pe = loop_preheader_edge (loop);

549

+ new_bb = gsi_insert_seq_on_edge_immediate (pe, stmts);

550

+ gcc_assert (!new_bb);

551

+ }

552

+ }

553

+ }

554

+ else

555

+ ni_minus_gap_name = ni_name;

556

+

557

/* Create: ratio = ni >> log2(vf) */

558

559

- ratio_name = fold_build2 (RSHIFT_EXPR, TREE_TYPE (ni_name), ni_name, log_vf);

560

+ ratio_name = fold_build2 (RSHIFT_EXPR, TREE_TYPE (ni_minus_gap_name),

561

+ ni_minus_gap_name, log_vf);

562

if (!is_gimple_val (ratio_name))

563

{

564

var = create_tmp_var (TREE_TYPE (ni), "bnd");

565

Index: gcc/testsuite/gcc.c-torture/execute/960321-1.x

566

===================================================================

567

--- a/src/gcc/testsuite/gcc.c-torture/execute/960321-1.x (.../tags/gcc_4_5_3_release)

568

+++ b/src/gcc/testsuite/gcc.c-torture/execute/960321-1.x (.../branches/gcc-4_5-branch)

569

@@ -1,15 +0,0 @@

570

-# This test fails to link on 64-bit Solaris 2/x86 due to a Sun as bug.

571

-if { [istarget "i?86-*-solaris2*"]

572

- && ! [check_effective_target_ilp32]

573

- && ! [check_effective_target_gas] } {

574

- set torture_eval_before_compile {

575

- global compiler_conditional_xfail_data

576

- set compiler_conditional_xfail_data {

577

- "64-bit Sun as bug" \

578

- { "i?86-*-solaris2*" } \

579

- { "-O[1-3s]" } \

580

- { "" }

581

- }

582

- }

583

-}

584

-return 0

585

Index: gcc/testsuite/gcc.c-torture/execute/pr49186.c

586

===================================================================

587

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr49186.c (.../tags/gcc_4_5_3_release)

588

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr49186.c (.../branches/gcc-4_5-branch)

589

@@ -0,0 +1,15 @@

590

+/* PR target/49186 */

591

+extern void abort (void);

592

+

593

+int

594

+main ()

595

+{

596

+ int x;

597

+ unsigned long long uv = 0x1000000001ULL;

598

+

599

+ x = (uv < 0x80) ? 1 : ((uv < 0x800) ? 2 : 3);

600

+ if (x != 3)

601

+ abort ();

602

+

603

+ return 0;

604

+}

605

Index: gcc/testsuite/gcc.c-torture/execute/pr48809.c

606

===================================================================

607

--- a/src/gcc/testsuite/gcc.c-torture/execute/pr48809.c (.../tags/gcc_4_5_3_release)

608

+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr48809.c (.../branches/gcc-4_5-branch)

609

@@ -0,0 +1,60 @@

610

+/* PR tree-optimization/48809 */

611

+

612

+extern void abort (void);

613

+

614

+int

615

+foo (signed char x)

616

+{

617

+ int y = 0;

618

+ switch (x)

619

+ {

620

+ case 0: y = 1; break;

621

+ case 1: y = 7; break;

622

+ case 2: y = 2; break;

623

+ case 3: y = 19; break;

624

+ case 4: y = 5; break;

625

+ case 5: y = 17; break;

626

+ case 6: y = 31; break;

627

+ case 7: y = 8; break;

628

+ case 8: y = 28; break;

629

+ case 9: y = 16; break;

630

+ case 10: y = 31; break;

631

+ case 11: y = 12; break;

632

+ case 12: y = 15; break;

633

+ case 13: y = 111; break;

634

+ case 14: y = 17; break;

635

+ case 15: y = 10; break;

636

+ case 16: y = 31; break;

637

+ case 17: y = 7; break;

638

+ case 18: y = 2; break;

639

+ case 19: y = 19; break;

640

+ case 20: y = 5; break;

641

+ case 21: y = 107; break;

642

+ case 22: y = 31; break;

643

+ case 23: y = 8; break;

644

+ case 24: y = 28; break;

645

+ case 25: y = 106; break;

646

+ case 26: y = 31; break;

647

+ case 27: y = 102; break;

648

+ case 28: y = 105; break;

649

+ case 29: y = 111; break;

650

+ case 30: y = 17; break;

651

+ case 31: y = 10; break;

652

+ case 32: y = 31; break;

653

+ case 98: y = 18; break;

654

+ case -62: y = 19; break;

655

+ }

656

+ return y;

657

+}

658

+

659

+int

660

+main ()

661

+{

662

+ if (foo (98) != 18 || foo (97) != 0 || foo (99) != 0)

663

+ abort ();

664

+ if (foo (-62) != 19 || foo (-63) != 0 || foo (-61) != 0)

665

+ abort ();

666

+ if (foo (28) != 105 || foo (27) != 102 || foo (29) != 111)

667

+ abort ();

668

+ return 0;

669

+}

670

Index: gcc/testsuite/gcc.c-torture/compile/pr48742.c

671

===================================================================

672

--- a/src/gcc/testsuite/gcc.c-torture/compile/pr48742.c (.../tags/gcc_4_5_3_release)

673

+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr48742.c (.../branches/gcc-4_5-branch)

674

@@ -0,0 +1,15 @@

675

+/* PR c/48742 */

676

+

677

+void baz (int);

678

+

679

+int

680

+foo (void)

681

+{

682

+ return 1 / 0 > 0;

683

+}

684

+

685

+void

686

+bar (void)

687

+{

688

+ baz (1 <= 2 % (3 >> 1 > 5 / 6 == 3));

689

+}

690

Index: gcc/testsuite/gcc.c-torture/compile/pr49238.c

691

===================================================================

692

--- a/src/gcc/testsuite/gcc.c-torture/compile/pr49238.c (.../tags/gcc_4_5_3_release)

693

+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr49238.c (.../branches/gcc-4_5-branch)

694

@@ -0,0 +1,18 @@

695

+/* PR target/49238 */

696

+extern int bar (void);

697

+

698

+void

699

+foo (unsigned long long a, int b)

700

+{

701

+ int i;

702

+

703

+ if (b)

704

+ for (a = -12; a >= 10; a = bar ())

705

+ break;

706

+ else

707

+ return;

708

+

709

+ for (i = 0; i < 10; i += 10)

710

+ if ((i == bar ()) | (bar () >= a))

711

+ bar ();

712

+}

713

Index: gcc/testsuite/gcc.target/arm/neon-vset_lanes8.c

714

===================================================================

715

--- a/src/gcc/testsuite/gcc.target/arm/neon-vset_lanes8.c (.../tags/gcc_4_5_3_release)

716

+++ b/src/gcc/testsuite/gcc.target/arm/neon-vset_lanes8.c (.../branches/gcc-4_5-branch)

717

@@ -0,0 +1,21 @@

718

+/* Test the `vset_lane_s8' ARM Neon intrinsic. */

719

+

720

+/* { dg-do run } */

721

+/* { dg-require-effective-target arm_neon_hw } */

722

+/* { dg-options "-O0" } */

723

+/* { dg-add-options arm_neon } */

724

+

725

+#include "arm_neon.h"

726

+#include <stdlib.h>

727

+#include <string.h>

728

+

729

+int8x8_t x = { 1, 2, 3, 4, 5, 6, 7, 8 };

730

+int8x8_t y = { 1, 2, 3, 16, 5, 6, 7, 8 };

731

+

732

+int main (void)

733

+{

734

+ x = vset_lane_s8 (16, x, 3);

735

+ if (memcmp (&x, &y, sizeof (x)) != 0)

736

+ abort();

737

+ return 0;

738

+}

739

Index: gcc/testsuite/gcc.target/arm/pr48252.c

740

===================================================================

741

--- a/src/gcc/testsuite/gcc.target/arm/pr48252.c (.../tags/gcc_4_5_3_release)

742

+++ b/src/gcc/testsuite/gcc.target/arm/pr48252.c (.../branches/gcc-4_5-branch)

743

@@ -0,0 +1,31 @@

744

+/* { dg-do run } */

745

+/* { dg-require-effective-target arm_neon_hw } */

746

+/* { dg-options "-O2" } */

747

+/* { dg-add-options arm_neon } */

748

+

749

+#include "arm_neon.h"

750

+#include <stdlib.h>

751

+

752

+int main(void)

753

+{

754

+ uint8x8_t v1 = {1, 1, 1, 1, 1, 1, 1, 1};

755

+ uint8x8_t v2 = {2, 2, 2, 2, 2, 2, 2, 2};

756

+ uint8x8x2_t vd1, vd2;

757

+ union {uint8x8_t v; uint8_t buf[8];} d1, d2, d3, d4;

758

+ int i;

759

+

760

+ vd1 = vzip_u8(v1, vdup_n_u8(0));

761

+ vd2 = vzip_u8(v2, vdup_n_u8(0));

762

+

763

+ vst1_u8(d1.buf, vd1.val[0]);

764

+ vst1_u8(d2.buf, vd1.val[1]);

765

+ vst1_u8(d3.buf, vd2.val[0]);

766

+ vst1_u8(d4.buf, vd2.val[1]);

767

+

768

+ for (i = 0; i < 8; i++)

769

+ if ((i % 2 == 0 && d4.buf[i] != 2)

770

+ || (i % 2 == 1 && d4.buf[i] != 0))

771

+ abort ();

772

+

773

+ return 0;

774

+}

775

Index: gcc/testsuite/gcc.target/powerpc/pr48857.c

776

===================================================================

777

--- a/src/gcc/testsuite/gcc.target/powerpc/pr48857.c (.../tags/gcc_4_5_3_release)

778

+++ b/src/gcc/testsuite/gcc.target/powerpc/pr48857.c (.../branches/gcc-4_5-branch)

779

@@ -0,0 +1,25 @@

780

+/* { dg-do compile { target { powerpc*-*-* } } } */

781

+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */

782

+/* { dg-require-effective-target powerpc_vsx_ok } */

783

+/* { dg-options "-O2 -mcpu=power7 -mabi=altivec" } */

784

+/* { dg-final { scan-assembler-times "lxvd2x" 1 } } */

785

+/* { dg-final { scan-assembler-times "stxvd2x" 1 } } */

786

+/* { dg-final { scan-assembler-not "ld" } } */

787

+/* { dg-final { scan-assembler-not "lwz" } } */

788

+/* { dg-final { scan-assembler-not "stw" } } */

789

+/* { dg-final { scan-assembler-not "addi" } } */

790

+

791

+typedef vector long long v2di_type;

792

+

793

+v2di_type

794

+return_v2di (v2di_type *ptr)

795

+{

796

+ return *ptr; /* should generate lxvd2x 34,0,3. */

797

+}

798

+

799

+void

800

+pass_v2di (v2di_type arg, v2di_type *ptr)

801

+{

802

+ *ptr = arg; /* should generate stxvd2x 34,0,{3,5}. */

803

+}

804

+

805

Index: gcc/testsuite/gcc.target/i386/pr48708.c

806

===================================================================

807

--- a/src/gcc/testsuite/gcc.target/i386/pr48708.c (.../tags/gcc_4_5_3_release)

808

+++ b/src/gcc/testsuite/gcc.target/i386/pr48708.c (.../branches/gcc-4_5-branch)

809

@@ -0,0 +1,15 @@

810

+/* { dg-do compile } */

811

+/* { dg-options "-O2 -msse2" } */

812

+

813

+#include <emmintrin.h>

814

+

815

+typedef long long T __attribute__((may_alias));

816

+struct S { __m128i d; };

817

+

818

+__m128i

819

+foo (long long *x, struct S *y, __m128i *z)

820

+{

821

+ struct S s = *y;

822

+ ((T *) &s.d)[0] = *x;

823

+ return _mm_cmpeq_epi16 (s.d, *z);

824

+}

825

Index: gcc/testsuite/gcc.target/i386/sse2-init-v2di-2.c

826

===================================================================

827

--- a/src/gcc/testsuite/gcc.target/i386/sse2-init-v2di-2.c (.../tags/gcc_4_5_3_release)

828

+++ b/src/gcc/testsuite/gcc.target/i386/sse2-init-v2di-2.c (.../branches/gcc-4_5-branch)

829

@@ -1,6 +1,6 @@

830

/* { dg-do compile } */

831

/* { dg-require-effective-target lp64 } */

832

-/* { dg-options "-O2 -msse4 -march=core2" } */

833

+/* { dg-options "-O2 -msse4 -march=core2 -dp" } */

834

835

#include <emmintrin.h>

836

837

@@ -10,4 +10,4 @@

838

return _mm_cvtsi64_si128 (b);

839

}

840

841

-/* { dg-final { scan-assembler "movq" } } */

842

+/* { dg-final { scan-assembler-times "\\*vec_concatv2di_rex64_sse4_1/3" 1 } } */

843

Index: gcc/testsuite/gcc.target/mips/reg-var-1.c

844

===================================================================

845

--- a/src/gcc/testsuite/gcc.target/mips/reg-var-1.c (.../tags/gcc_4_5_3_release)

846

+++ b/src/gcc/testsuite/gcc.target/mips/reg-var-1.c (.../branches/gcc-4_5-branch)

847

@@ -0,0 +1,16 @@

848

+/* { dg-do run } */

849

+register int g asm ("$18");

850

+

851

+void __attribute__((noinline))

852

+test (void)

853

+{

854

+ g = g + 1;

855

+}

856

+

857

+int

858

+main (void)

859

+{

860

+ g = 2;

861

+ test ();

862

+ return g != 3;

863

+}

864

Index: gcc/testsuite/gcc.dg/pr48774.c

865

===================================================================

866

--- a/src/gcc/testsuite/gcc.dg/pr48774.c (.../tags/gcc_4_5_3_release)

867

+++ b/src/gcc/testsuite/gcc.dg/pr48774.c (.../branches/gcc-4_5-branch)

868

@@ -0,0 +1,38 @@

869

+/* PR target/48774 */

870

+/* { dg-do run } */

871

+/* { dg-options "-O2 -funroll-loops" } */

872

+

873

+extern void abort (void);

874

+unsigned long int s[24]

875

+ = { 12, ~1, 12, ~2, 12, ~4, 12, ~8, 12, ~16, 12, ~32,

876

+ 12, ~64, 12, ~128, 12, ~256, 12, ~512, 12, ~1024, 12, ~2048 };

877

+struct { int n; unsigned long *e[12]; } g

878

+ = { 12, { &s[0], &s[2], &s[4], &s[6], &s[8], &s[10], &s[12], &s[14],

879

+ &s[16], &s[18], &s[20], &s[22] } };

880

+int c[12];

881

+

882

+__attribute__((noinline, noclone)) void

883

+foo (void)

884

+{

885

+ int i, j;

886

+ for (i = 0; i < g.n; i++)

887

+ for (j = 0; j < g.n; j++)

888

+ {

889

+ if (i == j && j < g.e[0][0] && (g.e[i][1] & (1UL << j)))

890

+ abort ();

891

+ if (j < g.e[0][0] && (g.e[i][1] & (1UL << j)))

892

+ c[i]++;

893

+ }

894

+}

895

+

896

+int

897

+main ()

898

+{

899

+ int i;

900

+ asm volatile ("" : "+m" (s), "+m" (g), "+m" (c));

901

+ foo ();

902

+ for (i = 0; i < 12; i++)

903

+ if (c[i] != 11)

904

+ abort ();

905

+ return 0;

906

+}

907

Index: gcc/testsuite/gcc.dg/pr48837.c

908

===================================================================

909

--- a/src/gcc/testsuite/gcc.dg/pr48837.c (.../tags/gcc_4_5_3_release)

910

+++ b/src/gcc/testsuite/gcc.dg/pr48837.c (.../branches/gcc-4_5-branch)

911

@@ -0,0 +1,30 @@

912

+/* PR tree-optimization/48837 */

913

+/* { dg-do run } */

914

+/* { dg-options "-O2" } */

915

+

916

+void abort (void);

917

+

918

+__attribute__((noinline))

919

+int baz(void)

920

+{

921

+ return 1;

922

+}

923

+

924

+inline const int *bar(const int *a, const int *b)

925

+{

926

+ return *a ? a : b;

927

+}

928

+

929

+int foo(int a, int b)

930

+{

931

+ return a || b ? baz() : foo(*bar(&a, &b), 1) + foo(1, 0);

932

+}

933

+

934

+int main(void)

935

+{

936

+ if (foo(0, 0) != 2)

937

+ abort();

938

+

939

+ return 0;

940

+}

941

+

942

Index: gcc/testsuite/gcc.dg/pr48685.c

943

===================================================================

944

--- a/src/gcc/testsuite/gcc.dg/pr48685.c (.../tags/gcc_4_5_3_release)

945

+++ b/src/gcc/testsuite/gcc.dg/pr48685.c (.../branches/gcc-4_5-branch)

946

@@ -0,0 +1,11 @@

947

+/* PR c/48685 */

948

+/* { dg-do compile } */

949

+/* { dg-options "-O2" } */

950

+

951

+int

952

+main ()

953

+{

954

+ int v = 1;

955

+ (void) (1 == 2 ? (void) 0 : (v = 0));

956

+ return v;

957

+}

958

Index: gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap4-unknown.c

959

===================================================================

960

--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap4-unknown.c (.../tags/gcc_4_5_3_release)

961

+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap4-unknown.c (.../branches/gcc-4_5-branch)

962

@@ -0,0 +1,116 @@

963

+/* { dg-require-effective-target vect_int } */

964

+

965

+#include <stdarg.h>

966

+#include <stdio.h>

967

+#include "tree-vect.h"

968

+

969

+#define N 160

970

+

971

+typedef struct {

972

+ unsigned char a;

973

+ unsigned char b;

974

+ unsigned char c;

975

+ unsigned char d;

976

+ unsigned char e;

977

+ unsigned char f;

978

+ unsigned char g;

979

+ unsigned char h;

980

+} s;

981

+

982

+__attribute__ ((noinline)) int

983

+main1 (s *arr, int n)

984

+{

985

+ int i;

986

+ s *ptr = arr;

987

+ s res[N];

988

+ unsigned char x;

989

+

990

+ for (i = 0; i < N; i++)

991

+ {

992

+ res[i].a = 0;

993

+ res[i].b = 0;

994

+ res[i].c = 0;

995

+ res[i].d = 0;

996

+ res[i].e = 0;

997

+ res[i].f = 0;

998

+ res[i].g = 0;

999

+ res[i].h = 0;

1000

+ __asm__ volatile ("");

1001

+ }

1002

+

1003

+ /* Check peeling for gaps for unknown loop bound. */

1004

+ for (i = 0; i < n; i++)

1005

+ {

1006

+ res[i].c = ptr->b + ptr->c;

1007

+ x = ptr->c + ptr->f;

1008

+ res[i].a = x + ptr->b;

1009

+ res[i].d = ptr->b + ptr->c;

1010

+ res[i].b = ptr->c;

1011

+ res[i].f = ptr->f + ptr->e;

1012

+ res[i].e = ptr->b + ptr->e;

1013

+ res[i].h = ptr->c;

1014

+ res[i].g = ptr->b + ptr->c;

1015

+ ptr++;

1016

+ }

1017

+

1018

+ /* check results: */

1019

+ for (i = 0; i < n; i++)

1020

+ {

1021

+ if (res[i].c != arr[i].b + arr[i].c

1022

+ || res[i].a != arr[i].c + arr[i].f + arr[i].b

1023

+ || res[i].d != arr[i].b + arr[i].c

1024

+ || res[i].b != arr[i].c

1025

+ || res[i].f != arr[i].f + arr[i].e

1026

+ || res[i].e != arr[i].b + arr[i].e

1027

+ || res[i].h != arr[i].c

1028

+ || res[i].g != arr[i].b + arr[i].c)

1029

+ abort ();

1030

+ }

1031

+

1032

+ /* Check also that we don't do more iterations than needed. */

1033

+ for (i = n; i < N; i++)

1034

+ {

1035

+ if (res[i].c == arr[i].b + arr[i].c

1036

+ || res[i].a == arr[i].c + arr[i].f + arr[i].b

1037

+ || res[i].d == arr[i].b + arr[i].c

1038

+ || res[i].b == arr[i].c

1039

+ || res[i].f == arr[i].f + arr[i].e

1040

+ || res[i].e == arr[i].b + arr[i].e

1041

+ || res[i].h == arr[i].c

1042

+ || res[i].g == arr[i].b + arr[i].c)

1043

+ abort ();

1044

+ }

1045

+

1046

+ return 0;

1047

+}

1048

+

1049

+

1050

+int main (void)

1051

+{

1052

+ int i;

1053

+ s arr[N];

1054

+

1055

+ check_vect ();

1056

+

1057

+ for (i = 0; i < N; i++)

1058

+ {

1059

+ arr[i].a = 5;

1060

+ arr[i].b = 6;

1061

+ arr[i].c = 17;

1062

+ arr[i].d = 3;

1063

+ arr[i].e = 16;

1064

+ arr[i].f = 16;

1065

+ arr[i].g = 3;

1066

+ arr[i].h = 56;

1067

+ if (arr[i].a == 178)

1068

+ abort();

1069

+ }

1070

+

1071

+ main1 (arr, N-2);

1072

+

1073

+ return 0;

1074

+}

1075

+

1076

+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */

1077

+/* { dg-final { cleanup-tree-dump "vect" } } */

1078

+

1079

Index: gcc/testsuite/gcc.dg/vect/pr49038.c

1080

===================================================================

1081

--- a/src/gcc/testsuite/gcc.dg/vect/pr49038.c (.../tags/gcc_4_5_3_release)

1082

+++ b/src/gcc/testsuite/gcc.dg/vect/pr49038.c (.../branches/gcc-4_5-branch)

1083

@@ -0,0 +1,42 @@

1084

+#include <sys/mman.h>

1085

+#include <stdio.h>

1086

+

1087

+#define COUNT 320

1088

+#define MMAP_SIZE 0x10000

1089

+#define ADDRESS 0x1122000000

1090

+#define TYPE unsigned short

1091

+

1092

+#ifndef MAP_ANONYMOUS

1093

+#define MAP_ANONYMOUS MAP_ANON

1094

+#endif

1095

+

1096

+void __attribute__((noinline))

1097

+foo (TYPE *__restrict a, TYPE *__restrict b)

1098

+{

1099

+ int n;

1100

+

1101

+ for (n = 0; n < COUNT; n++)

1102

+ a[n] = b[n * 2];

1103

+}

1104

+

1105

+int

1106

+main (void)

1107

+{

1108

+ void *x;

1109

+ size_t b_offset;

1110

+

1111

+ x = mmap ((void *) ADDRESS, MMAP_SIZE, PROT_READ | PROT_WRITE,

1112

+ MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);

1113

+ if (x == MAP_FAILED)

1114

+ {

1115

+ perror ("mmap");

1116

+ return 1;

1117

+ }

1118

+

1119

+ b_offset = MMAP_SIZE - (2 * COUNT - 1) * sizeof (TYPE);

1120

+ foo ((unsigned short *) x,

1121

+ (unsigned short *) ((char *) x + b_offset));

1122

+ return 0;

1123

+}

1124

+

1125

+/* { dg-final { cleanup-tree-dump "vect" } } */

1126

Index: gcc/testsuite/ChangeLog

1127

===================================================================

1128

--- a/src/gcc/testsuite/ChangeLog (.../tags/gcc_4_5_3_release)

1129

+++ b/src/gcc/testsuite/ChangeLog (.../branches/gcc-4_5-branch)

1130

@@ -1,3 +1,135 @@

1131

+2011-06-08 Kaz Kojima <kkojima@gcc.gnu.org>

1132

+

1133

+ Backport from mainline

1134

+ 2011-06-01 Kaz Kojima <kkojima@gcc.gnu.org>

1135

+

1136

+ PR target/49238

1137

+ * gcc.c-torture/compile/pr49238.c: New.

1138

+

1139

+2011-06-05 Kaz Kojima <kkojima@gcc.gnu.org>

1140

+

1141

+ Backport from mainline

1142

+ 2011-05-30 Kaz Kojima <kkojima@gcc.gnu.org>

1143

+

1144

+ PR target/49186

1145

+ * gcc.c-torture/execute/pr49186.c: New.

1146

+

1147

+2011-06-04 Ira Rosen <ira.rosen@linaro.org>

1148

+

1149

+ PR tree-optimization/49038

1150

+ * gcc.dg/vect/vect-strided-u8-i8-gap4-unknown.c: New test.

1151

+ * gcc.dg/vect/pr49038.c: New test.

1152

+

1153

+2011-06-02 Thomas Koenig <tkoenig@gcc.gnu.org>

1154

+

1155

+ Backport from trunk

1156

+ PR fortran/45786

1157

+ * gfortran.dg/operator_7.f90: New test case.

1158

+

1159

+2011-05-31 Duncan Sands <baldrick@free.fr>

1160

+

1161

+ Backported from 4.6 branch

1162

+ 2011-03-09 Martin Jambor <mjambor@suse.cz>

1163

+

1164

+ PR tree-optimization/47714

1165

+ * g++.dg/torture/pr47714.C: New test.

1166

+

1167

+2011-05-29 Richard Sandiford <rdsandiford@googlemail.com>

1168

+

1169

+ * gcc.target/mips/reg-var-1.c: New test.

1170

+

1171

+2011-05-25 Uros Bizjak <ubizjak@gmail.com>

1172

+

1173

+ PR target/49133

1174

+ * g++.dg/other/pr49133.C: New test.

1175

+

1176

+2011-05-20 Jason Merrill <jason@redhat.com>

1177

+

1178

+ * g++.dg/init/new32.C: New.

1179

+

1180

+2011-05-19 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>

1181

+

1182

+ * gcc.c-torture/execute/960321-1.x: Remove.

1183

+

1184

+2011-05-11 Michael Meissner <meissner@linux.vnet.ibm.com>

1185

+

1186

+ Backport from mainline

1187

+ 2011-05-10 Michael Meissner <meissner@linux.vnet.ibm.com>

1188

+

1189

+ PR target/48857

1190

+ * gcc.target/powerpc/pr48857.c: New file, make sure V2DI arguments

1191

+ are passed and returned in vector registers.

1192

+

1193

+2011-05-10 Jakub Jelinek <jakub@redhat.com>

1194

+

1195

+ Backported from mainline

1196

+ 2011-05-07 Zdenek Dvorak <ook@ucw.cz>

1197

+

1198

+ PR tree-optimization/48837

1199

+ * gcc.dg/pr48837.c: New testcase.

1200

+

1201

+2011-05-09 Jason Merrill <jason@redhat.com>

1202

+

1203

+ * g++.dg/template/nontype23.C: New.

1204

+

1205

+2011-05-05 Jason Merrill <jason@redhat.com>

1206

+

1207

+ * g++.dg/init/new30.C: New.

1208

+

1209

+2011-05-05 Julian Brown <julian@codesourcery.com>

1210

+

1211

+ * gcc.target/arm/neon-vset_lanes8.c: New test.

1212

+

1213

+2011-05-05 Ira Rosen <ira.rosen@linaro.org>

1214

+

1215

+ Backport from mainline:

1216

+ 2011-04-18 Ulrich Weigand <ulrich.weigand@linaro.org>

1217

+ Ira Rosen <ira.rosen@linaro.org>

1218

+

1219

+ PR target/48252

1220

+ * gcc.target/arm/pr48252.c: New test.

1221

+

1222

+2011-05-04 Uros Bizjak <ubizjak@gmail.com>

1223

+

1224

+ Backport from mainline

1225

+ 2011-04-21 Uros Bizjak <ubizjak@gmail.com>

1226

+

1227

+ PR target/48708

1228

+ * gcc.target/i386/pr48708.c: New test.

1229

+

1230

+2011-05-04 Uros Bizjak <ubizjak@gmail.com>

1231

+

1232

+ Backport from mainline

1233

+ 2010-12-08 H.J. Lu <hongjiu.lu@intel.com>

1234

+

1235

+ * gcc.target/i386/sse2-init-v2di-2.c: Add "-dp" and update

1236

+ expected scan.

1237

+

1238

+2011-05-03 Jakub Jelinek <jakub@redhat.com>

1239

+

1240

+ PR target/48774

1241

+ * gcc.dg/pr48774.c: New test.

1242

+

1243

+ Backport from mainline

1244

+ 2011-04-30 Jakub Jelinek <jakub@redhat.com>

1245

+

1246

+ PR tree-optimization/48809

1247

+ * gcc.c-torture/execute/pr48809.c: New test.

1248

+

1249

+ 2011-04-27 Jakub Jelinek <jakub@redhat.com>

1250

+

1251

+ PR c/48742

1252

+ * gcc.c-torture/compile/pr48742.c: New test.

1253

+

1254

+ 2011-04-23 Jakub Jelinek <jakub@redhat.com>

1255

+

1256

+ PR c/48685

1257

+ * gcc.dg/pr48685.c: New test.

1258

+

1259

+2011-04-27 Jason Merrill <jason@redhat.com>

1260

+

1261

+ * g++.dg/parse/ambig6.C: New.

1262

+

1263

2011-04-28 Release Manager

1264

1265

* GCC 4.5.3 released.

1266

Index: gcc/testsuite/g++.dg/other/pr49133.C

1267

===================================================================

1268

--- a/src/gcc/testsuite/g++.dg/other/pr49133.C (.../tags/gcc_4_5_3_release)

1269

+++ b/src/gcc/testsuite/g++.dg/other/pr49133.C (.../branches/gcc-4_5-branch)

1270

@@ -0,0 +1,37 @@

1271

+/* { dg-do run { target i?86-*-* x86_64-*-* } } */

1272

+/* { dg-options "-O2 -msse2" } */

1273

+/* { dg-require-effective-target sse2 } */

1274

+/* { dg-require-effective-target sse2_runtime } */

1275

+

1276

+#include <xmmintrin.h>

1277

+

1278

+extern "C" void abort ();

1279

+

1280

+typedef double double_a __attribute__((__may_alias__));

1281

+

1282

+struct V

1283

+{

1284

+ __m128d data;

1285

+};

1286

+

1287

+int

1288

+main()

1289

+{

1290

+ V a;

1291

+ __m128d b;

1292

+

1293

+ b = _mm_set_pd (1., 0.);

1294

+ a.data = _mm_set_pd (1., 0.);

1295

+ a.data = _mm_add_pd (a.data,

1296

+ _mm_and_pd (_mm_cmpeq_pd (a.data, _mm_set1_pd (0.)),

1297

+ _mm_set1_pd (2.)));

1298

+ reinterpret_cast<double_a *>(&a.data)[1] += 1.;

1299

+ b = _mm_add_pd (b, _mm_and_pd (_mm_cmpeq_pd (b, _mm_set1_pd (0.)),

1300

+ _mm_set1_pd (1.)));

1301

+ b = _mm_add_pd (b, _mm_and_pd (_mm_cmpeq_pd (b, _mm_set1_pd (1.)),

1302

+ _mm_set1_pd (1.)));

1303

+ if (_mm_movemask_pd (_mm_cmpeq_pd (a.data, b)) != 0x3)

1304

+ abort();

1305

+

1306

+ return 0;

1307

+}

1308

Index: gcc/testsuite/g++.dg/parse/ambig6.C

1309

===================================================================

1310

--- a/src/gcc/testsuite/g++.dg/parse/ambig6.C (.../tags/gcc_4_5_3_release)

1311

+++ b/src/gcc/testsuite/g++.dg/parse/ambig6.C (.../branches/gcc-4_5-branch)

1312

@@ -0,0 +1,12 @@

1313

+// PR c++/48046

1314

+

1315

+namespace N1 { typedef int T; } // { dg-error "" }

1316

+namespace N2 { typedef float T; } // { dg-error "" }

1317

+

1318

+int main()

1319

+{

1320

+ using namespace N1;

1321

+ using namespace N2;

1322

+

1323

+ static T t; // { dg-error "" }

1324

+}

1325

Index: gcc/testsuite/g++.dg/init/new30.C

1326

===================================================================

1327

--- a/src/gcc/testsuite/g++.dg/init/new30.C (.../tags/gcc_4_5_3_release)

1328

+++ b/src/gcc/testsuite/g++.dg/init/new30.C (.../branches/gcc-4_5-branch)

1329

@@ -0,0 +1,15 @@

1330

+// PR c++/40975

1331

+

1332

+struct data_type

1333

+{

1334

+ // constructor required to reproduce compiler bug

1335

+ data_type() {}

1336

+};

1337

+

1338

+struct ptr_type

1339

+{

1340

+ // array new as default argument required to reproduce compiler bug

1341

+ ptr_type (data_type* ptr = new data_type[1]) { delete[] ptr; }

1342

+};

1343

+

1344

+ptr_type obj;

1345

Index: gcc/testsuite/g++.dg/init/new32.C

1346

===================================================================

1347

--- a/src/gcc/testsuite/g++.dg/init/new32.C (.../tags/gcc_4_5_3_release)

1348

+++ b/src/gcc/testsuite/g++.dg/init/new32.C (.../branches/gcc-4_5-branch)

1349

@@ -0,0 +1,16 @@

1350

+// PR c++/48873

1351

+

1352

+#include <new>

1353

+

1354

+struct D {

1355

+private:

1356

+ ~D();

1357

+};

1358

+

1359

+template<class T>

1360

+T& create();

1361

+

1362

+void f()

1363

+{

1364

+ D* dp = new (((void*) 0)) D(create<D>()); // #

1365

+}

1366

Index: gcc/testsuite/g++.dg/torture/pr47714.C

1367

===================================================================

1368

--- a/src/gcc/testsuite/g++.dg/torture/pr47714.C (.../tags/gcc_4_5_3_release)

1369

+++ b/src/gcc/testsuite/g++.dg/torture/pr47714.C (.../branches/gcc-4_5-branch)

1370

@@ -0,0 +1,16 @@

1371

+struct A { virtual ~A () {} };

1372

+struct B { virtual ~B () {} };

1373

+struct C { virtual const A *foo (int) const = 0; };

1374

+struct E : public B, public A { };

1375

+struct F : public C

1376

+{

1377

+ virtual const E *foo (int) const;

1378

+};

1379

+void bar (int &);

1380

+

1381

+const E *

1382

+F::foo (int x) const

1383

+{

1384

+ bar (x);

1385

+ return __null;

1386

+}

1387

Index: gcc/testsuite/g++.dg/template/nontype23.C

1388

===================================================================

1389

--- a/src/gcc/testsuite/g++.dg/template/nontype23.C (.../tags/gcc_4_5_3_release)

1390

+++ b/src/gcc/testsuite/g++.dg/template/nontype23.C (.../branches/gcc-4_5-branch)

1391

@@ -0,0 +1,9 @@

1392

+// PR c++/48936

1393

+

1394

+template <bool C> int foo (void);

1395

+template <class T> struct S

1396

+{

1397

+ static const unsigned int a = sizeof (T);

1398

+ enum { c = sizeof (foo <(a == 0)> ()) };

1399

+};

1400

+S<int> x;

1401

Index: gcc/testsuite/gfortran.dg/operator_7.f90

1402

===================================================================

1403

--- a/src/gcc/testsuite/gfortran.dg/operator_7.f90 (.../tags/gcc_4_5_3_release)

1404

+++ b/src/gcc/testsuite/gfortran.dg/operator_7.f90 (.../branches/gcc-4_5-branch)

1405

@@ -0,0 +1,27 @@

1406

+! { dg-do compile }

1407

+! PR fortran/45786 - operators were not correctly marked as public

1408

+! if the alternative form was used.

1409

+! Test case contributed by Neil Carlson.

1410

+module foo_type

1411

+ private

1412

+ public :: foo, operator(==)

1413

+ type :: foo

1414

+ integer :: bar

1415

+ end type

1416

+ interface operator(.eq.)

1417

+ module procedure eq_foo

1418

+ end interface

1419

+contains

1420

+ logical function eq_foo (a, b)

1421

+ type(foo), intent(in) :: a, b

1422

+ eq_foo = (a%bar == b%bar)

1423

+ end function

1424

+end module

1425

+

1426

+ subroutine use_it (a, b)

1427

+ use foo_type

1428

+ type(foo) :: a, b

1429

+ print *, a == b

1430

+end subroutine

1431

+

1432

+! { dg-final { cleanup-modules "foo_type" } }

1433

Index: gcc/cp/method.c

1434

===================================================================

1435

--- a/src/gcc/cp/method.c (.../tags/gcc_4_5_3_release)

1436

+++ b/src/gcc/cp/method.c (.../branches/gcc-4_5-branch)

1437

@@ -374,6 +374,7 @@

1438

DECL_CONTEXT (x) = thunk_fndecl;

1439

SET_DECL_RTL (x, NULL_RTX);

1440

DECL_HAS_VALUE_EXPR_P (x) = 0;

1441

+ TREE_ADDRESSABLE (x) = 0;

1442

t = x;

1443

}

1444

a = nreverse (t);

1445

Index: gcc/cp/tree.c

1446

===================================================================

1447

--- a/src/gcc/cp/tree.c (.../tags/gcc_4_5_3_release)

1448

+++ b/src/gcc/cp/tree.c (.../branches/gcc-4_5-branch)

1449

@@ -2954,7 +2954,8 @@

1450

if (!TREE_SIDE_EFFECTS (exp))

1451

init_expr = NULL_TREE;

1452

else if (!real_lvalue_p (exp)

1453

- || !TYPE_NEEDS_CONSTRUCTING (TREE_TYPE (exp)))

1454

+ || (!TYPE_NEEDS_CONSTRUCTING (TREE_TYPE (exp))

1455

+ && !TYPE_HAS_NONTRIVIAL_DESTRUCTOR (TREE_TYPE (exp))))

1456

{

1457

init_expr = get_target_expr (exp);

1458

exp = TARGET_EXPR_SLOT (init_expr);

1459

Index: gcc/cp/ChangeLog

1460

===================================================================

1461

--- a/src/gcc/cp/ChangeLog (.../tags/gcc_4_5_3_release)

1462

+++ b/src/gcc/cp/ChangeLog (.../branches/gcc-4_5-branch)

1463

@@ -1,3 +1,28 @@

1464

+2011-05-31 Duncan Sands <baldrick@free.fr>

1465

+

1466

+ Backported from 4.6 branch

1467

+ 2011-03-09 Martin Jambor <mjambor@suse.cz>

1468

+

1469

+ PR tree-optimization/47714

1470

+ * method.c (use_thunk): Clear addressable flag of thunk arguments.

1471

+

1472

+2011-05-20 Jason Merrill <jason@redhat.com>

1473

+

1474

+ PR c++/48873

1475

+ * tree.c (stabilize_expr): Don't make gratuitous copies of classes.

1476

+

1477

+2011-05-09 Jason Merrill <jason@redhat.com>

1478

+

1479

+ PR c++/48936

1480

+ * decl2.c (mark_used): Instantiate constant variables even

1481

+ in unevaluated context.

1482

+

1483

+2011-04-27 Jason Merrill <jason@redhat.com>

1484

+

1485

+ PR c++/48046

1486

+ * parser.c (cp_parser_diagnose_invalid_type_name): Commit

1487

+ to tentative parse sooner.

1488

+

1489

2011-04-28 Release Manager

1490

1491

* GCC 4.5.3 released.

1492

Index: gcc/cp/decl2.c

1493

===================================================================

1494

--- a/src/gcc/cp/decl2.c (.../tags/gcc_4_5_3_release)

1495

+++ b/src/gcc/cp/decl2.c (.../branches/gcc-4_5-branch)

1496

@@ -3991,8 +3991,6 @@

1497

void

1498

mark_used (tree decl)

1499

{

1500

- HOST_WIDE_INT saved_processing_template_decl = 0;

1501

-

1502

/* If DECL is a BASELINK for a single function, then treat it just

1503

like the DECL for the function. Otherwise, if the BASELINK is

1504

for an overloaded function, we don't know which function was

1505

@@ -4029,9 +4027,6 @@

1506

error ("used here");

1507

return;

1508

}

1509

- /* If we don't need a value, then we don't need to synthesize DECL. */

1510

- if (cp_unevaluated_operand != 0)

1511

- return;

1512

1513

/* We can only check DECL_ODR_USED on variables or functions with

1514

DECL_LANG_SPECIFIC set, and these are also the only decls that we

1515

@@ -4059,9 +4054,10 @@

1516

DECL. However, if DECL is a static data member initialized with

1517

a constant, we need the value right now because a reference to

1518

such a data member is not value-dependent. */

1519

- if (TREE_CODE (decl) == VAR_DECL

1520

- && DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P (decl)

1521

- && DECL_CLASS_SCOPE_P (decl))

1522

+ if (DECL_INTEGRAL_CONSTANT_VAR_P (decl)

1523

+ && !DECL_INITIAL (decl)

1524

+ && DECL_LANG_SPECIFIC (decl)

1525

+ && DECL_TEMPLATE_INSTANTIATION (decl))

1526

{

1527

/* Don't try to instantiate members of dependent types. We

1528

cannot just use dependent_type_p here because this function

1529

@@ -4071,12 +4067,14 @@

1530

if (CLASSTYPE_TEMPLATE_INFO ((DECL_CONTEXT (decl)))

1531

&& uses_template_parms (CLASSTYPE_TI_ARGS (DECL_CONTEXT (decl))))

1532

return;

1533

- /* Pretend that we are not in a template, even if we are, so

1534

- that the static data member initializer will be processed. */

1535

- saved_processing_template_decl = processing_template_decl;

1536

- processing_template_decl = 0;

1537

+ instantiate_decl (decl, /*defer_ok=*/false,

1538

+ /*expl_inst_class_mem_p=*/false);

1539

}

1540

1541

+ /* If we don't need a value, then we don't need to synthesize DECL. */

1542

+ if (cp_unevaluated_operand != 0)

1543

+ return;

1544

+

1545

if (processing_template_decl)

1546

return;

1547

1548

@@ -4149,8 +4147,6 @@

1549

need. Therefore, we always try to defer instantiation. */

1550

instantiate_decl (decl, /*defer_ok=*/true,

1551

/*expl_inst_class_mem_p=*/false);

1552

-

1553

- processing_template_decl = saved_processing_template_decl;

1554

}

1555

1556

#include "gt-cp-decl2.h"

1557

Index: gcc/cp/parser.c

1558

===================================================================

1559

--- a/src/gcc/cp/parser.c (.../tags/gcc_4_5_3_release)

1560

+++ b/src/gcc/cp/parser.c (.../branches/gcc-4_5-branch)

1561

@@ -2333,6 +2333,7 @@

1562

location_t location)

1563

{

1564

tree decl, old_scope;

1565

+ cp_parser_commit_to_tentative_parse (parser);

1566

/* Try to lookup the identifier. */

1567

old_scope = parser->scope;

1568

parser->scope = scope;

1569

@@ -2423,7 +2424,6 @@

1570

else

1571

gcc_unreachable ();

1572

}

1573

- cp_parser_commit_to_tentative_parse (parser);

1574

}

1575

1576

/* Check for a common situation where a type-name should be present,

1577

Index: gcc/caller-save.c

1578

===================================================================

1579

--- a/src/gcc/caller-save.c (.../tags/gcc_4_5_3_release)

1580

+++ b/src/gcc/caller-save.c (.../branches/gcc-4_5-branch)

1581

@@ -439,101 +439,93 @@

1582

void

1583

setup_save_areas (void)

1584

{

1585

- int i, j, k;

1586

- unsigned int r;

1587

+ int i, j, k, freq;

1588

HARD_REG_SET hard_regs_used;

1589

+ struct saved_hard_reg *saved_reg;

1590

+ rtx insn;

1591

+ struct insn_chain *chain, *next;

1592

+ unsigned int regno;

1593

+ HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets;

1594

+ reg_set_iterator rsi;

1595

1596

- /* Allocate space in the save area for the largest multi-register

1597

- pseudos first, then work backwards to single register

1598

- pseudos. */

1599

-

1600

- /* Find and record all call-used hard-registers in this function. */

1601

CLEAR_HARD_REG_SET (hard_regs_used);

1602

- for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)

1603

- if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)

1604

- {

1605

- unsigned int regno = reg_renumber[i];

1606

- unsigned int endregno

1607

- = end_hard_regno (GET_MODE (regno_reg_rtx[i]), regno);

1608

- for (r = regno; r < endregno; r++)

1609

- if (call_used_regs[r])

1610

- SET_HARD_REG_BIT (hard_regs_used, r);

1611

- }

1612

1613

- if (optimize && flag_ira_share_save_slots)

1614

+ /* Find every CALL_INSN and record which hard regs are live across the

1615

+ call into HARD_REG_MAP and HARD_REGS_USED. */

1616

+ initiate_saved_hard_regs ();

1617

+ /* Create hard reg saved regs. */

1618

+ for (chain = reload_insn_chain; chain != 0; chain = next)

1619

{

1620

- rtx insn, slot;

1621

- struct insn_chain *chain, *next;

1622

- char *saved_reg_conflicts;

1623

- unsigned int regno;

1624

- int next_k, freq;

1625

- struct saved_hard_reg *saved_reg, *saved_reg2, *saved_reg3;

1626

- int call_saved_regs_num;

1627

- struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER];

1628

- HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets;

1629

- reg_set_iterator rsi;

1630

- int best_slot_num;

1631

- int prev_save_slots_num;

1632

- rtx prev_save_slots[FIRST_PSEUDO_REGISTER];

1633

+ insn = chain->insn;

1634

+ next = chain->next;

1635

+ if (!CALL_P (insn)

1636

+ || find_reg_note (insn, REG_NORETURN, NULL))

1637

+ continue;

1638

+ freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn));

1639

+ REG_SET_TO_HARD_REG_SET (hard_regs_to_save,

1640

+ &chain->live_throughout);

1641

+ COPY_HARD_REG_SET (used_regs, call_used_reg_set);

1642

1643

- initiate_saved_hard_regs ();

1644

- /* Create hard reg saved regs. */

1645

- for (chain = reload_insn_chain; chain != 0; chain = next)

1646

+ /* Record all registers set in this call insn. These don't

1647

+ need to be saved. N.B. the call insn might set a subreg

1648

+ of a multi-hard-reg pseudo; then the pseudo is considered

1649

+ live during the call, but the subreg that is set

1650

+ isn't. */

1651

+ CLEAR_HARD_REG_SET (this_insn_sets);

1652

+ note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);

1653

+ /* Sibcalls are considered to set the return value. */

1654

+ if (SIBLING_CALL_P (insn) && crtl->return_rtx)

1655

+ mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);

1656

+

1657

+ AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);

1658

+ AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);

1659

+ AND_HARD_REG_SET (hard_regs_to_save, used_regs);

1660

+ for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)

1661

+ if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))

1662

+ {

1663

+ if (hard_reg_map[regno] != NULL)

1664

+ hard_reg_map[regno]->call_freq += freq;

1665

+ else

1666

+ saved_reg = new_saved_hard_reg (regno, freq);

1667

+ SET_HARD_REG_BIT (hard_regs_used, regno);

1668

+ }

1669

+ /* Look through all live pseudos, mark their hard registers. */

1670

+ EXECUTE_IF_SET_IN_REG_SET

1671

+ (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)

1672

{

1673

- insn = chain->insn;

1674

- next = chain->next;

1675

- if (!CALL_P (insn)

1676

- || find_reg_note (insn, REG_NORETURN, NULL))

1677

+ int r = reg_renumber[regno];

1678

+ int bound;

1679

+

1680

+ if (r < 0)

1681

continue;

1682

- freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn));

1683

- REG_SET_TO_HARD_REG_SET (hard_regs_to_save,

1684

- &chain->live_throughout);

1685

- COPY_HARD_REG_SET (used_regs, call_used_reg_set);

1686

1687

- /* Record all registers set in this call insn. These don't

1688

- need to be saved. N.B. the call insn might set a subreg

1689

- of a multi-hard-reg pseudo; then the pseudo is considered

1690

- live during the call, but the subreg that is set

1691

- isn't. */

1692

- CLEAR_HARD_REG_SET (this_insn_sets);

1693

- note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);

1694

- /* Sibcalls are considered to set the return value. */

1695

- if (SIBLING_CALL_P (insn) && crtl->return_rtx)

1696

- mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);

1697

-

1698

- AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);

1699

- AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);

1700

- AND_HARD_REG_SET (hard_regs_to_save, used_regs);

1701

- for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)

1702

- if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))

1703

+ bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];

1704

+ for (; r < bound; r++)

1705

+ if (TEST_HARD_REG_BIT (used_regs, r))

1706

{

1707

- if (hard_reg_map[regno] != NULL)

1708

- hard_reg_map[regno]->call_freq += freq;

1709

+ if (hard_reg_map[r] != NULL)

1710

+ hard_reg_map[r]->call_freq += freq;

1711

else

1712

- saved_reg = new_saved_hard_reg (regno, freq);

1713

+ saved_reg = new_saved_hard_reg (r, freq);

1714

+ SET_HARD_REG_BIT (hard_regs_to_save, r);

1715

+ SET_HARD_REG_BIT (hard_regs_used, r);

1716

}

1717

- /* Look through all live pseudos, mark their hard registers. */

1718

- EXECUTE_IF_SET_IN_REG_SET

1719

- (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)

1720

- {

1721

- int r = reg_renumber[regno];

1722

- int bound;

1723

+ }

1724

+ }

1725

1726

- if (r < 0)

1727

- continue;

1728

+ /* If requested, figure out which hard regs can share save slots. */

1729

+ if (optimize && flag_ira_share_save_slots)

1730

+ {

1731

+ rtx slot;

1732

+ char *saved_reg_conflicts;

1733

+ int next_k;

1734

+ struct saved_hard_reg *saved_reg2, *saved_reg3;

1735

+ int call_saved_regs_num;

1736

+ struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER];

1737

+ int best_slot_num;

1738

+ int prev_save_slots_num;

1739

+ rtx prev_save_slots[FIRST_PSEUDO_REGISTER];

1740

1741

- bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];

1742

- for (; r < bound; r++)

1743

- if (TEST_HARD_REG_BIT (used_regs, r))

1744

- {

1745

- if (hard_reg_map[r] != NULL)

1746

- hard_reg_map[r]->call_freq += freq;

1747

- else

1748

- saved_reg = new_saved_hard_reg (r, freq);

1749

- SET_HARD_REG_BIT (hard_regs_to_save, r);

1750

- }

1751

- }

1752

- }

1753

/* Find saved hard register conflicts. */

1754

saved_reg_conflicts = (char *) xmalloc (saved_regs_num * saved_regs_num);

1755

memset (saved_reg_conflicts, 0, saved_regs_num * saved_regs_num);

1756

@@ -691,8 +683,10 @@

1757

}

1758

else

1759

{

1760

- /* Now run through all the call-used hard-registers and allocate

1761

- space for them in the caller-save area. Try to allocate space

1762

+ /* We are not sharing slots.

1763

+

1764

+ Run through all the call-used hard-registers and allocate

1765

+ space for each in the caller-save area. Try to allocate space

1766

in a manner which allows multi-register saves/restores to be done. */

1767

1768

for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)

1769

Index: gcc/ifcvt.c

1770

===================================================================

1771

--- a/src/gcc/ifcvt.c (.../tags/gcc_4_5_3_release)

1772

+++ b/src/gcc/ifcvt.c (.../branches/gcc-4_5-branch)

1773

@@ -3818,7 +3818,7 @@

1774

basic_block other_bb, basic_block new_dest, int reversep)

1775

{

1776

rtx head, end, jump, earliest = NULL_RTX, old_dest, new_label = NULL_RTX;

1777

- bitmap merge_set = NULL;

1778

+ bitmap merge_set = NULL, merge_set_noclobber = NULL;

1779

/* Number of pending changes. */

1780

int n_validated_changes = 0;

1781

1782

@@ -3951,11 +3951,14 @@

1783

1784

/* Collect:

1785

MERGE_SET = set of registers set in MERGE_BB

1786

+ MERGE_SET_NOCLOBBER = like MERGE_SET, but only includes registers

1787

+ that are really set, not just clobbered.

1788

TEST_LIVE = set of registers live at EARLIEST

1789

- TEST_SET = set of registers set between EARLIEST and the

1790

- end of the block. */

1791

+ TEST_SET = set of registers set between EARLIEST and the

1792

+ end of the block. */

1793

1794

merge_set = BITMAP_ALLOC (&reg_obstack);

1795

+ merge_set_noclobber = BITMAP_ALLOC (&reg_obstack);

1796

1797

/* If we allocated new pseudos (e.g. in the conditional move

1798

expander called from noce_emit_cmove), we must resize the

1799

@@ -3967,13 +3970,8 @@

1800

{

1801

if (NONDEBUG_INSN_P (insn))

1802

{

1803

- unsigned int uid = INSN_UID (insn);

1804

- df_ref *def_rec;

1805

- for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)

1806

- {

1807

- df_ref def = *def_rec;

1808

- bitmap_set_bit (merge_set, DF_REF_REGNO (def));

1809

- }

1810

+ df_simulate_find_defs (insn, merge_set);

1811

+ df_simulate_find_noclobber_defs (insn, merge_set_noclobber);

1812

}

1813

}

1814

1815

@@ -3984,7 +3982,7 @@

1816

unsigned i;

1817

bitmap_iterator bi;

1818

1819

- EXECUTE_IF_SET_IN_BITMAP (merge_set, 0, i, bi)

1820

+ EXECUTE_IF_SET_IN_BITMAP (merge_set_noclobber, 0, i, bi)

1821

{

1822

if (i < FIRST_PSEUDO_REGISTER

1823

&& ! fixed_regs[i]

1824

@@ -4015,12 +4013,14 @@

1825

}

1826

1827

/* We can perform the transformation if

1828

- MERGE_SET & (TEST_SET | TEST_LIVE)

1829

+ MERGE_SET_NOCLOBBER & TEST_SET

1830

and

1831

+ MERGE_SET & TEST_LIVE

1832

+ and

1833

TEST_SET & DF_LIVE_IN (merge_bb)

1834

are empty. */

1835

1836

- if (bitmap_intersect_p (merge_set, test_set)

1837

+ if (bitmap_intersect_p (merge_set_noclobber, test_set)

1838

|| bitmap_intersect_p (merge_set, test_live)

1839

|| bitmap_intersect_p (test_set, df_get_live_in (merge_bb)))

1840

intersect = true;

1841

@@ -4104,10 +4104,11 @@

1842

unsigned i;

1843

bitmap_iterator bi;

1844

1845

- EXECUTE_IF_SET_IN_BITMAP (merge_set, 0, i, bi)

1846

+ EXECUTE_IF_SET_IN_BITMAP (merge_set_noclobber, 0, i, bi)

1847

remove_reg_equal_equiv_notes_for_regno (i);

1848

1849

BITMAP_FREE (merge_set);

1850

+ BITMAP_FREE (merge_set_noclobber);

1851

}

1852

1853

reorder_insns (head, end, PREV_INSN (earliest));

1854

@@ -4128,7 +4129,10 @@

1855

cancel_changes (0);

1856

fail:

1857

if (merge_set)

1858

- BITMAP_FREE (merge_set);

1859

+ {

1860

+ BITMAP_FREE (merge_set);

1861

+ BITMAP_FREE (merge_set_noclobber);

1862

+ }

1863

return FALSE;

1864

}

1865

1866

Index: gcc/fortran/interface.c

1867

===================================================================

1868

--- a/src/gcc/fortran/interface.c (.../tags/gcc_4_5_3_release)

1869

+++ b/src/gcc/fortran/interface.c (.../branches/gcc-4_5-branch)

1870

@@ -1213,7 +1213,55 @@

1871

}

1872

}

1873

1874

+/* Given an intrinsic op, return an equivalent op if one exists,

1875

+ or INTRINSIC_NONE otherwise. */

1876

1877

+gfc_intrinsic_op

1878

+gfc_equivalent_op (gfc_intrinsic_op op)

1879

+{

1880

+ switch(op)

1881

+ {

1882

+ case INTRINSIC_EQ:

1883

+ return INTRINSIC_EQ_OS;

1884

+

1885

+ case INTRINSIC_EQ_OS:

1886

+ return INTRINSIC_EQ;

1887

+

1888

+ case INTRINSIC_NE:

1889

+ return INTRINSIC_NE_OS;

1890

+

1891

+ case INTRINSIC_NE_OS:

1892

+ return INTRINSIC_NE;

1893

+

1894

+ case INTRINSIC_GT:

1895

+ return INTRINSIC_GT_OS;

1896

+

1897

+ case INTRINSIC_GT_OS:

1898

+ return INTRINSIC_GT;

1899

+

1900

+ case INTRINSIC_GE:

1901

+ return INTRINSIC_GE_OS;

1902

+

1903

+ case INTRINSIC_GE_OS:

1904

+ return INTRINSIC_GE;

1905

+

1906

+ case INTRINSIC_LT:

1907

+ return INTRINSIC_LT_OS;

1908

+

1909

+ case INTRINSIC_LT_OS:

1910

+ return INTRINSIC_LT;

1911

+

1912

+ case INTRINSIC_LE:

1913

+ return INTRINSIC_LE_OS;

1914

+

1915

+ case INTRINSIC_LE_OS:

1916

+ return INTRINSIC_LE;

1917

+

1918

+ default:

1919

+ return INTRINSIC_NONE;

1920

+ }

1921

+}

1922

+

1923

/* For the namespace, check generic, user operator and intrinsic

1924

operator interfaces for consistency and to remove duplicate

1925

interfaces. We traverse the whole namespace, counting on the fact

1926

@@ -1253,75 +1301,19 @@

1927

1928

for (ns2 = ns; ns2; ns2 = ns2->parent)

1929

{

1930

+ gfc_intrinsic_op other_op;

1931

+

1932

if (check_interface1 (ns->op[i], ns2->op[i], 0,

1933

interface_name, true))

1934

goto done;

1935

1936

- switch (i)

1937

- {

1938

- case INTRINSIC_EQ:

1939

- if (check_interface1 (ns->op[i], ns2->op[INTRINSIC_EQ_OS],

1940

- 0, interface_name, true)) goto done;

1941

- break;

1942

-

1943

- case INTRINSIC_EQ_OS:

1944

- if (check_interface1 (ns->op[i], ns2->op[INTRINSIC_EQ],

1945

- 0, interface_name, true)) goto done;

1946

- break;

1947

-

1948

- case INTRINSIC_NE:

1949

- if (check_interface1 (ns->op[i], ns2->op[INTRINSIC_NE_OS],

1950

- 0, interface_name, true)) goto done;

1951

- break;

1952

-

1953

- case INTRINSIC_NE_OS:

1954

- if (check_interface1 (ns->op[i], ns2->op[INTRINSIC_NE],

1955

- 0, interface_name, true)) goto done;

1956

- break;

1957

-

1958

- case INTRINSIC_GT:

1959

- if (check_interface1 (ns->op[i], ns2->op[INTRINSIC_GT_OS],

1960

- 0, interface_name, true)) goto done;

1961

- break;

1962

-

1963

- case INTRINSIC_GT_OS:

1964

- if (check_interface1 (ns->op[i], ns2->op[INTRINSIC_GT],

1965

- 0, interface_name, true)) goto done;

1966

- break;

1967

-

1968

- case INTRINSIC_GE:

1969

- if (check_interface1 (ns->op[i], ns2->op[INTRINSIC_GE_OS],

1970

- 0, interface_name, true)) goto done;

1971

- break;

1972

-

1973

- case INTRINSIC_GE_OS:

1974

- if (check_interface1 (ns->op[i], ns2->op[INTRINSIC_GE],

1975

- 0, interface_name, true)) goto done;

1976

- break;

1977

-

1978

- case INTRINSIC_LT:

1979

- if (check_interface1 (ns->op[i], ns2->op[INTRINSIC_LT_OS],

1980

- 0, interface_name, true)) goto done;

1981

- break;

1982

-

1983

- case INTRINSIC_LT_OS:

1984

- if (check_interface1 (ns->op[i], ns2->op[INTRINSIC_LT],

1985

- 0, interface_name, true)) goto done;

1986

- break;

1987

-

1988

- case INTRINSIC_LE:

1989

- if (check_interface1 (ns->op[i], ns2->op[INTRINSIC_LE_OS],

1990

- 0, interface_name, true)) goto done;

1991

- break;

1992

-

1993

- case INTRINSIC_LE_OS:

1994

- if (check_interface1 (ns->op[i], ns2->op[INTRINSIC_LE],

1995

- 0, interface_name, true)) goto done;

1996

- break;

1997

-

1998

- default:

1999

- break;

2000

- }

2001

+ /* i should be gfc_intrinsic_op, but has to be int with this cast

2002

+ here for stupid C++ compatibility rules. */

2003

+ other_op = gfc_equivalent_op ((gfc_intrinsic_op) i);

2004

+ if (other_op != INTRINSIC_NONE

2005

+ && check_interface1 (ns->op[i], ns2->op[other_op],

2006

+ 0, interface_name, true))

2007

+ goto done;

2008

}

2009

}

2010

2011

Index: gcc/fortran/decl.c

2012

===================================================================

2013

--- a/src/gcc/fortran/decl.c (.../tags/gcc_4_5_3_release)

2014

+++ b/src/gcc/fortran/decl.c (.../branches/gcc-4_5-branch)

2015

@@ -6062,8 +6062,19 @@

2016

case INTERFACE_INTRINSIC_OP:

2017

if (gfc_current_ns->operator_access[op] == ACCESS_UNKNOWN)

2018

{

2019

+ gfc_intrinsic_op other_op;

2020

+

2021

gfc_current_ns->operator_access[op] =

2022

(st == ST_PUBLIC) ? ACCESS_PUBLIC : ACCESS_PRIVATE;

2023

+

2024

+ /* Handle the case if there is another op with the same

2025

+ function, for INTRINSIC_EQ vs. INTRINSIC_EQ_OS and so on. */

2026

+ other_op = gfc_equivalent_op (op);

2027

+

2028

+ if (other_op != INTRINSIC_NONE)

2029

+ gfc_current_ns->operator_access[other_op] =

2030

+ (st == ST_PUBLIC) ? ACCESS_PUBLIC : ACCESS_PRIVATE;

2031

+

2032

}

2033

else

2034

{

2035

Index: gcc/fortran/gfortran.h

2036

===================================================================

2037

--- a/src/gcc/fortran/gfortran.h (.../tags/gcc_4_5_3_release)

2038

+++ b/src/gcc/fortran/gfortran.h (.../branches/gcc-4_5-branch)

2039

@@ -2718,6 +2718,7 @@

2040

gfc_symtree* gfc_find_sym_in_symtree (gfc_symbol*);

2041

bool gfc_arglist_matches_symbol (gfc_actual_arglist**, gfc_symbol*);

2042

bool gfc_check_operator_interface (gfc_symbol*, gfc_intrinsic_op, locus);

2043

+gfc_intrinsic_op gfc_equivalent_op (gfc_intrinsic_op);

2044

2045

/* io.c */

2046

extern gfc_st_label format_asterisk;

2047

Index: gcc/fortran/ChangeLog

2048

===================================================================

2049

--- a/src/gcc/fortran/ChangeLog (.../tags/gcc_4_5_3_release)

2050

+++ b/src/gcc/fortran/ChangeLog (.../branches/gcc-4_5-branch)

2051

@@ -1,3 +1,13 @@

2052

+2011-06-02 Thomas Koenig <tkoenig@gcc.gnu.org>

2053

+

2054

+ Backport from trunk

2055

+ PR fortran/45786

2056

+ * interface.c (gfc_equivalent_op): New function.

2057

+ (gfc_check_interface): Use gfc_equivalent_op instead

2058

+ of switch statement.

2059

+ * decl.c (access_attr_decl): Also set access to an

2060

+ equivalent operator.

2061

+

2062

2011-04-28 Release Manager

2063

2064

* GCC 4.5.3 released.

2065

Index: gcc/tree-vectorizer.h

2066

===================================================================

2067

--- a/src/gcc/tree-vectorizer.h (.../tags/gcc_4_5_3_release)

2068

+++ b/src/gcc/tree-vectorizer.h (.../branches/gcc-4_5-branch)

2069

@@ -242,6 +242,12 @@

2070

/* The unrolling factor needed to SLP the loop. In case of that pure SLP is

2071

applied to the loop, i.e., no unrolling is needed, this is 1. */

2072

unsigned slp_unrolling_factor;

2073

+

2074

+ /* When we have strided data accesses with gaps, we may introduce invalid

2075

+ memory accesses. We peel the last iteration of the loop to prevent

2076

+ this. */

2077

+ bool peeling_for_gaps;

2078

+

2079

} *loop_vec_info;

2080

2081

/* Access Functions. */

2082

@@ -266,6 +272,7 @@

2083

#define LOOP_VINFO_STRIDED_STORES(L) (L)->strided_stores

2084

#define LOOP_VINFO_SLP_INSTANCES(L) (L)->slp_instances

2085

#define LOOP_VINFO_SLP_UNROLLING_FACTOR(L) (L)->slp_unrolling_factor

2086

+#define LOOP_VINFO_PEELING_FOR_GAPS(L) (L)->peeling_for_gaps

2087

2088

#define LOOP_REQUIRES_VERSIONING_FOR_ALIGNMENT(L) \

2089

VEC_length (gimple, (L)->may_misalign_stmts) > 0

2090

Index: gcc/df.h

2091

===================================================================

2092

--- a/src/gcc/df.h (.../tags/gcc_4_5_3_release)

2093

+++ b/src/gcc/df.h (.../branches/gcc-4_5-branch)

2094

@@ -978,6 +978,7 @@

2095

extern void df_md_add_problem (void);

2096

extern void df_md_simulate_artificial_defs_at_top (basic_block, bitmap);

2097

extern void df_md_simulate_one_insn (basic_block, rtx, bitmap);

2098

+extern void df_simulate_find_noclobber_defs (rtx, bitmap);

2099

extern void df_simulate_find_defs (rtx, bitmap);

2100

extern void df_simulate_defs (rtx, bitmap);

2101

extern void df_simulate_uses (rtx, bitmap);

2102

Index: gcc/tree-vect-loop.c

2103

===================================================================

2104

--- a/src/gcc/tree-vect-loop.c (.../tags/gcc_4_5_3_release)

2105

+++ b/src/gcc/tree-vect-loop.c (.../branches/gcc-4_5-branch)

2106

@@ -711,6 +711,7 @@

2107

LOOP_VINFO_STRIDED_STORES (res) = VEC_alloc (gimple, heap, 10);

2108

LOOP_VINFO_SLP_INSTANCES (res) = VEC_alloc (slp_instance, heap, 10);

2109

LOOP_VINFO_SLP_UNROLLING_FACTOR (res) = 1;

2110

+ LOOP_VINFO_PEELING_FOR_GAPS (res) = false;

2111

2112

return res;

2113

}

2114

@@ -2053,6 +2054,10 @@

2115

peel_iters_prologue = niters < peel_iters_prologue ?

2116

niters : peel_iters_prologue;

2117

peel_iters_epilogue = (niters - peel_iters_prologue) % vf;

2118

+ /* If we need to peel for gaps, but no peeling is required, we have

2119

+ to peel VF iterations. */

2120

+ if (LOOP_VINFO_PEELING_FOR_GAPS (loop_vinfo) && !peel_iters_epilogue)

2121

+ peel_iters_epilogue = vf;

2122

}

2123

}

2124

2125

@@ -4212,7 +4217,8 @@

2126

do_peeling_for_loop_bound

2127

= (!LOOP_VINFO_NITERS_KNOWN_P (loop_vinfo)

2128

|| (LOOP_VINFO_NITERS_KNOWN_P (loop_vinfo)

2129

- && LOOP_VINFO_INT_NITERS (loop_vinfo) % vectorization_factor != 0));

2130

+ && LOOP_VINFO_INT_NITERS (loop_vinfo) % vectorization_factor != 0)

2131

+ || LOOP_VINFO_PEELING_FOR_GAPS (loop_vinfo));

2132

2133

if (LOOP_REQUIRES_VERSIONING_FOR_ALIGNMENT (loop_vinfo)

2134

|| LOOP_REQUIRES_VERSIONING_FOR_ALIAS (loop_vinfo))

2135

Index: gcc/tree-vect-data-refs.c

2136

===================================================================

2137

--- a/src/gcc/tree-vect-data-refs.c (.../tags/gcc_4_5_3_release)

2138

+++ b/src/gcc/tree-vect-data-refs.c (.../branches/gcc-4_5-branch)

2139

@@ -1450,7 +1450,7 @@

2140

loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_info);

2141

bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_info);

2142

HOST_WIDE_INT dr_step = TREE_INT_CST_LOW (step);

2143

- HOST_WIDE_INT stride;

2144

+ HOST_WIDE_INT stride, last_accessed_element = 1;

2145

bool slp_impossible = false;

2146

2147

/* For interleaving, STRIDE is STEP counted in elements, i.e., the size of the

2148

@@ -1479,6 +1479,16 @@

2149

fprintf (vect_dump, " step ");

2150

print_generic_expr (vect_dump, step, TDF_SLIM);

2151

}

2152

+

2153

+ if (loop_vinfo)

2154

+ {

2155

+ LOOP_VINFO_PEELING_FOR_GAPS (loop_vinfo) = true;

2156

+

2157

+ if (vect_print_dump_info (REPORT_DETAILS))

2158

+ fprintf (vect_dump, "Data access with gaps requires scalar "

2159

+ "epilogue loop");

2160

+ }

2161

+

2162

return true;

2163

}

2164

if (vect_print_dump_info (REPORT_DETAILS))

2165

@@ -1531,6 +1541,7 @@

2166

next = DR_GROUP_NEXT_DR (vinfo_for_stmt (next));

2167

continue;

2168

}

2169

+

2170

prev = next;

2171

2172

/* Check that all the accesses have the same STEP. */

2173

@@ -1561,6 +1572,8 @@

2174

gaps += diff - 1;

2175

}

2176

2177

+ last_accessed_element += diff;

2178

+

2179

/* Store the gap from the previous member of the group. If there is no

2180

gap in the access, DR_GROUP_GAP is always 1. */

2181

DR_GROUP_GAP (vinfo_for_stmt (next)) = diff;

2182

@@ -1652,6 +1665,15 @@

2183

VEC_safe_push (gimple, heap, BB_VINFO_STRIDED_STORES (bb_vinfo),

2184

stmt);

2185

}

2186

+

2187

+ /* There is a gap in the end of the group. */

2188

+ if (stride - last_accessed_element > 0 && loop_vinfo)

2189

+ {

2190

+ LOOP_VINFO_PEELING_FOR_GAPS (loop_vinfo) = true;

2191

+ if (vect_print_dump_info (REPORT_DETAILS))

2192

+ fprintf (vect_dump, "Data access with gaps requires scalar "

2193

+ "epilogue loop");

2194

+ }

2195

}

2196

2197

return true;

2198

Index: gcc/c-typeck.c

2199

===================================================================

2200

--- a/src/gcc/c-typeck.c (.../tags/gcc_4_5_3_release)

2201

+++ b/src/gcc/c-typeck.c (.../branches/gcc-4_5-branch)

2202

@@ -9800,7 +9800,7 @@

2203

warn_for_sign_compare (location, orig_op0_folded,

2204

orig_op1_folded, op0, op1,

2205

result_type, resultcode);

2206

- if (!in_late_binary_op)

2207

+ if (!in_late_binary_op && !int_operands)

2208

{

2209

if (!op0_maybe_const || TREE_CODE (op0) != INTEGER_CST)

2210

op0 = c_wrap_maybe_const (op0, !op0_maybe_const);

2211

Index: gcc/tree-inline.c

2212

===================================================================

2213

--- a/src/gcc/tree-inline.c (.../tags/gcc_4_5_3_release)

2214

+++ b/src/gcc/tree-inline.c (.../branches/gcc-4_5-branch)

2215

@@ -4179,14 +4179,16 @@

2216

CONSTRUCTOR_ELTS (*tp));

2217

*tp = new_tree;

2218

}

2219

+ else if (code == STATEMENT_LIST)

2220

+ /* We used to just abort on STATEMENT_LIST, but we can run into them

2221

+ with statement-expressions (c++/40975). */

2222

+ copy_statement_list (tp);

2223

else if (TREE_CODE_CLASS (code) == tcc_type)

2224

*walk_subtrees = 0;

2225

else if (TREE_CODE_CLASS (code) == tcc_declaration)

2226

*walk_subtrees = 0;

2227

else if (TREE_CODE_CLASS (code) == tcc_constant)

2228

*walk_subtrees = 0;

2229

- else

2230

- gcc_assert (code != STATEMENT_LIST);

2231

return NULL_TREE;

2232

}

2233

2234

Index: gcc/var-tracking.c

2235

===================================================================

2236

--- a/src/gcc/var-tracking.c (.../tags/gcc_4_5_3_release)

2237

+++ b/src/gcc/var-tracking.c (.../branches/gcc-4_5-branch)

2238

@@ -4134,8 +4134,9 @@

2239

VALUE_RECURSED_INTO (val) = true;

2240

2241

for (node = var->var_part[0].loc_chain; node; node = node->next)

2242

- if (MEM_P (node->loc) && MEM_EXPR (node->loc) == expr

2243

- && MEM_OFFSET (node->loc) == 0)

2244

+ if (MEM_P (node->loc)

2245

+ && MEM_EXPR (node->loc) == expr

2246

+ && INT_MEM_OFFSET (node->loc) == 0)

2247

{

2248

where = node;

2249

break;

2250

@@ -4198,11 +4199,10 @@

2251

{

2252

for (loc = var->var_part[0].loc_chain; loc; loc = loc->next)

2253

{

2254

- /* We want to remove dying MEMs that doesn't refer to

2255

- DECL. */

2256

+ /* We want to remove dying MEMs that doesn't refer to DECL. */

2257

if (GET_CODE (loc->loc) == MEM

2258

&& (MEM_EXPR (loc->loc) != decl

2259

- || MEM_OFFSET (loc->loc))

2260

+ || INT_MEM_OFFSET (loc->loc) != 0)

2261

&& !mem_dies_at_call (loc->loc))

2262

break;

2263

/* We want to move here MEMs that do refer to DECL. */

2264

@@ -4246,7 +4246,7 @@

2265

2266

if (GET_CODE (loc->loc) != MEM

2267

|| (MEM_EXPR (loc->loc) == decl

2268

- && MEM_OFFSET (loc->loc) == 0)

2269

+ && INT_MEM_OFFSET (loc->loc) == 0)

2270

|| !mem_dies_at_call (loc->loc))

2271

{

2272

if (old_loc != loc->loc && emit_notes)

2273

Index: gcc/df-problems.c

2274

===================================================================

2275

--- a/src/gcc/df-problems.c (.../tags/gcc_4_5_3_release)

2276

+++ b/src/gcc/df-problems.c (.../branches/gcc-4_5-branch)

2277

@@ -3748,9 +3748,22 @@

2278

for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)

2279

{

2280

df_ref def = *def_rec;

2281

- /* If the def is to only part of the reg, it does

2282

- not kill the other defs that reach here. */

2283

- if (!(DF_REF_FLAGS (def) & (DF_REF_PARTIAL | DF_REF_CONDITIONAL)))

2284

+ bitmap_set_bit (defs, DF_REF_REGNO (def));

2285

+ }

2286

+}

2287

+

2288

+/* Find the set of real DEFs, which are not clobbers, for INSN. */

2289

+

2290

+void

2291

+df_simulate_find_noclobber_defs (rtx insn, bitmap defs)

2292

+{

2293

+ df_ref *def_rec;

2294

+ unsigned int uid = INSN_UID (insn);

2295

+

2296

+ for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)

2297

+ {

2298

+ df_ref def = *def_rec;

2299

+ if (!(DF_REF_FLAGS (def) & (DF_REF_MUST_CLOBBER | DF_REF_MAY_CLOBBER)))

2300

bitmap_set_bit (defs, DF_REF_REGNO (def));

2301

}

2302

}

2303

@@ -3903,13 +3916,9 @@

2304

the block, starting with the first one.

2305

----------------------------------------------------------------------------*/

2306

2307

-/* Apply the artificial uses and defs at the top of BB in a forwards

2308

- direction. ??? This is wrong; defs mark the point where a pseudo

2309

- becomes live when scanning forwards (unless a def is unused). Since

2310

- there are no REG_UNUSED notes for artificial defs, passes that

2311

- require artificial defs probably should not call this function

2312

- unless (as is the case for fwprop) they are correct when liveness

2313

- bitmaps are *under*estimated. */

2314

+/* Initialize the LIVE bitmap, which should be copied from DF_LIVE_IN or

2315

+ DF_LR_IN for basic block BB, for forward scanning by marking artificial

2316

+ defs live. */

2317

2318

void

2319

df_simulate_initialize_forwards (basic_block bb, bitmap live)

2320

@@ -3921,7 +3930,7 @@

2321

{

2322

df_ref def = *def_rec;

2323

if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)

2324

- bitmap_clear_bit (live, DF_REF_REGNO (def));

2325

+ bitmap_set_bit (live, DF_REF_REGNO (def));

2326

}

2327

}

2328

2329

@@ -3942,7 +3951,7 @@

2330

while here the scan is performed forwards! So, first assume that the

2331

def is live, and if this is not true REG_UNUSED notes will rectify the

2332

situation. */

2333

- df_simulate_find_defs (insn, live);

2334

+ df_simulate_find_noclobber_defs (insn, live);

2335

2336

/* Clear all of the registers that go dead. */

2337

for (link = REG_NOTES (insn); link; link = XEXP (link, 1))

2338

Index: gcc/tree-switch-conversion.c

2339

===================================================================

2340

--- a/src/gcc/tree-switch-conversion.c (.../tags/gcc_4_5_3_release)

2341

+++ b/src/gcc/tree-switch-conversion.c (.../branches/gcc-4_5-branch)

2342

@@ -549,7 +549,7 @@

2343

build_arrays (gimple swtch)

2344

{

2345

tree arr_index_type;

2346

- tree tidx, sub, tmp;

2347

+ tree tidx, sub, tmp, utype;

2348

gimple stmt;

2349

gimple_stmt_iterator gsi;

2350

int i;

2351

@@ -557,14 +557,20 @@

2352

2353

gsi = gsi_for_stmt (swtch);

2354

2355

+ /* Make sure we do not generate arithmetics in a subrange. */

2356

+ utype = TREE_TYPE (info.index_expr);

2357

+ if (TREE_TYPE (utype))

2358

+ utype = lang_hooks.types.type_for_mode (TYPE_MODE (TREE_TYPE (utype)), 1);

2359

+ else

2360

+ utype = lang_hooks.types.type_for_mode (TYPE_MODE (utype), 1);

2361

+

2362

arr_index_type = build_index_type (info.range_size);

2363

- tmp = create_tmp_var (TREE_TYPE (info.index_expr), "csti");

2364

+ tmp = create_tmp_var (utype, "csui");

2365

add_referenced_var (tmp);

2366

tidx = make_ssa_name (tmp, NULL);

2367

- sub = fold_build2_loc (loc, MINUS_EXPR,

2368

- TREE_TYPE (info.index_expr), info.index_expr,

2369

- fold_convert_loc (loc, TREE_TYPE (info.index_expr),

2370

- info.range_min));

2371

+ sub = fold_build2_loc (loc, MINUS_EXPR, utype,

2372

+ fold_convert_loc (loc, utype, info.index_expr),

2373

+ fold_convert_loc (loc, utype, info.range_min));

2374

sub = force_gimple_operand_gsi (&gsi, sub,

2375

false, NULL, true, GSI_SAME_STMT);

2376

stmt = gimple_build_assign (tidx, sub);

2377

@@ -673,12 +679,7 @@

2378

tree label_decl2 = create_artificial_label (UNKNOWN_LOCATION);

2379

tree label_decl3 = create_artificial_label (UNKNOWN_LOCATION);

2380

gimple label1, label2, label3;

2381

-

2382

- tree utype;

2383

- tree tmp_u_1, tmp_u_2, tmp_u_var;

2384

- tree cast;

2385

- gimple cast_assign, minus_assign;

2386

- tree ulb, minus;

2387

+ tree utype, tidx;

2388

tree bound;

2389

2390

gimple cond_stmt;

2391

@@ -692,49 +693,24 @@

2392

gcc_assert (info.default_values);

2393

bb0 = gimple_bb (swtch);

2394

2395

- /* Make sure we do not generate arithmetics in a subrange. */

2396

- if (TREE_TYPE (TREE_TYPE (info.index_expr)))

2397

- utype = lang_hooks.types.type_for_mode

2398

- (TYPE_MODE (TREE_TYPE (TREE_TYPE (info.index_expr))), 1);

2399

- else

2400

- utype = lang_hooks.types.type_for_mode

2401

- (TYPE_MODE (TREE_TYPE (info.index_expr)), 1);

2402

+ tidx = gimple_assign_lhs (info.arr_ref_first);

2403

+ utype = TREE_TYPE (tidx);

2404

2405

/* (end of) block 0 */

2406

gsi = gsi_for_stmt (info.arr_ref_first);

2407

- tmp_u_var = create_tmp_var (utype, "csui");

2408

- add_referenced_var (tmp_u_var);

2409

- tmp_u_1 = make_ssa_name (tmp_u_var, NULL);

2410

+ gsi_next (&gsi);

2411

2412

- cast = fold_convert_loc (loc, utype, info.index_expr);

2413

- cast_assign = gimple_build_assign (tmp_u_1, cast);

2414

- SSA_NAME_DEF_STMT (tmp_u_1) = cast_assign;

2415

- gsi_insert_before (&gsi, cast_assign, GSI_SAME_STMT);

2416

- update_stmt (cast_assign);

2417

-

2418

- ulb = fold_convert_loc (loc, utype, info.range_min);

2419

- minus = fold_build2_loc (loc, MINUS_EXPR, utype, tmp_u_1, ulb);

2420

- minus = force_gimple_operand_gsi (&gsi, minus, false, NULL, true,

2421

- GSI_SAME_STMT);

2422

- tmp_u_2 = make_ssa_name (tmp_u_var, NULL);

2423

- minus_assign = gimple_build_assign (tmp_u_2, minus);

2424

- SSA_NAME_DEF_STMT (tmp_u_2) = minus_assign;

2425

- gsi_insert_before (&gsi, minus_assign, GSI_SAME_STMT);

2426

- update_stmt (minus_assign);

2427

-

2428

bound = fold_convert_loc (loc, utype, info.range_size);

2429

- cond_stmt = gimple_build_cond (LE_EXPR, tmp_u_2, bound, NULL_TREE, NULL_TREE);

2430

+ cond_stmt = gimple_build_cond (LE_EXPR, tidx, bound, NULL_TREE, NULL_TREE);

2431

gsi_insert_before (&gsi, cond_stmt, GSI_SAME_STMT);

2432

update_stmt (cond_stmt);

2433

2434

/* block 2 */

2435

- gsi = gsi_for_stmt (info.arr_ref_first);

2436

label2 = gimple_build_label (label_decl2);

2437

gsi_insert_before (&gsi, label2, GSI_SAME_STMT);

2438

last_assign = gen_def_assigns (&gsi);

2439

2440

/* block 1 */

2441

- gsi = gsi_for_stmt (info.arr_ref_first);

2442

label1 = gimple_build_label (label_decl1);

2443

gsi_insert_before (&gsi, label1, GSI_SAME_STMT);

2444

2445

Index: gcc/config/sparc/sparc.md

2446

===================================================================

2447

--- a/src/gcc/config/sparc/sparc.md (.../tags/gcc_4_5_3_release)

2448

+++ b/src/gcc/config/sparc/sparc.md (.../branches/gcc-4_5-branch)

2449

@@ -6491,8 +6491,8 @@

2450

(const_int 4)))])

2451

2452

;; For __builtin_setjmp we need to flush register windows iff the function

2453

-;; calls alloca as well, because otherwise the register window might be

2454

-;; saved after %sp adjustment and thus setjmp would crash

2455

+;; calls alloca as well, because otherwise the current register window might

2456

+;; be saved after the %sp adjustment and thus setjmp would crash.

2457

(define_expand "builtin_setjmp_setup"

2458

[(match_operand 0 "register_operand" "r")]

2459

""

2460

@@ -6531,19 +6531,26 @@

2461

(eq_attr "pic" "true")

2462

(const_int 4)] (const_int 3)))])

2463

2464

-;; Pattern for use after a setjmp to store FP and the return register

2465

-;; into the stack area.

2466

+;; Pattern for use after a setjmp to store registers into the save area.

2467

2468

(define_expand "setjmp"

2469

[(const_int 0)]

2470

""

2471

{

2472

rtx mem;

2473

-

2474

+

2475

+ if (flag_pic)

2476

+ {

2477

+ mem = gen_rtx_MEM (Pmode,

2478

+ plus_constant (stack_pointer_rtx,

2479

+ SPARC_STACK_BIAS + 7 * UNITS_PER_WORD));

2480

+ emit_insn (gen_rtx_SET (VOIDmode, mem, pic_offset_table_rtx));

2481

+ }

2482

+

2483

mem = gen_rtx_MEM (Pmode,

2484

plus_constant (stack_pointer_rtx,

2485

SPARC_STACK_BIAS + 14 * UNITS_PER_WORD));

2486

- emit_insn (gen_rtx_SET (VOIDmode, mem, frame_pointer_rtx));

2487

+ emit_insn (gen_rtx_SET (VOIDmode, mem, hard_frame_pointer_rtx));

2488

2489

mem = gen_rtx_MEM (Pmode,

2490

plus_constant (stack_pointer_rtx,

2491

Index: gcc/config/sparc/sparc-protos.h

2492

===================================================================

2493

--- a/src/gcc/config/sparc/sparc-protos.h (.../tags/gcc_4_5_3_release)

2494

+++ b/src/gcc/config/sparc/sparc-protos.h (.../branches/gcc-4_5-branch)

2495

@@ -48,6 +48,7 @@

2496

extern int check_pic (int);

2497

extern int short_branch (int, int);

2498

extern void sparc_profile_hook (int);

2499

+extern void sparc_optimization_options (int, int);

2500

extern void sparc_override_options (void);

2501

extern void sparc_output_scratch_registers (FILE *);

2502

2503

Index: gcc/config/sparc/sparc.c

2504

===================================================================

2505

--- a/src/gcc/config/sparc/sparc.c (.../tags/gcc_4_5_3_release)

2506

+++ b/src/gcc/config/sparc/sparc.c (.../branches/gcc-4_5-branch)

2507

@@ -627,6 +627,17 @@

2508

return true;

2509

}

2510

2511

+/* Specify default optimizations. */

2512

+

2513

+void

2514

+sparc_optimization_options (int l ATTRIBUTE_UNUSED, int s ATTRIBUTE_UNUSED)

2515

+{

2516

+ /* Disable save slot sharing for call-clobbered registers by default.

2517

+ The IRA sharing algorithm works on single registers only and this

2518

+ pessimizes for double floating-point registers. */

2519

+ flag_ira_share_save_slots = 0;

2520

+}

2521

+

2522

/* Validate and override various options, and do some machine dependent

2523

initialization. */

2524

2525

@@ -2767,11 +2778,6 @@

2526

if (get_attr_length (trial) != 1)

2527

return 0;

2528

2529

- /* If there are any call-saved registers, we should scan TRIAL if it

2530

- does not reference them. For now just make it easy. */

2531

- if (num_gfregs)

2532

- return 0;

2533

-

2534

/* If the function uses __builtin_eh_return, the eh_return machinery

2535

occupies the delay slot. */

2536

if (crtl->calls_eh_return)

2537

@@ -4093,7 +4099,7 @@

2538

emit_move_insn (gen_rtx_REG (mode, regno), mem);

2539

2540

/* Always preserve double-word alignment. */

2541

- offset = (offset + 7) & -8;

2542

+ offset = (offset + 8) & -8;

2543

}

2544

}

2545

2546

@@ -4200,7 +4206,7 @@

2547

example, the regrename pass has special provisions to not rename to

2548

non-leaf registers in a leaf function. */

2549

sparc_leaf_function_p

2550

- = optimize > 0 && leaf_function_p () && only_leaf_regs_used ();

2551

+ = optimize > 0 && current_function_is_leaf && only_leaf_regs_used ();

2552

2553

/* Need to use actual_fsize, since we are also allocating

2554

space for our callee (and our own register save area). */

2555

@@ -4324,6 +4330,7 @@

2556

sparc_can_use_return_insn_p (void)

2557

{

2558

return sparc_prologue_data_valid_p

2559

+ && num_gfregs == 0

2560

&& (actual_fsize == 0 || !sparc_leaf_function_p);

2561

}

2562

2563

@@ -4425,18 +4432,20 @@

2564

machinery occupies the delay slot. */

2565

gcc_assert (! final_sequence);

2566

2567

- if (! flag_delayed_branch)

2568

- fputs ("\tadd\t%fp, %g1, %fp\n", asm_out_file);

2569

+ if (flag_delayed_branch)

2570

+ {

2571

+ if (TARGET_V9)

2572

+ fputs ("\treturn\t%i7+8\n", asm_out_file);

2573

+ else

2574

+ fputs ("\trestore\n\tjmp\t%o7+8\n", asm_out_file);

2575

2576

- if (TARGET_V9)

2577

- fputs ("\treturn\t%i7+8\n", asm_out_file);

2578

+ fputs ("\t add\t%sp, %g1, %sp\n", asm_out_file);

2579

+ }

2580

else

2581

- fputs ("\trestore\n\tjmp\t%o7+8\n", asm_out_file);

2582

-

2583

- if (flag_delayed_branch)

2584

- fputs ("\t add\t%sp, %g1, %sp\n", asm_out_file);

2585

- else

2586

- fputs ("\t nop\n", asm_out_file);

2587

+ {

2588

+ fputs ("\trestore\n\tadd\t%sp, %g1, %sp\n", asm_out_file);

2589

+ fputs ("\tjmp\t%o7+8\n\t nop\n", asm_out_file);

2590

+ }

2591

}

2592

else if (final_sequence)

2593

{

2594

@@ -9267,7 +9276,7 @@

2595

bool

2596

sparc_frame_pointer_required (void)

2597

{

2598

- return !(leaf_function_p () && only_leaf_regs_used ());

2599

+ return !(current_function_is_leaf && only_leaf_regs_used ());

2600

}

2601

2602

/* The way this is structured, we can't eliminate SFP in favor of SP

2603

Index: gcc/config/sparc/sparc.h

2604

===================================================================

2605

--- a/src/gcc/config/sparc/sparc.h (.../tags/gcc_4_5_3_release)

2606

+++ b/src/gcc/config/sparc/sparc.h (.../branches/gcc-4_5-branch)

2607

@@ -501,7 +501,8 @@

2608

#define CAN_DEBUG_WITHOUT_FP

2609

2610

/* Option handling. */

2611

-

2612

+#define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \

2613

+ sparc_optimization_options ((LEVEL), (SIZE))

2614

#define OVERRIDE_OPTIONS sparc_override_options ()

2615

2616

/* Mask of all CPU selection flags. */

2617

Index: gcc/config/rx/rx.h

2618

===================================================================

2619

--- a/src/gcc/config/rx/rx.h (.../tags/gcc_4_5_3_release)

2620

+++ b/src/gcc/config/rx/rx.h (.../branches/gcc-4_5-branch)

2621

@@ -168,7 +168,7 @@

2622

2623

#define HANDLE_PRAGMA_PACK_PUSH_POP 1

2624

2625

-#define HAVE_PRE_DECCREMENT 1

2626

+#define HAVE_PRE_DECREMENT 1

2627

#define HAVE_POST_INCREMENT 1

2628

2629

#define MOVE_RATIO(SPEED) ((SPEED) ? 4 : 2)

2630

Index: gcc/config/i386/i386.md

2631

===================================================================

2632

--- a/src/gcc/config/i386/i386.md (.../tags/gcc_4_5_3_release)

2633

+++ b/src/gcc/config/i386/i386.md (.../branches/gcc-4_5-branch)

2634

@@ -2430,7 +2430,7 @@

2635

[(set_attr "type" "*,*,mmx,mmxmov,mmxmov,sselog1,ssemov,ssemov,ssemov,sselog1,ssemov,ssemov,ssemov")

2636

(set (attr "prefix")

2637

(if_then_else (eq_attr "alternative" "5,6,7,8")

2638

- (const_string "vex")

2639

+ (const_string "maybe_vex")

2640

(const_string "orig")))

2641

(set_attr "mode" "DI,DI,DI,DI,DI,TI,DI,TI,DI,V4SF,V2SF,V4SF,V2SF")])

2642

2643

@@ -2468,21 +2468,15 @@

2644

return "movdq2q\t{%1, %0|%0, %1}";

2645

2646

case TYPE_SSEMOV:

2647

- if (TARGET_AVX)

2648

- {

2649

- if (get_attr_mode (insn) == MODE_TI)

2650

- return "vmovdqa\t{%1, %0|%0, %1}";

2651

- else

2652

- return "vmovq\t{%1, %0|%0, %1}";

2653

- }

2654

-

2655

if (get_attr_mode (insn) == MODE_TI)

2656

- return "movdqa\t{%1, %0|%0, %1}";

2657

- /* FALLTHRU */

2658

+ return "%vmovdqa\t{%1, %0|%0, %1}";

2659

+ /* Handle broken assemblers that require movd instead of movq. */

2660

+ if (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))

2661

+ return "%vmovd\t{%1, %0|%0, %1}";

2662

+ return "%vmovq\t{%1, %0|%0, %1}";

2663

2664

case TYPE_MMXMOV:

2665

- /* Moves from and into integer register is done using movd

2666

- opcode with REX prefix. */

2667

+ /* Handle broken assemblers that require movd instead of movq. */

2668

if (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))

2669

return "movd\t{%1, %0|%0, %1}";

2670

return "movq\t{%1, %0|%0, %1}";

2671

@@ -2878,7 +2872,7 @@

2672

&& (reload_in_progress || reload_completed

2673

|| (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)

2674

|| (!TARGET_SSE_MATH && optimize_function_for_size_p (cfun)

2675

- && standard_80387_constant_p (operands[1]))

2676

+ && standard_80387_constant_p (operands[1]) > 0)

2677

|| GET_CODE (operands[1]) != CONST_DOUBLE

2678

|| memory_operand (operands[0], SFmode))"

2679

{

2680

@@ -2915,12 +2909,13 @@

2681

2682

case 9: case 10: case 14: case 15:

2683

return "movd\t{%1, %0|%0, %1}";

2684

- case 12: case 13:

2685

- return "%vmovd\t{%1, %0|%0, %1}";

2686

2687

case 11:

2688

return "movq\t{%1, %0|%0, %1}";

2689

2690

+ case 12: case 13:

2691

+ return "%vmovd\t{%1, %0|%0, %1}";

2692

+

2693

default:

2694

gcc_unreachable ();

2695

}

2696

@@ -3048,11 +3043,10 @@

2697

|| (!(TARGET_SSE2 && TARGET_SSE_MATH)

2698

&& optimize_function_for_size_p (cfun)

2699

&& !memory_operand (operands[0], DFmode)

2700

- && standard_80387_constant_p (operands[1]))

2701

+ && standard_80387_constant_p (operands[1]) > 0)

2702

|| GET_CODE (operands[1]) != CONST_DOUBLE

2703

|| ((optimize_function_for_size_p (cfun)

2704

- || !TARGET_MEMORY_MISMATCH_STALL

2705

- || reload_in_progress || reload_completed)

2706

+ || !TARGET_MEMORY_MISMATCH_STALL)

2707

&& memory_operand (operands[0], DFmode)))"

2708

{

2709

switch (which_alternative)

2710

@@ -3067,6 +3061,7 @@

2711

case 3:

2712

case 4:

2713

return "#";

2714

+

2715

case 5:

2716

switch (get_attr_mode (insn))

2717

{

2718

@@ -3200,7 +3195,7 @@

2719

|| (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)

2720

|| (!(TARGET_SSE2 && TARGET_SSE_MATH)

2721

&& optimize_function_for_size_p (cfun)

2722

- && standard_80387_constant_p (operands[1]))

2723

+ && standard_80387_constant_p (operands[1]) > 0)

2724

|| GET_CODE (operands[1]) != CONST_DOUBLE

2725

|| memory_operand (operands[0], DFmode))"

2726

{

2727

@@ -3262,7 +3257,8 @@

2728

2729

case 9:

2730

case 10:

2731

- return "%vmovd\t{%1, %0|%0, %1}";

2732

+ /* Handle broken assemblers that require movd instead of movq. */

2733

+ return "%vmovd\t{%1, %0|%0, %1}";

2734

2735

default:

2736

gcc_unreachable();

2737

@@ -3340,7 +3336,7 @@

2738

|| (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)

2739

|| (!(TARGET_SSE2 && TARGET_SSE_MATH)

2740

&& optimize_function_for_size_p (cfun)

2741

- && standard_80387_constant_p (operands[1]))

2742

+ && standard_80387_constant_p (operands[1]) > 0)

2743

|| GET_CODE (operands[1]) != CONST_DOUBLE

2744

|| memory_operand (operands[0], DFmode))"

2745

{

2746

@@ -3361,11 +3357,11 @@

2747

switch (get_attr_mode (insn))

2748

{

2749

case MODE_V4SF:

2750

- return "xorps\t%0, %0";

2751

+ return "%vxorps\t%0, %d0";

2752

case MODE_V2DF:

2753

- return "xorpd\t%0, %0";

2754

+ return "%vxorpd\t%0, %d0";

2755

case MODE_TI:

2756

- return "pxor\t%0, %0";

2757

+ return "%vpxor\t%0, %d0";

2758

default:

2759

gcc_unreachable ();

2760

}

2761

@@ -3375,28 +3371,56 @@

2762

switch (get_attr_mode (insn))

2763

{

2764

case MODE_V4SF:

2765

- return "movaps\t{%1, %0|%0, %1}";

2766

+ return "%vmovaps\t{%1, %0|%0, %1}";

2767

case MODE_V2DF:

2768

- return "movapd\t{%1, %0|%0, %1}";

2769

+ return "%vmovapd\t{%1, %0|%0, %1}";

2770

case MODE_TI:

2771

- return "movdqa\t{%1, %0|%0, %1}";

2772

+ return "%vmovdqa\t{%1, %0|%0, %1}";

2773

case MODE_DI:

2774

- return "movq\t{%1, %0|%0, %1}";

2775

+ return "%vmovq\t{%1, %0|%0, %1}";

2776

case MODE_DF:

2777

- return "movsd\t{%1, %0|%0, %1}";

2778

+ if (TARGET_AVX)

2779

+ {

2780

+ if (REG_P (operands[0]) && REG_P (operands[1]))

2781

+ return "vmovsd\t{%1, %0, %0|%0, %0, %1}";

2782

+ else

2783

+ return "vmovsd\t{%1, %0|%0, %1}";

2784

+ }

2785

+ else

2786

+ return "movsd\t{%1, %0|%0, %1}";

2787

case MODE_V1DF:

2788

- return "movlpd\t{%1, %0|%0, %1}";

2789

+ if (TARGET_AVX)

2790

+ {

2791

+ if (REG_P (operands[0]))

2792

+ return "vmovlpd\t{%1, %0, %0|%0, %0, %1}";

2793

+ else

2794

+ return "vmovlpd\t{%1, %0|%0, %1}";

2795

+ }

2796

+ else

2797

+ return "movlpd\t{%1, %0|%0, %1}";

2798

case MODE_V2SF:

2799

- return "movlps\t{%1, %0|%0, %1}";

2800

+ if (TARGET_AVX)

2801

+ {

2802

+ if (REG_P (operands[0]))

2803

+ return "vmovlps\t{%1, %0, %0|%0, %0, %1}";

2804

+ else

2805

+ return "vmovlps\t{%1, %0|%0, %1}";

2806

+ }

2807

+ else

2808

+ return "movlps\t{%1, %0|%0, %1}";

2809

default:

2810

gcc_unreachable ();

2811

}

2812

2813

default:

2814

- gcc_unreachable();

2815

+ gcc_unreachable ();

2816

}

2817

}

2818

[(set_attr "type" "fmov,fmov,fmov,multi,multi,sselog1,ssemov,ssemov,ssemov")

2819

+ (set (attr "prefix")

2820

+ (if_then_else (eq_attr "alternative" "0,1,2,3,4")

2821

+ (const_string "orig")

2822

+ (const_string "maybe_vex")))

2823

(set (attr "prefix_data16")

2824

(if_then_else (eq_attr "mode" "V1DF")

2825

(const_string "1")

2826

@@ -3543,7 +3567,8 @@

2827

"optimize_function_for_size_p (cfun)

2828

&& !(MEM_P (operands[0]) && MEM_P (operands[1]))

2829

&& (reload_in_progress || reload_completed

2830

- || standard_80387_constant_p (operands[1])

2831

+ || (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)

2832

+ || standard_80387_constant_p (operands[1]) > 0

2833

|| GET_CODE (operands[1]) != CONST_DOUBLE

2834

|| memory_operand (operands[0], XFmode))"

2835

{

2836

@@ -3571,6 +3596,7 @@

2837

"optimize_function_for_speed_p (cfun)

2838

&& !(MEM_P (operands[0]) && MEM_P (operands[1]))

2839

&& (reload_in_progress || reload_completed

2840

+ || (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)

2841

|| GET_CODE (operands[1]) != CONST_DOUBLE

2842

|| memory_operand (operands[0], XFmode))"

2843

{

2844

@@ -3715,7 +3741,7 @@

2845

}

2846

else if (FP_REG_P (r))

2847

{

2848

- if (!standard_80387_constant_p (c))

2849

+ if (standard_80387_constant_p (c) < 1)

2850

FAIL;

2851

}

2852

else if (MMX_REG_P (r))

2853

@@ -3747,7 +3773,7 @@

2854

}

2855

else if (FP_REG_P (r))

2856

{

2857

- if (!standard_80387_constant_p (c))

2858

+ if (standard_80387_constant_p (c) < 1)

2859

FAIL;

2860

}

2861

else if (MMX_REG_P (r))

2862

Index: gcc/config/i386/mmx.md

2863

===================================================================

2864

--- a/src/gcc/config/i386/mmx.md (.../tags/gcc_4_5_3_release)

2865

+++ b/src/gcc/config/i386/mmx.md (.../branches/gcc-4_5-branch)

2866

@@ -63,6 +63,7 @@

2867

DONE;

2868

})

2869

2870

+;; movd instead of movq is required to handle broken assemblers.

2871

(define_insn "*mov<mode>_internal_rex64"

2872

[(set (match_operand:MMXMODEI8 0 "nonimmediate_operand"

2873

"=rm,r,!?y,!?y ,m ,!y,*Y2,x,x ,m,r,Yi")

2874

@@ -81,8 +82,8 @@

2875

%vpxor\t%0, %d0

2876

%vmovq\t{%1, %0|%0, %1}

2877

%vmovq\t{%1, %0|%0, %1}

2878

- %vmovq\t{%1, %0|%0, %1}

2879

- %vmovq\t{%1, %0|%0, %1}"

2880

+ %vmovd\t{%1, %0|%0, %1}

2881

+ %vmovd\t{%1, %0|%0, %1}"

2882

[(set_attr "type" "imov,imov,mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,ssemov,ssemov")

2883

(set_attr "unit" "*,*,*,*,*,mmx,mmx,*,*,*,*,*")

2884

(set_attr "prefix_rep" "*,*,*,*,*,1,1,*,1,*,*,*")

2885

@@ -192,6 +193,7 @@

2886

(const_string "orig")))

2887

(set_attr "mode" "DI,DI,DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")])

2888

2889

+;; movd instead of movq is required to handle broken assemblers.

2890

(define_insn "*movv2sf_internal_rex64"

2891

[(set (match_operand:V2SF 0 "nonimmediate_operand"

2892

"=rm,r ,!?y,!?y ,m ,!y,*Y2,x,x,x,m,r,Yi")

2893

Index: gcc/config/i386/constraints.md

2894

===================================================================

2895

--- a/src/gcc/config/i386/constraints.md (.../tags/gcc_4_5_3_release)

2896

+++ b/src/gcc/config/i386/constraints.md (.../branches/gcc-4_5-branch)

2897

@@ -149,7 +149,7 @@

2898

(define_constraint "G"

2899

"Standard 80387 floating point constant."

2900

(and (match_code "const_double")

2901

- (match_test "standard_80387_constant_p (op)")))

2902

+ (match_test "standard_80387_constant_p (op) > 0")))

2903

2904

;; This can theoretically be any mode's CONST0_RTX.

2905

(define_constraint "C"

2906

Index: gcc/config/i386/sse.md

2907

===================================================================

2908

--- a/src/gcc/config/i386/sse.md (.../tags/gcc_4_5_3_release)

2909

+++ b/src/gcc/config/i386/sse.md (.../branches/gcc-4_5-branch)

2910

@@ -4964,24 +4964,22 @@

2911

;; Avoid combining registers from different units in a single alternative,

2912

;; see comment above inline_secondary_memory_needed function in i386.c

2913

(define_insn "sse2_loadhpd"

2914

- [(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,x,x,o,o,o")

2915

+ [(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,x,o,o,o")

2916

(vec_concat:V2DF

2917

(vec_select:DF

2918

- (match_operand:V2DF 1 "nonimmediate_operand" " 0,0,x,0,0,0")

2919

+ (match_operand:V2DF 1 "nonimmediate_operand" " 0,0,0,0,0")

2920

(parallel [(const_int 0)]))

2921

- (match_operand:DF 2 "nonimmediate_operand" " m,x,0,x,*f,r")))]

2922

+ (match_operand:DF 2 "nonimmediate_operand" " m,x,x,*f,r")))]

2923

"TARGET_SSE2 && !(MEM_P (operands[1]) && MEM_P (operands[2]))"

2924

"@

2925

movhpd\t{%2, %0|%0, %2}

2926

unpcklpd\t{%2, %0|%0, %2}

2927

- shufpd\t{$1, %1, %0|%0, %1, 1}

2928

#

2929

#

2930

#"

2931

- [(set_attr "type" "ssemov,sselog,sselog,ssemov,fmov,imov")

2932

- (set_attr "prefix_data16" "1,*,*,*,*,*")

2933

- (set_attr "length_immediate" "*,*,1,*,*,*")

2934

- (set_attr "mode" "V1DF,V2DF,V2DF,DF,DF,DF")])

2935

+ [(set_attr "type" "ssemov,sselog,ssemov,fmov,imov")

2936

+ (set_attr "prefix_data16" "1,*,*,*,*")

2937

+ (set_attr "mode" "V1DF,V2DF,DF,DF,DF")])

2938

2939

(define_split

2940

[(set (match_operand:V2DF 0 "memory_operand" "")

2941

@@ -7473,9 +7471,8 @@

2942

"@

2943

#

2944

#

2945

- %vmov{q}\t{%1, %0|%0, %1}"

2946

+ mov{q}\t{%1, %0|%0, %1}"

2947

[(set_attr "type" "*,*,imov")

2948

- (set_attr "prefix" "*,*,maybe_vex")

2949

(set_attr "mode" "*,*,DI")])

2950

2951

(define_insn "*sse2_storeq"

2952

@@ -7513,11 +7510,11 @@

2953

vmovhps\t{%1, %0|%0, %1}

2954

vpsrldq\t{$8, %1, %0|%0, %1, 8}

2955

vmovq\t{%H1, %0|%0, %H1}

2956

- vmov{q}\t{%H1, %0|%0, %H1}"

2957

+ mov{q}\t{%H1, %0|%0, %H1}"

2958

[(set_attr "type" "ssemov,sseishft1,ssemov,imov")

2959

(set_attr "length_immediate" "*,1,*,*")

2960

(set_attr "memory" "*,none,*,*")

2961

- (set_attr "prefix" "vex")

2962

+ (set_attr "prefix" "vex,vex,vex,orig")

2963

(set_attr "mode" "V2SF,TI,TI,DI")])

2964

2965

(define_insn "*vec_extractv2di_1_rex64"

2966

@@ -7795,6 +7792,7 @@

2967

(const_string "vex")))

2968

(set_attr "mode" "TI,TI,TI,TI,TI,V2SF")])

2969

2970

+;; movd instead of movq is required to handle broken assemblers.

2971

(define_insn "*vec_concatv2di_rex64_sse4_1"

2972

[(set (match_operand:V2DI 0 "register_operand" "=x ,x ,Yi,!x,x,x,x")

2973

(vec_concat:V2DI

2974

@@ -7804,7 +7802,7 @@

2975

"@

2976

pinsrq\t{$0x1, %2, %0|%0, %2, 0x1}

2977

movq\t{%1, %0|%0, %1}

2978

- movq\t{%1, %0|%0, %1}

2979

+ movd\t{%1, %0|%0, %1}

2980

movq2dq\t{%1, %0|%0, %1}

2981

punpcklqdq\t{%2, %0|%0, %2}

2982

movlhps\t{%2, %0|%0, %2}

2983

@@ -7815,6 +7813,7 @@

2984

(set_attr "length_immediate" "1,*,*,*,*,*,*")

2985

(set_attr "mode" "TI,TI,TI,TI,TI,V4SF,V2SF")])

2986

2987

+;; movd instead of movq is required to handle broken assemblers.

2988

(define_insn "*vec_concatv2di_rex64_sse"

2989

[(set (match_operand:V2DI 0 "register_operand" "=Y2 ,Yi,!Y2,Y2,x,x")

2990

(vec_concat:V2DI

2991

@@ -7823,7 +7822,7 @@

2992

"TARGET_64BIT && TARGET_SSE"

2993

"@

2994

movq\t{%1, %0|%0, %1}

2995

- movq\t{%1, %0|%0, %1}

2996

+ movd\t{%1, %0|%0, %1}

2997

movq2dq\t{%1, %0|%0, %1}

2998

punpcklqdq\t{%2, %0|%0, %2}

2999

movlhps\t{%2, %0|%0, %2}

3000

Index: gcc/config/i386/i386.c

3001

===================================================================

3002

--- a/src/gcc/config/i386/i386.c (.../tags/gcc_4_5_3_release)

3003

+++ b/src/gcc/config/i386/i386.c (.../branches/gcc-4_5-branch)

3004

@@ -14610,11 +14610,15 @@

3005

if (req_mode == CCZmode)

3006

return 0;

3007

/* FALLTHRU */

3008

+ case CCZmode:

3009

+ break;

3010

+

3011

case CCAmode:

3012

case CCCmode:

3013

case CCOmode:

3014

case CCSmode:

3015

- case CCZmode:

3016

+ if (set_mode != req_mode)

3017

+ return 0;

3018

break;

3019

3020

default:

3021

@@ -25067,7 +25071,7 @@

3022

zero above. We only want to wind up preferring 80387 registers if

3023

we plan on doing computation with them. */

3024

if (TARGET_80387

3025

- && standard_80387_constant_p (x))

3026

+ && standard_80387_constant_p (x) > 0)

3027

{

3028

/* Limit class to non-sse. */

3029

if (regclass == FLOAT_SSE_REGS)

3030

@@ -27711,10 +27715,19 @@

3031

break;

3032

3033

case V2DImode:

3034

- use_vec_merge = TARGET_SSE4_1;

3035

+ use_vec_merge = TARGET_SSE4_1 && TARGET_64BIT;

3036

if (use_vec_merge)

3037

break;

3038

3039

+ tmp = gen_reg_rtx (GET_MODE_INNER (mode));

3040

+ ix86_expand_vector_extract (false, tmp, target, 1 - elt);

3041

+ if (elt == 0)

3042

+ tmp = gen_rtx_VEC_CONCAT (mode, tmp, val);

3043

+ else

3044

+ tmp = gen_rtx_VEC_CONCAT (mode, val, tmp);

3045

+ emit_insn (gen_rtx_SET (VOIDmode, target, tmp));

3046

+ return;

3047

+

3048

case V2DFmode:

3049

{

3050

rtx op0, op1;

3051

Index: gcc/config/sh/sh.c

3052

===================================================================

3053

--- a/src/gcc/config/sh/sh.c (.../tags/gcc_4_5_3_release)

3054

+++ b/src/gcc/config/sh/sh.c (.../branches/gcc-4_5-branch)

3055

@@ -1945,7 +1945,10 @@

3056

else if (op2h != CONST0_RTX (SImode))

3057

msw_taken = LTU;

3058

else

3059

- break;

3060

+ {

3061

+ msw_skip = swap_condition (LTU);

3062

+ break;

3063

+ }

3064

msw_skip = swap_condition (msw_taken);

3065

}

3066

break;

3067

@@ -1998,6 +2001,13 @@

3068

{

3069

operands[1] = op1h;

3070

operands[2] = op2h;

3071

+ if (reload_completed

3072

+ && ! arith_reg_or_0_operand (op2h, SImode)

3073

+ && (true_regnum (op1h) || (comparison != EQ && comparison != NE)))

3074

+ {

3075

+ emit_move_insn (scratch, operands[2]);

3076

+ operands[2] = scratch;

3077

+ }

3078

}

3079

3080

operands[3] = skip_label = gen_label_rtx ();

3081

Index: gcc/config/rs6000/rs6000.c

3082

===================================================================

3083

--- a/src/gcc/config/rs6000/rs6000.c (.../tags/gcc_4_5_3_release)

3084

+++ b/src/gcc/config/rs6000/rs6000.c (.../branches/gcc-4_5-branch)

3085

@@ -5426,10 +5426,11 @@

3086

3087

if (model == TLS_MODEL_GLOBAL_DYNAMIC)

3088

{

3089

- r3 = gen_rtx_REG (Pmode, 3);

3090

tga = rs6000_tls_get_addr ();

3091

- emit_library_call_value (tga, dest, LCT_CONST, Pmode, 1, r3, Pmode);

3092

+ emit_library_call_value (tga, dest, LCT_CONST, Pmode,

3093

+ 1, const0_rtx, Pmode);

3094

3095

+ r3 = gen_rtx_REG (Pmode, 3);

3096

if (DEFAULT_ABI == ABI_AIX && TARGET_64BIT)

3097

insn = gen_tls_gd_aix64 (r3, got, addr, tga, const0_rtx);

3098

else if (DEFAULT_ABI == ABI_AIX && !TARGET_64BIT)

3099

@@ -5446,11 +5447,12 @@

3100

}

3101

else if (model == TLS_MODEL_LOCAL_DYNAMIC)

3102

{

3103

- r3 = gen_rtx_REG (Pmode, 3);

3104

tga = rs6000_tls_get_addr ();

3105

tmp1 = gen_reg_rtx (Pmode);

3106

- emit_library_call_value (tga, tmp1, LCT_CONST, Pmode, 1, r3, Pmode);

3107

+ emit_library_call_value (tga, tmp1, LCT_CONST, Pmode,

3108

+ 1, const0_rtx, Pmode);

3109

3110

+ r3 = gen_rtx_REG (Pmode, 3);

3111

if (DEFAULT_ABI == ABI_AIX && TARGET_64BIT)

3112

insn = gen_tls_ld_aix64 (r3, got, tga, const0_rtx);

3113

else if (DEFAULT_ABI == ABI_AIX && !TARGET_64BIT)

3114

@@ -6694,7 +6696,7 @@

3115

3116

/* Nonzero if we can use an AltiVec register to pass this arg. */

3117

#define USE_ALTIVEC_FOR_ARG_P(CUM,MODE,TYPE,NAMED) \

3118

- ((ALTIVEC_VECTOR_MODE (MODE) || VSX_VECTOR_MODE (MODE)) \

3119

+ (ALTIVEC_OR_VSX_VECTOR_MODE (MODE) \

3120

&& (CUM)->vregno <= ALTIVEC_ARG_MAX_REG \

3121

&& TARGET_ALTIVEC_ABI \

3122

&& (NAMED))

3123

@@ -6920,7 +6922,7 @@

3124

existing library interfaces.

3125

3126

Doubleword align SPE vectors.

3127

- Quadword align Altivec vectors.

3128

+ Quadword align Altivec/VSX vectors.

3129

Quadword align large synthetic vector types. */

3130

3131

int

3132

@@ -6937,7 +6939,7 @@

3133

&& int_size_in_bytes (type) >= 8

3134

&& int_size_in_bytes (type) < 16))

3135

return 64;

3136

- else if ((ALTIVEC_VECTOR_MODE (mode) || VSX_VECTOR_MODE (mode))

3137

+ else if (ALTIVEC_OR_VSX_VECTOR_MODE (mode)

3138

|| (type && TREE_CODE (type) == VECTOR_TYPE

3139

&& int_size_in_bytes (type) >= 16))

3140

return 128;

3141

@@ -7082,8 +7084,7 @@

3142

cum->nargs_prototype--;

3143

3144

if (TARGET_ALTIVEC_ABI

3145

- && (ALTIVEC_VECTOR_MODE (mode)

3146

- || VSX_VECTOR_MODE (mode)

3147

+ && (ALTIVEC_OR_VSX_VECTOR_MODE (mode)

3148

|| (type && TREE_CODE (type) == VECTOR_TYPE

3149

&& int_size_in_bytes (type) == 16)))

3150

{

3151

@@ -7677,8 +7678,7 @@

3152

else

3153

return gen_rtx_REG (mode, cum->vregno);

3154

else if (TARGET_ALTIVEC_ABI

3155

- && (ALTIVEC_VECTOR_MODE (mode)

3156

- || VSX_VECTOR_MODE (mode)

3157

+ && (ALTIVEC_OR_VSX_VECTOR_MODE (mode)

3158

|| (type && TREE_CODE (type) == VECTOR_TYPE

3159

&& int_size_in_bytes (type) == 16)))

3160

{

3161

@@ -18280,7 +18280,7 @@

3162

3163

/* Some cases that need register indexed addressing. */

3164

if ((TARGET_ALTIVEC_ABI && ALTIVEC_VECTOR_MODE (mode))

3165

- || (TARGET_VSX && VSX_VECTOR_MODE (mode))

3166

+ || (TARGET_VSX && ALTIVEC_OR_VSX_VECTOR_MODE (mode))

3167

|| (TARGET_E500_DOUBLE && mode == DFmode)

3168

|| (TARGET_SPE_ABI

3169

&& SPE_VECTOR_MODE (mode)

3170

@@ -25565,14 +25565,13 @@

3171

else if (TREE_CODE (valtype) == COMPLEX_TYPE

3172

&& targetm.calls.split_complex_arg)

3173

return rs6000_complex_function_value (mode);

3174

+ /* VSX is a superset of Altivec and adds V2DImode/V2DFmode. Since the same

3175

+ return register is used in both cases, and we won't see V2DImode/V2DFmode

3176

+ for pure altivec, combine the two cases. */

3177

else if (TREE_CODE (valtype) == VECTOR_TYPE

3178

&& TARGET_ALTIVEC && TARGET_ALTIVEC_ABI

3179

- && ALTIVEC_VECTOR_MODE (mode))

3180

+ && ALTIVEC_OR_VSX_VECTOR_MODE (mode))

3181

regno = ALTIVEC_ARG_RETURN;

3182

- else if (TREE_CODE (valtype) == VECTOR_TYPE

3183

- && TARGET_VSX && TARGET_ALTIVEC_ABI

3184

- && VSX_VECTOR_MODE (mode))

3185

- regno = ALTIVEC_ARG_RETURN;

3186

else if (TARGET_E500_DOUBLE && TARGET_HARD_FLOAT

3187

&& (mode == DFmode || mode == DCmode

3188

|| mode == TFmode || mode == TCmode))

3189

@@ -25611,12 +25610,12 @@

3190

&& TARGET_HARD_FLOAT && TARGET_FPRS

3191

&& ((TARGET_SINGLE_FLOAT && mode == SFmode) || TARGET_DOUBLE_FLOAT))

3192

regno = FP_ARG_RETURN;

3193

- else if (ALTIVEC_VECTOR_MODE (mode)

3194

+ /* VSX is a superset of Altivec and adds V2DImode/V2DFmode. Since the same

3195

+ return register is used in both cases, and we won't see V2DImode/V2DFmode

3196

+ for pure altivec, combine the two cases. */

3197

+ else if (ALTIVEC_OR_VSX_VECTOR_MODE (mode)

3198

&& TARGET_ALTIVEC && TARGET_ALTIVEC_ABI)

3199

regno = ALTIVEC_ARG_RETURN;

3200

- else if (VSX_VECTOR_MODE (mode)

3201

- && TARGET_VSX && TARGET_ALTIVEC_ABI)

3202

- regno = ALTIVEC_ARG_RETURN;

3203

else if (COMPLEX_MODE_P (mode) && targetm.calls.split_complex_arg)

3204

return rs6000_complex_function_value (mode);

3205

else if (TARGET_E500_DOUBLE && TARGET_HARD_FLOAT

3206

3207

Property changes on: gcc/config/rs6000/rs6000.c

3208

___________________________________________________________________

3209

Added: svn:mergeinfo

3210

Merged /trunk/gcc/config/rs6000/rs6000.c:r162404,173624

3211

3212

Index: gcc/config/rs6000/rs6000.h

3213

===================================================================

3214

--- a/src/gcc/config/rs6000/rs6000.h (.../tags/gcc_4_5_3_release)

3215

+++ b/src/gcc/config/rs6000/rs6000.h (.../branches/gcc-4_5-branch)

3216

@@ -1038,10 +1038,9 @@

3217

3218

/* When setting up caller-save slots (MODE == VOIDmode) ensure we allocate

3219

enough space to account for vectors in FP regs. */

3220

-#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \

3221

- (TARGET_VSX \

3222

- && ((MODE) == VOIDmode || VSX_VECTOR_MODE (MODE) \

3223

- || ALTIVEC_VECTOR_MODE (MODE)) \

3224

+#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \

3225

+ (TARGET_VSX \

3226

+ && ((MODE) == VOIDmode || ALTIVEC_OR_VSX_VECTOR_MODE (MODE)) \

3227

&& FP_REGNO_P (REGNO) \

3228

? V2DFmode \

3229

: choose_hard_reg_mode ((REGNO), (NREGS), false))

3230

@@ -1057,25 +1056,16 @@

3231

((MODE) == V4SFmode \

3232

|| (MODE) == V2DFmode) \

3233

3234

-#define VSX_SCALAR_MODE(MODE) \

3235

- ((MODE) == DFmode)

3236

-

3237

-#define VSX_MODE(MODE) \

3238

- (VSX_VECTOR_MODE (MODE) \

3239

- || VSX_SCALAR_MODE (MODE))

3240

-

3241

-#define VSX_MOVE_MODE(MODE) \

3242

- (VSX_VECTOR_MODE (MODE) \

3243

- || VSX_SCALAR_MODE (MODE) \

3244

- || ALTIVEC_VECTOR_MODE (MODE) \

3245

- || (MODE) == TImode)

3246

-

3247

#define ALTIVEC_VECTOR_MODE(MODE) \

3248

((MODE) == V16QImode \

3249

|| (MODE) == V8HImode \

3250

|| (MODE) == V4SFmode \

3251

|| (MODE) == V4SImode)

3252

3253

+#define ALTIVEC_OR_VSX_VECTOR_MODE(MODE) \

3254

+ (ALTIVEC_VECTOR_MODE (MODE) || VSX_VECTOR_MODE (MODE) \

3255

+ || (MODE) == V2DImode)

3256

+

3257

#define SPE_VECTOR_MODE(MODE) \

3258

((MODE) == V4HImode \

3259

|| (MODE) == V2SFmode \

3260

@@ -1118,10 +1108,10 @@

3261

? ALTIVEC_VECTOR_MODE (MODE2) \

3262

: ALTIVEC_VECTOR_MODE (MODE2) \

3263

? ALTIVEC_VECTOR_MODE (MODE1) \

3264

- : VSX_VECTOR_MODE (MODE1) \

3265

- ? VSX_VECTOR_MODE (MODE2) \

3266

- : VSX_VECTOR_MODE (MODE2) \

3267

- ? VSX_VECTOR_MODE (MODE1) \

3268

+ : ALTIVEC_OR_VSX_VECTOR_MODE (MODE1) \

3269

+ ? ALTIVEC_OR_VSX_VECTOR_MODE (MODE2) \

3270

+ : ALTIVEC_OR_VSX_VECTOR_MODE (MODE2) \

3271

+ ? ALTIVEC_OR_VSX_VECTOR_MODE (MODE1) \

3272

: 1)

3273

3274

/* Post-reload, we can't use any new AltiVec registers, as we already

3275

3276

Property changes on: gcc/config/rs6000/rs6000.h

3277

___________________________________________________________________

3278

Added: svn:mergeinfo

3279

Merged /trunk/gcc/config/rs6000/rs6000.h:r162404,173624

3280

3281

Index: gcc/config/arm/arm.c

3282

===================================================================

3283

--- a/src/gcc/config/arm/arm.c (.../tags/gcc_4_5_3_release)

3284

+++ b/src/gcc/config/arm/arm.c (.../branches/gcc-4_5-branch)

3285

@@ -18237,7 +18237,7 @@

3286

rtx tmp1 = gen_reg_rtx (mode);

3287

rtx tmp2 = gen_reg_rtx (mode);

3288

3289

- emit_insn (intfn (tmp1, op1, tmp2, op2));

3290

+ emit_insn (intfn (tmp1, op1, op2, tmp2));

3291

3292

emit_move_insn (mem, tmp1);

3293

mem = adjust_address (mem, mode, GET_MODE_SIZE (mode));

3294

Index: gcc/config/arm/neon.md

3295

===================================================================

3296

--- a/src/gcc/config/arm/neon.md (.../tags/gcc_4_5_3_release)

3297

+++ b/src/gcc/config/arm/neon.md (.../branches/gcc-4_5-branch)

3298

@@ -680,7 +680,7 @@

3299

(match_operand:SI 2 "immediate_operand" "i")))]

3300

"TARGET_NEON"

3301

{

3302

- int elt = ffs ((int) INTVAL (operands[2]) - 1);

3303

+ int elt = ffs ((int) INTVAL (operands[2])) - 1;

3304

if (BYTES_BIG_ENDIAN)

3305

elt = GET_MODE_NUNITS (<MODE>mode) - 1 - elt;

3306

operands[2] = GEN_INT (elt);

3307

@@ -3895,13 +3895,14 @@

3308

3309

(define_insn "neon_vtrn<mode>_internal"

3310

[(set (match_operand:VDQW 0 "s_register_operand" "=w")

3311

- (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")]

3312

- UNSPEC_VTRN1))

3313

- (set (match_operand:VDQW 2 "s_register_operand" "=w")

3314

- (unspec:VDQW [(match_operand:VDQW 3 "s_register_operand" "2")]

3315

- UNSPEC_VTRN2))]

3316

+ (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")

3317

+ (match_operand:VDQW 2 "s_register_operand" "w")]

3318

+ UNSPEC_VTRN1))

3319

+ (set (match_operand:VDQW 3 "s_register_operand" "=2")

3320

+ (unspec:VDQW [(match_dup 1) (match_dup 2)]

3321

+ UNSPEC_VTRN2))]

3322

"TARGET_NEON"

3323

- "vtrn.<V_sz_elem>\t%<V_reg>0, %<V_reg>2"

3324

+ "vtrn.<V_sz_elem>\t%<V_reg>0, %<V_reg>3"

3325

[(set (attr "neon_type")

3326

(if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))

3327

(const_string "neon_bp_simple")

3328

@@ -3921,13 +3922,14 @@

3329

3330

(define_insn "neon_vzip<mode>_internal"

3331

[(set (match_operand:VDQW 0 "s_register_operand" "=w")

3332

- (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")]

3333

- UNSPEC_VZIP1))

3334

- (set (match_operand:VDQW 2 "s_register_operand" "=w")

3335

- (unspec:VDQW [(match_operand:VDQW 3 "s_register_operand" "2")]

3336

- UNSPEC_VZIP2))]

3337

+ (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")

3338

+ (match_operand:VDQW 2 "s_register_operand" "w")]

3339

+ UNSPEC_VZIP1))

3340

+ (set (match_operand:VDQW 3 "s_register_operand" "=2")

3341

+ (unspec:VDQW [(match_dup 1) (match_dup 2)]

3342

+ UNSPEC_VZIP2))]

3343

"TARGET_NEON"

3344

- "vzip.<V_sz_elem>\t%<V_reg>0, %<V_reg>2"

3345

+ "vzip.<V_sz_elem>\t%<V_reg>0, %<V_reg>3"

3346

[(set (attr "neon_type")

3347

(if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))

3348

(const_string "neon_bp_simple")

3349

@@ -3947,13 +3949,14 @@

3350

3351

(define_insn "neon_vuzp<mode>_internal"

3352

[(set (match_operand:VDQW 0 "s_register_operand" "=w")

3353

- (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")]

3354

+ (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")

3355

+ (match_operand:VDQW 2 "s_register_operand" "w")]

3356

UNSPEC_VUZP1))

3357

- (set (match_operand:VDQW 2 "s_register_operand" "=w")

3358

- (unspec:VDQW [(match_operand:VDQW 3 "s_register_operand" "2")]

3359

- UNSPEC_VUZP2))]

3360

+ (set (match_operand:VDQW 3 "s_register_operand" "=2")

3361

+ (unspec:VDQW [(match_dup 1) (match_dup 2)]

3362

+ UNSPEC_VUZP2))]

3363

"TARGET_NEON"

3364

- "vuzp.<V_sz_elem>\t%<V_reg>0, %<V_reg>2"

3365

+ "vuzp.<V_sz_elem>\t%<V_reg>0, %<V_reg>3"

3366

[(set (attr "neon_type")

3367

(if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))

3368

(const_string "neon_bp_simple")

3369

Index: gcc/config/pa/predicates.md

3370

===================================================================

3371

--- a/src/gcc/config/pa/predicates.md (.../tags/gcc_4_5_3_release)

3372

+++ b/src/gcc/config/pa/predicates.md (.../branches/gcc-4_5-branch)

3373

@@ -411,12 +411,16 @@

3374

3375

;; True iff depi can be used to compute (reg | OP).

3376

3377

-(define_predicate "ior_operand"

3378

- (match_code "const_int")

3379

-{

3380

- return (GET_CODE (op) == CONST_INT && ior_mask_p (INTVAL (op)));

3381

-})

3382

+(define_predicate "cint_ior_operand"

3383

+ (and (match_code "const_int")

3384

+ (match_test "ior_mask_p (INTVAL (op))")))

3385

3386

+;; True iff OP can be used to compute (reg | OP).

3387

+

3388

+(define_predicate "reg_or_cint_ior_operand"

3389

+ (ior (match_operand 0 "register_operand")

3390

+ (match_operand 0 "cint_ior_operand")))

3391

+

3392

;; True iff OP is a CONST_INT of the forms 0...0xxxx or

3393

;; 0...01...1xxxx. Such values can be the left hand side x in (x <<

3394

;; r), using the zvdepi instruction.

3395

Index: gcc/config/pa/pa.md

3396

===================================================================

3397

--- a/src/gcc/config/pa/pa.md (.../tags/gcc_4_5_3_release)

3398

+++ b/src/gcc/config/pa/pa.md (.../branches/gcc-4_5-branch)

3399

@@ -5686,7 +5686,7 @@

3400

(define_expand "iordi3"

3401

[(set (match_operand:DI 0 "register_operand" "")

3402

(ior:DI (match_operand:DI 1 "register_operand" "")

3403

- (match_operand:DI 2 "ior_operand" "")))]

3404

+ (match_operand:DI 2 "reg_or_cint_ior_operand" "")))]

3405

""

3406

"

3407

{

3408

@@ -5707,7 +5707,7 @@

3409

(define_insn ""

3410

[(set (match_operand:DI 0 "register_operand" "=r,r")

3411

(ior:DI (match_operand:DI 1 "register_operand" "0,0")

3412

- (match_operand:DI 2 "ior_operand" "M,i")))]

3413

+ (match_operand:DI 2 "cint_ior_operand" "M,i")))]

3414

"TARGET_64BIT"

3415

"* return output_64bit_ior (operands); "

3416

[(set_attr "type" "binary,shift")

3417

@@ -5726,19 +5726,14 @@

3418

(define_expand "iorsi3"

3419

[(set (match_operand:SI 0 "register_operand" "")

3420

(ior:SI (match_operand:SI 1 "register_operand" "")

3421

- (match_operand:SI 2 "arith32_operand" "")))]

3422

+ (match_operand:SI 2 "reg_or_cint_ior_operand" "")))]

3423

""

3424

- "

3425

-{

3426

- if (! (ior_operand (operands[2], SImode)

3427

- || register_operand (operands[2], SImode)))

3428

- operands[2] = force_reg (SImode, operands[2]);

3429

-}")

3430

+ "")

3431

3432

(define_insn ""

3433

[(set (match_operand:SI 0 "register_operand" "=r,r")

3434

(ior:SI (match_operand:SI 1 "register_operand" "0,0")

3435

- (match_operand:SI 2 "ior_operand" "M,i")))]

3436

+ (match_operand:SI 2 "cint_ior_operand" "M,i")))]

3437

""

3438

"* return output_ior (operands); "

3439

[(set_attr "type" "binary,shift")

3440

Index: gcc/config/pa/pa-protos.h

3441

===================================================================

3442

--- a/src/gcc/config/pa/pa-protos.h (.../tags/gcc_4_5_3_release)

3443

+++ b/src/gcc/config/pa/pa-protos.h (.../branches/gcc-4_5-branch)

3444

@@ -79,7 +79,6 @@

3445

extern int prefetch_cc_operand (rtx, enum machine_mode);

3446

extern int prefetch_nocc_operand (rtx, enum machine_mode);

3447

extern int and_operand (rtx, enum machine_mode);

3448

-extern int ior_operand (rtx, enum machine_mode);

3449

extern int arith32_operand (rtx, enum machine_mode);

3450

extern int uint32_operand (rtx, enum machine_mode);

3451

extern int reg_before_reload_operand (rtx, enum machine_mode);

3452

@@ -94,7 +93,6 @@

3453

extern int fmpyaddoperands (rtx *);

3454

extern int fmpysuboperands (rtx *);

3455

extern int call_operand_address (rtx, enum machine_mode);

3456

-extern int ior_operand (rtx, enum machine_mode);

3457

extern void emit_bcond_fp (rtx[]);

3458

extern int emit_move_sequence (rtx *, enum machine_mode, rtx);

3459

extern int emit_hpdiv_const (rtx *, int);

3460

Index: gcc/config/mips/mips.c

3461

===================================================================

3462

--- a/src/gcc/config/mips/mips.c (.../tags/gcc_4_5_3_release)

3463

+++ b/src/gcc/config/mips/mips.c (.../branches/gcc-4_5-branch)

3464

@@ -1162,7 +1162,7 @@

3465

}

3466

};

3467

3468

-static rtx mips_find_pic_call_symbol (rtx, rtx);

3469

+static rtx mips_find_pic_call_symbol (rtx, rtx, bool);

3470

3471

/* This hash table keeps track of implicit "mips16" and "nomips16" attributes

3472

for -mflip_mips16. It maps decl names onto a boolean mode setting. */

3473

@@ -9007,6 +9007,11 @@

3474

static bool

3475

mips_cfun_call_saved_reg_p (unsigned int regno)

3476

{

3477

+ /* If the user makes an ordinarily-call-saved register global,

3478

+ that register is no longer call-saved. */

3479

+ if (global_regs[regno])

3480

+ return false;

3481

+

3482

/* Interrupt handlers need to save extra registers. */

3483

if (cfun->machine->interrupt_handler_p

3484

&& mips_interrupt_extra_call_saved_reg_p (regno))

3485

@@ -14040,12 +14045,16 @@

3486

}

3487

3488

/* REG is set in DEF. See if the definition is one of the ways we load a

3489

- register with a symbol address for a mips_use_pic_fn_addr_reg_p call. If

3490

- it is return the symbol reference of the function, otherwise return

3491

- NULL_RTX. */

3492

+ register with a symbol address for a mips_use_pic_fn_addr_reg_p call.

3493

+ If it is, return the symbol reference of the function, otherwise return

3494

+ NULL_RTX.

3495

3496

+ If RECURSE_P is true, use mips_find_pic_call_symbol to interpret

3497

+ the values of source registers, otherwise treat such registers as

3498

+ having an unknown value. */

3499

+

3500

static rtx

3501

-mips_pic_call_symbol_from_set (df_ref def, rtx reg)

3502

+mips_pic_call_symbol_from_set (df_ref def, rtx reg, bool recurse_p)

3503

{

3504

rtx def_insn, set;

3505

3506

@@ -14072,21 +14081,39 @@

3507

return symbol;

3508

}

3509

3510

- /* Follow simple register copies. */

3511

- if (REG_P (src))

3512

- return mips_find_pic_call_symbol (def_insn, src);

3513

+ /* Follow at most one simple register copy. Such copies are

3514

+ interesting in cases like:

3515

+

3516

+ for (...)

3517

+ {

3518

+ locally_binding_fn (...);

3519

+ }

3520

+

3521

+ and:

3522

+

3523

+ locally_binding_fn (...);

3524

+ ...

3525

+ locally_binding_fn (...);

3526

+

3527

+ where the load of locally_binding_fn can legitimately be

3528

+ hoisted or shared. However, we do not expect to see complex

3529

+ chains of copies, so a full worklist solution to the problem

3530

+ would probably be overkill. */

3531

+ if (recurse_p && REG_P (src))

3532

+ return mips_find_pic_call_symbol (def_insn, src, false);

3533

}

3534

3535

return NULL_RTX;

3536

}

3537

3538

-/* Find the definition of the use of REG in INSN. See if the definition is

3539

- one of the ways we load a register with a symbol address for a

3540

- mips_use_pic_fn_addr_reg_p call. If it is return the symbol reference of

3541

- the function, otherwise return NULL_RTX. */

3542

+/* Find the definition of the use of REG in INSN. See if the definition

3543

+ is one of the ways we load a register with a symbol address for a

3544

+ mips_use_pic_fn_addr_reg_p call. If it is return the symbol reference

3545

+ of the function, otherwise return NULL_RTX. RECURSE_P is as for

3546

+ mips_pic_call_symbol_from_set. */

3547

3548

static rtx

3549

-mips_find_pic_call_symbol (rtx insn, rtx reg)

3550

+mips_find_pic_call_symbol (rtx insn, rtx reg, bool recurse_p)

3551

{

3552

df_ref use;

3553

struct df_link *defs;

3554

@@ -14098,7 +14125,7 @@

3555

defs = DF_REF_CHAIN (use);

3556

if (!defs)

3557

return NULL_RTX;

3558

- symbol = mips_pic_call_symbol_from_set (defs->ref, reg);

3559

+ symbol = mips_pic_call_symbol_from_set (defs->ref, reg, recurse_p);

3560

if (!symbol)

3561

return NULL_RTX;

3562

3563

@@ -14107,7 +14134,7 @@

3564

{

3565

rtx other;

3566

3567

- other = mips_pic_call_symbol_from_set (defs->ref, reg);

3568

+ other = mips_pic_call_symbol_from_set (defs->ref, reg, recurse_p);

3569

if (!rtx_equal_p (symbol, other))

3570

return NULL_RTX;

3571

}

3572

@@ -14178,7 +14205,7 @@

3573

if (!REG_P (reg))

3574

continue;

3575

3576

- symbol = mips_find_pic_call_symbol (insn, reg);

3577

+ symbol = mips_find_pic_call_symbol (insn, reg, true);

3578

if (symbol)

3579

{

3580

mips_annotate_pic_call_expr (call, symbol);

3581

Index: libffi/src/alpha/osf.S

3582

===================================================================

3583

--- a/src/libffi/src/alpha/osf.S (.../tags/gcc_4_5_3_release)

3584

+++ b/src/libffi/src/alpha/osf.S (.../branches/gcc-4_5-branch)

3585

@@ -1,5 +1,5 @@

3586

/* -----------------------------------------------------------------------

3587

3588

3589

3590

Alpha/OSF Foreign Function Interface

3591

3592

@@ -299,33 +299,51 @@

3593

#endif

3594

3595

#ifdef __ELF__

3596

+# define UA_SI .4byte

3597

+# define FDE_ENCODING 0x1b /* pcrel sdata4 */

3598

+# define FDE_ENCODE(X) .4byte X-.

3599

+# define FDE_ARANGE(X) .4byte X

3600

+#elif defined __osf__

3601

+# define UA_SI .align 0; .long

3602

+# define FDE_ENCODING 0x50 /* aligned absolute */

3603

+# define FDE_ENCODE(X) .align 3; .quad X

3604

+# define FDE_ARANGE(X) .align 0; .quad X

3605

+#endif

3606

+

3607

+#ifdef __ELF__

3608

.section .eh_frame,EH_FRAME_FLAGS,@progbits

3609

+#elif defined __osf__

3610

+ .data

3611

+ .align 3

3612

+ .globl _GLOBAL__F_ffi_call_osf

3613

+_GLOBAL__F_ffi_call_osf:

3614

+#endif

3615

__FRAME_BEGIN__:

3616

- .4byte $LECIE1-$LSCIE1 # Length of Common Information Entry

3617

+ UA_SI $LECIE1-$LSCIE1 # Length of Common Information Entry

3618

$LSCIE1:

3619

- .4byte 0x0 # CIE Identifier Tag

3620

+ UA_SI 0x0 # CIE Identifier Tag

3621

.byte 0x1 # CIE Version

3622

.ascii "zR\0" # CIE Augmentation

3623

.byte 0x1 # uleb128 0x1; CIE Code Alignment Factor

3624

.byte 0x78 # sleb128 -8; CIE Data Alignment Factor

3625

.byte 26 # CIE RA Column

3626

.byte 0x1 # uleb128 0x1; Augmentation size

3627

- .byte 0x1b # FDE Encoding (pcrel sdata4)

3628

+ .byte FDE_ENCODING # FDE Encoding

3629

.byte 0xc # DW_CFA_def_cfa

3630

.byte 30 # uleb128 column 30

3631

.byte 0 # uleb128 offset 0

3632

.align 3

3633

$LECIE1:

3634

$LSFDE1:

3635

- .4byte $LEFDE1-$LASFDE1 # FDE Length

3636

+ UA_SI $LEFDE1-$LASFDE1 # FDE Length

3637

$LASFDE1:

3638

- .4byte $LASFDE1-__FRAME_BEGIN__ # FDE CIE offset

3639

- .4byte $LFB1-. # FDE initial location

3640

- .4byte $LFE1-$LFB1 # FDE address range

3641

+ UA_SI $LASFDE1-__FRAME_BEGIN__ # FDE CIE offset

3642

+ FDE_ENCODE($LFB1) # FDE initial location

3643

+ FDE_ARANGE($LFE1-$LFB1) # FDE address range

3644

.byte 0x0 # uleb128 0x0; Augmentation size

3645

3646

.byte 0x4 # DW_CFA_advance_loc4

3647

- .4byte $LCFI1-$LFB1

3648

+ UA_SI $LCFI1-$LFB1

3649

.byte 0x9a # DW_CFA_offset, column 26

3650

.byte 4 # uleb128 4*-8

3651

.byte 0x8f # DW_CFA_offset, column 15

3652

@@ -335,32 +353,35 @@

3653

.byte 32 # uleb128 offset 32

3654

3655

.byte 0x4 # DW_CFA_advance_loc4

3656

- .4byte $LCFI2-$LCFI1

3657

+ UA_SI $LCFI2-$LCFI1

3658

.byte 0xda # DW_CFA_restore, column 26

3659

.align 3

3660

$LEFDE1:

3661

3662

$LSFDE3:

3663

- .4byte $LEFDE3-$LASFDE3 # FDE Length

3664

+ UA_SI $LEFDE3-$LASFDE3 # FDE Length

3665

$LASFDE3:

3666

- .4byte $LASFDE3-__FRAME_BEGIN__ # FDE CIE offset

3667

- .4byte $LFB2-. # FDE initial location

3668

- .4byte $LFE2-$LFB2 # FDE address range

3669

+ UA_SI $LASFDE3-__FRAME_BEGIN__ # FDE CIE offset

3670

+ FDE_ENCODE($LFB2) # FDE initial location

3671

+ FDE_ARANGE($LFE2-$LFB2) # FDE address range

3672

.byte 0x0 # uleb128 0x0; Augmentation size

3673

3674

.byte 0x4 # DW_CFA_advance_loc4

3675

- .4byte $LCFI5-$LFB2

3676

+ UA_SI $LCFI5-$LFB2

3677

.byte 0xe # DW_CFA_def_cfa_offset

3678

.byte 0x80,0x1 # uleb128 128

3679

3680

.byte 0x4 # DW_CFA_advance_loc4

3681

- .4byte $LCFI6-$LCFI5

3682

+ UA_SI $LCFI6-$LCFI5

3683

.byte 0x9a # DW_CFA_offset, column 26

3684

.byte 16 # uleb128 offset 16*-8

3685

.align 3

3686

$LEFDE3:

3687

+#if defined __osf__

3688

+ .align 0

3689

+ .long 0 # End of Table

3690

+#endif

3691

3692

-#ifdef __linux__

3693

+#if defined __ELF__ && defined __linux__

3694

.section .note.GNU-stack,"",@progbits

3695

#endif

3696

-#endif

3697

Index: libffi/ChangeLog

3698

===================================================================

3699

--- a/src/libffi/ChangeLog (.../tags/gcc_4_5_3_release)

3700

+++ b/src/libffi/ChangeLog (.../branches/gcc-4_5-branch)

3701

@@ -1,3 +1,13 @@

3702

+2011-05-02 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>

3703

+

3704

+ Backport from mainline:

3705

+ 2011-04-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>

3706

+

3707

+ * src/alpha/osf.S (UA_SI, FDE_ENCODING, FDE_ENCODE, FDE_ARANGE):

3708

+ Define.

3709

+ Use them to handle ELF vs. ECOFF differences.

3710

+ [__osf__] (_GLOBAL__F_ffi_call_osf): Define.

3711

+

3712

2011-04-28 Release Manager

3713

3714

* GCC 4.5.3 released.