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  • Committer: Bazaar Package Importer
  • Author(s): Rodrigo Parra Novo
  • Date: 2006-07-25 20:06:28 UTC
  • mfrom: (1.1.4 upstream)
  • Revision ID: james.westby@ubuntu.com-20060725200628-gjmmd9gxfxdc4ejs
Tags: 1:1.1.1-0ubuntu1
* New Upstream version
* Changed Build-Depends from mesa-swrast-source to mesa-swx11-source,
  following Debian package nomenclature
* Re-did 12_security_policy_in_etc.diff for 1.1.1
* Dropped 15_security_allocate_local.diff (applied upstream)
* Dropped 16_SECURITY_setuid.diff (applied upstream)
* Dropped 000_ubuntu_fix_read_kernel_mapping.patch (applied upstream)
* Dropped 002_ubuntu_fix_for_certain_intel_chipsets.patch (applied upstream)
* Updated versioned Build-Depends on mesa-swx11-source to version
  6.5.0.cvs.20060725-0ubuntu1
* Added arrayobj.c, arrayobj.h, bitset.h & rbadaptors.h to
  GL/symlink-mesa.sh (linked from mesa-swx11-source)
* Added arrayobj.c to default build target on GL/mesa/main

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Lines of Context:
debian/patches/002_ubuntu_fix_for_certain_intel_chipsets.patch
1
 
diff -urNad --exclude=CVS --exclude=.svn ./hw/xfree86/common/xf86pciBus.c /tmp/dpep-work.sYNMum/xorg-server-1.0.2/hw/xfree86/common/xf86pciBus.c
2
 
--- ./hw/xfree86/common/xf86pciBus.c    2005-07-04 20:41:02.000000000 +0200
3
 
+++ /tmp/dpep-work.sYNMum/xorg-server-1.0.2/hw/xfree86/common/xf86pciBus.c      2006-05-04 00:57:05.831956042 +0200
4
 
@@ -1800,7 +1800,16 @@
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                PciBus->brfunc = pcrp->funcnum;
6
 
 
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                PciBus->subclass = sub_class;
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-               PciBus->interface = pcrp->pci_prog_if;
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+
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+               /* The Intel bridges don't report as transparent
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+                  but guess what they are - from Linux kernel - airlied */
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+               if ((pcrp->pci_vendor == PCI_VENDOR_INTEL) && 
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+                  ((pcrp->pci_device & 0xff00) == 0x2400)) {
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+                       xf86MsgVerb(X_INFO, 3, "Intel Bridge workaround enabled\n");
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+                       PciBus->interface = PCI_IF_BRIDGE_PCI_SUBTRACTIVE;
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+               } else {
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+                       PciBus->interface = pcrp->pci_prog_if;
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+               }
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                if (pBusInfo && pBusInfo->funcs->pciControlBridge)
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                    PciBus->brcontrol =
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diff -urNad --exclude=CVS --exclude=.svn ./hw/xfree86/os-support/shared/stdResource.c /tmp/dpep-work.sYNMum/xorg-server-1.0.2/hw/xfree86/os-support/shared/stdResource.c
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--- ./hw/xfree86/os-support/shared/stdResource.c        2005-07-03 09:01:35.000000000 +0200
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+++ /tmp/dpep-work.sYNMum/xorg-server-1.0.2/hw/xfree86/os-support/shared/stdResource.c  2006-05-04 00:57:05.833955345 +0200
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@@ -150,10 +150,11 @@
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     ret = xf86AddResToList(ret, &range, -1);
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     RANGE(range, 0xfee00000, 0xfeefffff, ResExcMemBlock | ResBios);
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     ret = xf86AddResToList(ret, &range, -1);
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-#endif
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+    /* airlied - remove BIOS range it shouldn't be here 
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+       this should use E820 - or THE OS */
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     RANGE(range, 0xffe00000, 0xffffffff, ResExcMemBlock | ResBios);
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     ret = xf86AddResToList(ret, &range, -1);
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-
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+#endif
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     /*
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      * Fallback would be to claim well known ports in the 0x0 - 0x3ff range
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      * along with their sparse I/O aliases, but that's too imprecise.  Instead