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diff -urNad --exclude=CVS --exclude=.svn ./hw/xfree86/common/xf86pciBus.c /tmp/dpep-work.sYNMum/xorg-server-1.0.2/hw/xfree86/common/xf86pciBus.c
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--- ./hw/xfree86/common/xf86pciBus.c 2005-07-04 20:41:02.000000000 +0200
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+++ /tmp/dpep-work.sYNMum/xorg-server-1.0.2/hw/xfree86/common/xf86pciBus.c 2006-05-04 00:57:05.831956042 +0200
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PciBus->brfunc = pcrp->funcnum;
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PciBus->subclass = sub_class;
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- PciBus->interface = pcrp->pci_prog_if;
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+ /* The Intel bridges don't report as transparent
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+ but guess what they are - from Linux kernel - airlied */
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+ if ((pcrp->pci_vendor == PCI_VENDOR_INTEL) &&
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+ ((pcrp->pci_device & 0xff00) == 0x2400)) {
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+ xf86MsgVerb(X_INFO, 3, "Intel Bridge workaround enabled\n");
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+ PciBus->interface = PCI_IF_BRIDGE_PCI_SUBTRACTIVE;
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+ PciBus->interface = pcrp->pci_prog_if;
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if (pBusInfo && pBusInfo->funcs->pciControlBridge)
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diff -urNad --exclude=CVS --exclude=.svn ./hw/xfree86/os-support/shared/stdResource.c /tmp/dpep-work.sYNMum/xorg-server-1.0.2/hw/xfree86/os-support/shared/stdResource.c
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--- ./hw/xfree86/os-support/shared/stdResource.c 2005-07-03 09:01:35.000000000 +0200
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+++ /tmp/dpep-work.sYNMum/xorg-server-1.0.2/hw/xfree86/os-support/shared/stdResource.c 2006-05-04 00:57:05.833955345 +0200
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ret = xf86AddResToList(ret, &range, -1);
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RANGE(range, 0xfee00000, 0xfeefffff, ResExcMemBlock | ResBios);
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ret = xf86AddResToList(ret, &range, -1);
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+ /* airlied - remove BIOS range it shouldn't be here
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+ this should use E820 - or THE OS */
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RANGE(range, 0xffe00000, 0xffffffff, ResExcMemBlock | ResBios);
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ret = xf86AddResToList(ret, &range, -1);
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* Fallback would be to claim well known ports in the 0x0 - 0x3ff range
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* along with their sparse I/O aliases, but that's too imprecise. Instead