54
55
return 0; /* CPUID not supported */
56
cpuid(0, eax, ebx, ecx, edx);
58
if (ebx == 0x756e6547 &&
64
cpuid(1, eax, ebx, ecx, edx);
65
if ((edx & 0x00800000) == 0)
57
cpuid(0, max_std_level, ebx, ecx, edx);
59
if(max_std_level >= 1){
60
cpuid(1, eax, ebx, ecx, std_caps);
61
if (std_caps & (1<<23))
63
if (std_caps & (1<<25))
69
64
rval |= MM_MMXEXT | MM_SSE;
65
if (std_caps & (1<<26))
73
} else if (ebx == 0x68747541 &&
69
cpuid(0x80000000, max_ext_level, ebx, ecx, edx);
71
if(max_ext_level >= 0x80000001){
72
cpuid(0x80000001, eax, ebx, ecx, ext_caps);
73
if (ext_caps & (1<<31))
75
if (ext_caps & (1<<30))
77
if (ext_caps & (1<<23))
81
cpuid(0, eax, ebx, ecx, edx);
82
if ( ebx == 0x68747541 &&
74
83
edx == 0x69746e65 &&
75
84
ecx == 0x444d4163) {
77
cpuid(0x80000000, eax, ebx, ecx, edx);
78
if ((unsigned)eax < 0x80000001)
80
cpuid(0x80000001, eax, ebx, ecx, edx);
81
if ((edx & 0x00800000) == 0)
88
//MEANX : A64 & Xp can do sse
86
if(ext_caps & (1<<22))
90
cpuid(1, eax, ebx, ecx, edx);
95
88
} else if (ebx == 0x746e6543 &&
96
89
edx == 0x48727561 &&
97
90
ecx == 0x736c7561) { /* "CentaurHauls" */
99
cpuid(0x80000000, eax, ebx, ecx, edx);
100
if ((unsigned)eax < 0x80000001)
102
cpuid(0x80000001, eax, ebx, ecx, edx);
104
if( edx & ( 1 << 31) )
106
if( edx & ( 1 << 23) )
108
if( edx & ( 1 << 24) )
92
if(ext_caps & (1<<24))
109
93
rval |= MM_MMXEXT;
113
94
} else if (ebx == 0x69727943 &&
114
95
edx == 0x736e4978 &&
115
96
ecx == 0x64616574) {
122
103
According to the table, the only CPU which supports level
123
104
2 is also the only one which supports extended CPUID levels.
127
cpuid(0x80000001, eax, ebx, ecx, edx);
128
if ((eax & 0x00800000) == 0)
131
if (eax & 0x01000000)
108
if (ext_caps & (1<<24))
132
109
rval |= MM_MMXEXT;
134
} else if (ebx == 0x756e6547 &&
137
/* Tranmeta Crusoe */
138
cpuid(0x80000000, eax, ebx, ecx, edx);
139
if ((unsigned)eax < 0x80000001)
141
cpuid(0x80000001, eax, ebx, ecx, edx);
142
if ((edx & 0x00800000) == 0)
112
av_log(NULL, AV_LOG_DEBUG, "%s%s%s%s%s%s\n",
113
(rval&MM_MMX) ? "MMX ":"",
114
(rval&MM_MMXEXT) ? "MMX2 ":"",
115
(rval&MM_SSE) ? "SSE ":"",
116
(rval&MM_SSE2) ? "SSE2 ":"",
117
(rval&MM_3DNOW) ? "3DNow ":"",
118
(rval&MM_3DNOWEXT) ? "3DNowExt ":"");