128
128
/* Data Register, Port A */
129
129
#define PORTA _SFR_IO8(0x1B)
131
/* 0x1C..0x1F EEPROM */
131
/* EEPROM Control Register */
132
#define EECR _SFR_IO8(0x1C)
134
/* EEPROM Data Register */
135
#define EEDR _SFR_IO8(0x1D)
137
/* EEPROM Address Register */
138
#define EEAR _SFR_IO16(0x1E)
139
#define EEARL _SFR_IO8(0x1E)
140
#define EEARH _SFR_IO8(0x1F)
133
142
/* UART Baud Register HIgh */
134
143
#define UBRRH _SFR_IO8(0x20)
219
228
/* Interrupt vectors */
221
#define SIG_INTERRUPT0 _VECTOR(1)
222
#define SIG_INTERRUPT1 _VECTOR(2)
223
#define SIG_INTERRUPT2 _VECTOR(3)
224
#define SIG_OUTPUT_COMPARE2 _VECTOR(4)
225
#define SIG_OVERFLOW2 _VECTOR(5)
226
#define SIG_INPUT_CAPTURE1 _VECTOR(6)
227
#define SIG_OUTPUT_COMPARE1A _VECTOR(7)
228
#define SIG_OUTPUT_COMPARE1B _VECTOR(8)
229
#define SIG_OVERFLOW1 _VECTOR(9)
230
#define SIG_OUTPUT_COMPARE0 _VECTOR(10)
231
#define SIG_OVERFLOW0 _VECTOR(11)
232
#define SIG_SPI _VECTOR(12)
233
#define SIG_UART0_RECV _VECTOR(13)
234
#define SIG_UART1_RECV _VECTOR(14)
235
#define SIG_UART0_DATA _VECTOR(15)
236
#define SIG_UART1_DATA _VECTOR(16)
237
#define SIG_UART0_TRANS _VECTOR(17)
238
#define SIG_UART1_TRANS _VECTOR(18)
239
#define SIG_EEPROM_READY _VECTOR(19)
240
#define SIG_COMPARATOR _VECTOR(20)
230
/* External Interrupt 0 */
231
#define INT0_vect _VECTOR(1)
232
#define SIG_INTERRUPT0 _VECTOR(1)
234
/* External Interrupt 1 */
235
#define INT1_vect _VECTOR(2)
236
#define SIG_INTERRUPT1 _VECTOR(2)
238
/* External Interrupt 2 */
239
#define INT2_vect _VECTOR(3)
240
#define SIG_INTERRUPT2 _VECTOR(3)
242
/* Timer/Counter2 Compare Match */
243
#define TIMER2_COMP_vect _VECTOR(4)
244
#define SIG_OUTPUT_COMPARE2 _VECTOR(4)
246
/* Timer/Counter2 Overflow */
247
#define TIMER2_OVF_vect _VECTOR(5)
248
#define SIG_OVERFLOW2 _VECTOR(5)
250
/* Timer/Counter1 Capture Event */
251
#define TIMER1_CAPT_vect _VECTOR(6)
252
#define SIG_INPUT_CAPTURE1 _VECTOR(6)
254
/* Timer/Counter1 Compare Match A */
255
#define TIMER1_COMPA_vect _VECTOR(7)
256
#define SIG_OUTPUT_COMPARE1A _VECTOR(7)
258
/* Timer/Counter1 Compare Match B */
259
#define TIMER1_COMPB_vect _VECTOR(8)
260
#define SIG_OUTPUT_COMPARE1B _VECTOR(8)
262
/* Timer/Counter1 Overflow */
263
#define TIMER1_OVF_vect _VECTOR(9)
264
#define SIG_OVERFLOW1 _VECTOR(9)
266
/* Timer/Counter0 Compare Match */
267
#define TIMER0_COMP_vect _VECTOR(10)
268
#define SIG_OUTPUT_COMPARE0 _VECTOR(10)
270
/* Timer/Counter0 Overflow */
271
#define TIMER0_OVF_vect _VECTOR(11)
272
#define SIG_OVERFLOW0 _VECTOR(11)
274
/* Serial Transfer Complete */
275
#define SPI_STC_vect _VECTOR(12)
276
#define SIG_SPI _VECTOR(12)
278
/* UART0, Rx Complete */
279
#define UART0_RX_vect _VECTOR(13)
280
#define SIG_UART0_RECV _VECTOR(13)
282
/* UART1, Rx Complete */
283
#define UART1_RX_vect _VECTOR(14)
284
#define SIG_UART1_RECV _VECTOR(14)
286
/* UART0 Data Register Empty */
287
#define UART0_UDRE_vect _VECTOR(15)
288
#define SIG_UART0_DATA _VECTOR(15)
290
/* UART1 Data Register Empty */
291
#define UART1_UDRE_vect _VECTOR(16)
292
#define SIG_UART1_DATA _VECTOR(16)
294
/* UART0, Tx Complete */
295
#define UART0_TX_vect _VECTOR(17)
296
#define SIG_UART0_TRANS _VECTOR(17)
298
/* UART1, Tx Complete */
299
#define UART1_TX_vect _VECTOR(18)
300
#define SIG_UART1_TRANS _VECTOR(18)
303
#define EE_RDY_vect _VECTOR(19)
304
#define SIG_EEPROM_READY _VECTOR(19)
306
/* Analog Comparator */
307
#define ANA_COMP_vect _VECTOR(20)
308
#define SIG_COMPARATOR _VECTOR(20)
242
310
#define _VECTORS_SIZE 84