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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE. */
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/* $Id: iotn13.h,v 1.3 2004/11/02 18:16:07 arcanum Exp $ */
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/* $Id: iotn13.h,v 1.6 2005/10/30 22:11:23 joerg_wunsch Exp $ */
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/* avr/iotn13.h - definitions for ATtiny13 */
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/* These are not defined in <avr/io.h> like the rest of the eeprom names. */
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/* ATtiny EEPROM Control Register EECR */
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#define EECR _SFR_IO8(0x1C)
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/* EEPROM Data Register */
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#define EEDR _SFR_IO8(0x1D)
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/* The EEPROM Address Register EEAR[6:0] */
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#define EEAR _SFR_IO8(0x1E)
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#define EEARL _SFR_IO8(0x1E)
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/* Watchdog Timer Control Register */
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#define WDTCR _SFR_IO8(0x21)
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9 0x0008 WDT Watchdog Time-out
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10 0x0009 ADC ADC Conversion Complete */
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#define SIG_INTERRUPT0 _VECTOR(1)
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#define SIG_PIN_CHANGE0 _VECTOR(2)
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#define SIG_OVERFLOW0 _VECTOR(3)
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#define SIG_EEPROM_READY _VECTOR(4)
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#define SIG_COMPARATOR _VECTOR(5)
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#define SIG_OUTPUT_COMPARE0A _VECTOR(6)
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#define SIG_OUTPUT_COMPARE0B _VECTOR(7)
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#define SIG_WATCHDOG_TIMEOUT _VECTOR(8)
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#define SIG_ADC _VECTOR(9)
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/* External Interrupt 0 */
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#define INT0_vect _VECTOR(1)
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#define SIG_INTERRUPT0 _VECTOR(1)
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/* External Interrupt Request 0 */
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#define PCINT0_vect _VECTOR(2)
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#define SIG_PIN_CHANGE0 _VECTOR(2)
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/* Timer/Counter0 Overflow */
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#define TIM0_OVF_vect _VECTOR(3)
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#define SIG_OVERFLOW0 _VECTOR(3)
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#define EE_RDY_vect _VECTOR(4)
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#define SIG_EEPROM_READY _VECTOR(4)
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/* Analog Comparator */
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#define ANA_COMP_vect _VECTOR(5)
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#define SIG_COMPARATOR _VECTOR(5)
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/* Timer/Counter Compare Match A */
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#define TIM0_COMPA_vect _VECTOR(6)
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#define SIG_OUTPUT_COMPARE0A _VECTOR(6)
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/* Timer/Counter Compare Match B */
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#define TIM0_COMPB_vect _VECTOR(7)
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#define SIG_OUTPUT_COMPARE0B _VECTOR(7)
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/* Watchdog Time-out */
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#define WDT_vect _VECTOR(8)
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#define SIG_WATCHDOG_TIMEOUT _VECTOR(8)
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/* ADC Conversion Complete */
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#define ADC_vect _VECTOR(9)
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#define SIG_ADC _VECTOR(9)
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#define _VECTORS_SIZE 20