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- Committer: Bazaar Package Importer
- Author(s): Matthias Urlichs
- Date: 2006-01-24 04:31:42 UTC
- mfrom: (1.1.2 upstream)
- Revision ID: james.westby@ubuntu.com-20060124043142-pbg192or6qxv3yk2
Tags: 1.9.20-1
* New Upstream version. Closes:#306890,#344530
* Closes:#320490: gpg-protect-tool fails to decrypt PKCS-12 files
* Depend on libopensc2-dev, not -1-. Closes:#348106
* Closes:#320490: gpg-protect-tool fails to decrypt PKCS-12 files
* Depend on libopensc2-dev, not -1-. Closes:#348106
- files added:
- BUGS
- artwork
- assuan
- checks
- contrib
- doc/fr
- doc/gph
- mpi/alpha
- mpi/generic
- mpi/hppa
- mpi/hppa1.1
- mpi/i386
- mpi/i386-openbsd
- mpi/i586
- mpi/m68k
- mpi/m68k/mc68020
- mpi/mips3
- mpi/pa7100
- mpi/power
- mpi/powerpc32
- mpi/powerpc64
- mpi/sparc32
- mpi/sparc32v8
- mpi/supersparc
- scripts/conf-riscos
- scripts/conf-riscos/cipher
- scripts/conf-riscos/include
- tests/extrasamples
- tests/pkits
- tests/samplemsgs
- zlib
- files removed:
- VERSION
- files modified:
- ChangeLog
- autogen.sh *
- intl/config.charset *
- kbx/mkerrors *
- scripts/compile *
- scripts/config.guess *
- scripts/config.rpath *
- scripts/config.sub *
- scripts/depcomp *
- scripts/install-sh *
- scripts/mdate-sh *
- scripts/missing *
- scripts/mkinstalldirs *
- tests/inittests *
- tests/runtest *
- tools/addgnupghome *
- tools/gpgsm-gencert.sh *
added
removed
mpi/longlong.h
1
/* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
2
Note: I added some stuff for use with gnupg
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4
Copyright (C) 1991, 1992, 1993, 1994, 1996, 1998,
5
2000, 2001, 2002 Free Software Foundation, Inc.
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7
This file is free software; you can redistribute it and/or modify
8
it under the terms of the GNU Library General Public License as published by
9
the Free Software Foundation; either version 2 of the License, or (at your
10
option) any later version.
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12
This file is distributed in the hope that it will be useful, but
13
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Library General Public
15
License for more details.
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17
You should have received a copy of the GNU Library General Public License
18
along with this file; see the file COPYING.LIB. If not, write to
19
the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
20
MA 02111-1307, USA. */
21
22
/* You have to define the following before including this file:
23
24
UWtype -- An unsigned type, default type for operations (typically a "word")
25
UHWtype -- An unsigned type, at least half the size of UWtype.
26
UDWtype -- An unsigned type, at least twice as large a UWtype
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W_TYPE_SIZE -- size in bits of UWtype
28
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SItype, USItype -- Signed and unsigned 32 bit types.
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DItype, UDItype -- Signed and unsigned 64 bit types.
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32
On a 32 bit machine UWtype should typically be USItype;
33
on a 64 bit machine, UWtype should typically be UDItype.
34
*/
35
36
#define __BITS4 (W_TYPE_SIZE / 4)
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#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
38
#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
39
#define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
40
41
/* This is used to make sure no undesirable sharing between different libraries
42
that use this file takes place. */
43
#ifndef __MPN
44
#define __MPN(x) __##x
45
#endif
46
47
/* Define auxiliary asm macros.
48
49
1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
50
UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
51
word product in HIGH_PROD and LOW_PROD.
52
53
2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
54
UDWtype product. This is just a variant of umul_ppmm.
55
56
3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
57
denominator) divides a UDWtype, composed by the UWtype integers
58
HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
59
in QUOTIENT and the remainder in REMAINDER. HIGH_NUMERATOR must be less
60
than DENOMINATOR for correct operation. If, in addition, the most
61
significant bit of DENOMINATOR must be 1, then the pre-processor symbol
62
UDIV_NEEDS_NORMALIZATION is defined to 1.
63
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4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
65
denominator). Like udiv_qrnnd but the numbers are signed. The quotient
66
is rounded towards 0.
67
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5) count_leading_zeros(count, x) counts the number of zero-bits from the
69
msb to the first non-zero bit in the UWtype X. This is the number of
70
steps X needs to be shifted left to set the msb. Undefined for X == 0,
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unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
72
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6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
74
from the least significant end.
75
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7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
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high_addend_2, low_addend_2) adds two UWtype integers, composed by
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HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
79
respectively. The result is placed in HIGH_SUM and LOW_SUM. Overflow
80
(i.e. carry out) is not stored anywhere, and is lost.
81
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8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
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high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
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composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
85
LOW_SUBTRAHEND_2 respectively. The result is placed in HIGH_DIFFERENCE
86
and LOW_DIFFERENCE. Overflow (i.e. carry out) is not stored anywhere,
87
and is lost.
88
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If any of these macros are left undefined for a particular CPU,
90
C macros are used. */
91
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/* The CPUs come in alphabetical order below.
93
94
Please add support for more CPUs here, or improve the current support
95
for the CPUs below! */
96
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#if defined (__GNUC__) && !defined (NO_ASM)
98
99
/* We sometimes need to clobber "cc" with gcc2, but that would not be
100
understood by gcc1. Use cpp to avoid major code duplication. */
101
#if __GNUC__ < 2
102
#define __CLOBBER_CC
103
#define __AND_CLOBBER_CC
104
#else /* __GNUC__ >= 2 */
105
#define __CLOBBER_CC : "cc"
106
#define __AND_CLOBBER_CC , "cc"
107
#endif /* __GNUC__ < 2 */
108
109
110
/***************************************
111
************** A29K *****************
112
***************************************/
113
#if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
114
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
115
__asm__ ("add %1,%4,%5\n" \
116
"addc %0,%2,%3" \
117
: "=r" ((USItype)(sh)), \
118
"=&r" ((USItype)(sl)) \
119
: "%r" ((USItype)(ah)), \
120
"rI" ((USItype)(bh)), \
121
"%r" ((USItype)(al)), \
122
"rI" ((USItype)(bl)))
123
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
124
__asm__ ("sub %1,%4,%5\n" \
125
"subc %0,%2,%3" \
126
: "=r" ((USItype)(sh)), \
127
"=&r" ((USItype)(sl)) \
128
: "r" ((USItype)(ah)), \
129
"rI" ((USItype)(bh)), \
130
"r" ((USItype)(al)), \
131
"rI" ((USItype)(bl)))
132
#define umul_ppmm(xh, xl, m0, m1) \
133
do { \
134
USItype __m0 = (m0), __m1 = (m1); \
135
__asm__ ("multiplu %0,%1,%2" \
136
: "=r" ((USItype)(xl)) \
137
: "r" (__m0), \
138
"r" (__m1)); \
139
__asm__ ("multmu %0,%1,%2" \
140
: "=r" ((USItype)(xh)) \
141
: "r" (__m0), \
142
"r" (__m1)); \
143
} while (0)
144
#define udiv_qrnnd(q, r, n1, n0, d) \
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__asm__ ("dividu %0,%3,%4" \
146
: "=r" ((USItype)(q)), \
147
"=q" ((USItype)(r)) \
148
: "1" ((USItype)(n1)), \
149
"r" ((USItype)(n0)), \
150
"r" ((USItype)(d)))
151
#define count_leading_zeros(count, x) \
152
__asm__ ("clz %0,%1" \
153
: "=r" ((USItype)(count)) \
154
: "r" ((USItype)(x)))
155
#define COUNT_LEADING_ZEROS_0 32
156
#endif /* __a29k__ */
157
158
159
#if defined (__alpha) && W_TYPE_SIZE == 64
160
#define umul_ppmm(ph, pl, m0, m1) \
161
do { \
162
UDItype __m0 = (m0), __m1 = (m1); \
163
__asm__ ("umulh %r1,%2,%0" \
164
: "=r" ((UDItype) ph) \
165
: "%rJ" (__m0), \
166
"rI" (__m1)); \
167
(pl) = __m0 * __m1; \
168
} while (0)
169
#define UMUL_TIME 46
170
#ifndef LONGLONG_STANDALONE
171
#define udiv_qrnnd(q, r, n1, n0, d) \
172
do { UDItype __r; \
173
(q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \
174
(r) = __r; \
175
} while (0)
176
extern UDItype __udiv_qrnnd ();
177
#define UDIV_TIME 220
178
#endif /* LONGLONG_STANDALONE */
179
#endif /* __alpha */
180
181
/***************************************
182
************** ARM ******************
183
***************************************/
184
#if defined (__arm__) && W_TYPE_SIZE == 32
185
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
186
__asm__ ("adds %1, %4, %5\n" \
187
"adc %0, %2, %3" \
188
: "=r" ((USItype)(sh)), \
189
"=&r" ((USItype)(sl)) \
190
: "%r" ((USItype)(ah)), \
191
"rI" ((USItype)(bh)), \
192
"%r" ((USItype)(al)), \
193
"rI" ((USItype)(bl)))
194
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
195
__asm__ ("subs %1, %4, %5\n" \
196
"sbc %0, %2, %3" \
197
: "=r" ((USItype)(sh)), \
198
"=&r" ((USItype)(sl)) \
199
: "r" ((USItype)(ah)), \
200
"rI" ((USItype)(bh)), \
201
"r" ((USItype)(al)), \
202
"rI" ((USItype)(bl)))
203
#if defined __ARM_ARCH_2__ || defined __ARM_ARCH_3__
204
#define umul_ppmm(xh, xl, a, b) \
205
__asm__ ("%@ Inlined umul_ppmm\n" \
206
"mov %|r0, %2, lsr #16 @ AAAA\n" \
207
"mov %|r2, %3, lsr #16 @ BBBB\n" \
208
"bic %|r1, %2, %|r0, lsl #16 @ aaaa\n" \
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"bic %0, %3, %|r2, lsl #16 @ bbbb\n" \
210
"mul %1, %|r1, %|r2 @ aaaa * BBBB\n" \
211
"mul %|r2, %|r0, %|r2 @ AAAA * BBBB\n" \
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"mul %|r1, %0, %|r1 @ aaaa * bbbb\n" \
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"mul %0, %|r0, %0 @ AAAA * bbbb\n" \
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"adds %|r0, %1, %0 @ central sum\n" \
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"addcs %|r2, %|r2, #65536\n" \
216
"adds %1, %|r1, %|r0, lsl #16\n" \
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"adc %0, %|r2, %|r0, lsr #16" \
218
: "=&r" ((USItype)(xh)), \
219
"=r" ((USItype)(xl)) \
220
: "r" ((USItype)(a)), \
221
"r" ((USItype)(b)) \
222
: "r0", "r1", "r2")
223
#else
224
#define umul_ppmm(xh, xl, a, b) \
225
__asm__ ("%@ Inlined umul_ppmm\n" \
226
"umull %r1, %r0, %r2, %r3" \
227
: "=&r" ((USItype)(xh)), \
228
"=r" ((USItype)(xl)) \
229
: "r" ((USItype)(a)), \
230
"r" ((USItype)(b)) \
231
: "r0", "r1")
232
#endif
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#define UMUL_TIME 20
234
#define UDIV_TIME 100
235
#endif /* __arm__ */
236
237
/***************************************
238
************** CLIPPER **************
239
***************************************/
240
#if defined (__clipper__) && W_TYPE_SIZE == 32
241
#define umul_ppmm(w1, w0, u, v) \
242
({union {UDItype __ll; \
243
struct {USItype __l, __h;} __i; \
244
} __xx; \
245
__asm__ ("mulwux %2,%0" \
246
: "=r" (__xx.__ll) \
247
: "%0" ((USItype)(u)), \
248
"r" ((USItype)(v))); \
249
(w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
250
#define smul_ppmm(w1, w0, u, v) \
251
({union {DItype __ll; \
252
struct {SItype __l, __h;} __i; \
253
} __xx; \
254
__asm__ ("mulwx %2,%0" \
255
: "=r" (__xx.__ll) \
256
: "%0" ((SItype)(u)), \
257
"r" ((SItype)(v))); \
258
(w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
259
#define __umulsidi3(u, v) \
260
({UDItype __w; \
261
__asm__ ("mulwux %2,%0" \
262
: "=r" (__w) \
263
: "%0" ((USItype)(u)), \
264
"r" ((USItype)(v))); \
265
__w; })
266
#endif /* __clipper__ */
267
268
269
/***************************************
270
************** GMICRO ***************
271
***************************************/
272
#if defined (__gmicro__) && W_TYPE_SIZE == 32
273
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
274
__asm__ ("add.w %5,%1\n" \
275
"addx %3,%0" \
276
: "=g" ((USItype)(sh)), \
277
"=&g" ((USItype)(sl)) \
278
: "%0" ((USItype)(ah)), \
279
"g" ((USItype)(bh)), \
280
"%1" ((USItype)(al)), \
281
"g" ((USItype)(bl)))
282
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
283
__asm__ ("sub.w %5,%1\n" \
284
"subx %3,%0" \
285
: "=g" ((USItype)(sh)), \
286
"=&g" ((USItype)(sl)) \
287
: "0" ((USItype)(ah)), \
288
"g" ((USItype)(bh)), \
289
"1" ((USItype)(al)), \
290
"g" ((USItype)(bl)))
291
#define umul_ppmm(ph, pl, m0, m1) \
292
__asm__ ("mulx %3,%0,%1" \
293
: "=g" ((USItype)(ph)), \
294
"=r" ((USItype)(pl)) \
295
: "%0" ((USItype)(m0)), \
296
"g" ((USItype)(m1)))
297
#define udiv_qrnnd(q, r, nh, nl, d) \
298
__asm__ ("divx %4,%0,%1" \
299
: "=g" ((USItype)(q)), \
300
"=r" ((USItype)(r)) \
301
: "1" ((USItype)(nh)), \
302
"0" ((USItype)(nl)), \
303
"g" ((USItype)(d)))
304
#define count_leading_zeros(count, x) \
305
__asm__ ("bsch/1 %1,%0" \
306
: "=g" (count) \
307
: "g" ((USItype)(x)), \
308
"0" ((USItype)0))
309
#endif
310
311
312
/***************************************
313
************** HPPA *****************
314
***************************************/
315
#if defined (__hppa) && W_TYPE_SIZE == 32
316
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
317
__asm__ (" add %4,%5,%1\n" \
318
" addc %2,%3,%0" \
319
: "=r" ((USItype)(sh)), \
320
"=&r" ((USItype)(sl)) \
321
: "%rM" ((USItype)(ah)), \
322
"rM" ((USItype)(bh)), \
323
"%rM" ((USItype)(al)), \
324
"rM" ((USItype)(bl)))
325
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
326
__asm__ (" sub %4,%5,%1\n" \
327
" subb %2,%3,%0" \
328
: "=r" ((USItype)(sh)), \
329
"=&r" ((USItype)(sl)) \
330
: "rM" ((USItype)(ah)), \
331
"rM" ((USItype)(bh)), \
332
"rM" ((USItype)(al)), \
333
"rM" ((USItype)(bl)))
334
#if defined (_PA_RISC1_1)
335
#define umul_ppmm(wh, wl, u, v) \
336
do { \
337
union {UDItype __ll; \
338
struct {USItype __h, __l;} __i; \
339
} __xx; \
340
__asm__ (" xmpyu %1,%2,%0" \
341
: "=*f" (__xx.__ll) \
342
: "*f" ((USItype)(u)), \
343
"*f" ((USItype)(v))); \
344
(wh) = __xx.__i.__h; \
345
(wl) = __xx.__i.__l; \
346
} while (0)
347
#define UMUL_TIME 8
348
#define UDIV_TIME 60
349
#else
350
#define UMUL_TIME 40
351
#define UDIV_TIME 80
352
#endif
353
#ifndef LONGLONG_STANDALONE
354
#define udiv_qrnnd(q, r, n1, n0, d) \
355
do { USItype __r; \
356
(q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \
357
(r) = __r; \
358
} while (0)
359
extern USItype __udiv_qrnnd ();
360
#endif /* LONGLONG_STANDALONE */
361
#define count_leading_zeros(count, x) \
362
do { \
363
USItype __tmp; \
364
__asm__ ( \
365
" ldi 1,%0 \n" \
366
" extru,= %1,15,16,%%r0 ; Bits 31..16 zero? \n" \
367
" extru,tr %1,15,16,%1 ; No. Shift down, skip add.\n" \
368
" ldo 16(%0),%0 ; Yes. Perform add. \n" \
369
" extru,= %1,23,8,%%r0 ; Bits 15..8 zero? \n" \
370
" extru,tr %1,23,8,%1 ; No. Shift down, skip add.\n" \
371
" ldo 8(%0),%0 ; Yes. Perform add. \n" \
372
" extru,= %1,27,4,%%r0 ; Bits 7..4 zero? \n" \
373
" extru,tr %1,27,4,%1 ; No. Shift down, skip add.\n" \
374
" ldo 4(%0),%0 ; Yes. Perform add. \n" \
375
" extru,= %1,29,2,%%r0 ; Bits 3..2 zero? \n" \
376
" extru,tr %1,29,2,%1 ; No. Shift down, skip add.\n" \
377
" ldo 2(%0),%0 ; Yes. Perform add. \n" \
378
" extru %1,30,1,%1 ; Extract bit 1. \n" \
379
" sub %0,%1,%0 ; Subtract it. " \
380
: "=r" (count), "=r" (__tmp) : "1" (x)); \
381
} while (0)
382
#endif /* hppa */
383
384
385
/***************************************
386
************** I370 *****************
387
***************************************/
388
#if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32
389
#define umul_ppmm(xh, xl, m0, m1) \
390
do { \
391
union {UDItype __ll; \
392
struct {USItype __h, __l;} __i; \
393
} __xx; \
394
USItype __m0 = (m0), __m1 = (m1); \
395
__asm__ ("mr %0,%3" \
396
: "=r" (__xx.__i.__h), \
397
"=r" (__xx.__i.__l) \
398
: "%1" (__m0), \
399
"r" (__m1)); \
400
(xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
401
(xh) += ((((SItype) __m0 >> 31) & __m1) \
402
+ (((SItype) __m1 >> 31) & __m0)); \
403
} while (0)
404
#define smul_ppmm(xh, xl, m0, m1) \
405
do { \
406
union {DItype __ll; \
407
struct {USItype __h, __l;} __i; \
408
} __xx; \
409
__asm__ ("mr %0,%3" \
410
: "=r" (__xx.__i.__h), \
411
"=r" (__xx.__i.__l) \
412
: "%1" (m0), \
413
"r" (m1)); \
414
(xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
415
} while (0)
416
#define sdiv_qrnnd(q, r, n1, n0, d) \
417
do { \
418
union {DItype __ll; \
419
struct {USItype __h, __l;} __i; \
420
} __xx; \
421
__xx.__i.__h = n1; __xx.__i.__l = n0; \
422
__asm__ ("dr %0,%2" \
423
: "=r" (__xx.__ll) \
424
: "0" (__xx.__ll), "r" (d)); \
425
(q) = __xx.__i.__l; (r) = __xx.__i.__h; \
426
} while (0)
427
#endif
428
429
430
/***************************************
431
************** I386 *****************
432
***************************************/
433
#if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
434
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
435
__asm__ ("addl %5,%1\n" \
436
"adcl %3,%0" \
437
: "=r" ((USItype)(sh)), \
438
"=&r" ((USItype)(sl)) \
439
: "%0" ((USItype)(ah)), \
440
"g" ((USItype)(bh)), \
441
"%1" ((USItype)(al)), \
442
"g" ((USItype)(bl)))
443
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
444
__asm__ ("subl %5,%1\n" \
445
"sbbl %3,%0" \
446
: "=r" ((USItype)(sh)), \
447
"=&r" ((USItype)(sl)) \
448
: "0" ((USItype)(ah)), \
449
"g" ((USItype)(bh)), \
450
"1" ((USItype)(al)), \
451
"g" ((USItype)(bl)))
452
#define umul_ppmm(w1, w0, u, v) \
453
__asm__ ("mull %3" \
454
: "=a" ((USItype)(w0)), \
455
"=d" ((USItype)(w1)) \
456
: "%0" ((USItype)(u)), \
457
"rm" ((USItype)(v)))
458
#define udiv_qrnnd(q, r, n1, n0, d) \
459
__asm__ ("divl %4" \
460
: "=a" ((USItype)(q)), \
461
"=d" ((USItype)(r)) \
462
: "0" ((USItype)(n0)), \
463
"1" ((USItype)(n1)), \
464
"rm" ((USItype)(d)))
465
#define count_leading_zeros(count, x) \
466
do { \
467
USItype __cbtmp; \
468
__asm__ ("bsrl %1,%0" \
469
: "=r" (__cbtmp) : "rm" ((USItype)(x))); \
470
(count) = __cbtmp ^ 31; \
471
} while (0)
472
#define count_trailing_zeros(count, x) \
473
__asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
474
#ifndef UMUL_TIME
475
#define UMUL_TIME 40
476
#endif
477
#ifndef UDIV_TIME
478
#define UDIV_TIME 40
479
#endif
480
#endif /* 80x86 */
481
482
483
/***************************************
484
************** I860 *****************
485
***************************************/
486
#if defined (__i860__) && W_TYPE_SIZE == 32
487
#define rshift_rhlc(r,h,l,c) \
488
__asm__ ("shr %3,r0,r0\n" \
489
"shrd %1,%2,%0" \
490
"=r" (r) : "r" (h), "r" (l), "rn" (c))
491
#endif /* i860 */
492
493
/***************************************
494
************** I960 *****************
495
***************************************/
496
#if defined (__i960__) && W_TYPE_SIZE == 32
497
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
498
__asm__ ("cmpo 1,0\n" \
499
"addc %5,%4,%1\n" \
500
"addc %3,%2,%0" \
501
: "=r" ((USItype)(sh)), \
502
"=&r" ((USItype)(sl)) \
503
: "%dI" ((USItype)(ah)), \
504
"dI" ((USItype)(bh)), \
505
"%dI" ((USItype)(al)), \
506
"dI" ((USItype)(bl)))
507
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
508
__asm__ ("cmpo 0,0\n" \
509
"subc %5,%4,%1\n" \
510
"subc %3,%2,%0" \
511
: "=r" ((USItype)(sh)), \
512
"=&r" ((USItype)(sl)) \
513
: "dI" ((USItype)(ah)), \
514
"dI" ((USItype)(bh)), \
515
"dI" ((USItype)(al)), \
516
"dI" ((USItype)(bl)))
517
#define umul_ppmm(w1, w0, u, v) \
518
({union {UDItype __ll; \
519
struct {USItype __l, __h;} __i; \
520
} __xx; \
521
__asm__ ("emul %2,%1,%0" \
522
: "=d" (__xx.__ll) \
523
: "%dI" ((USItype)(u)), \
524
"dI" ((USItype)(v))); \
525
(w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
526
#define __umulsidi3(u, v) \
527
({UDItype __w; \
528
__asm__ ("emul %2,%1,%0" \
529
: "=d" (__w) \
530
: "%dI" ((USItype)(u)), \
531
"dI" ((USItype)(v))); \
532
__w; })
533
#define udiv_qrnnd(q, r, nh, nl, d) \
534
do { \
535
union {UDItype __ll; \
536
struct {USItype __l, __h;} __i; \
537
} __nn; \
538
__nn.__i.__h = (nh); __nn.__i.__l = (nl); \
539
__asm__ ("ediv %d,%n,%0" \
540
: "=d" (__rq.__ll) \
541
: "dI" (__nn.__ll), \
542
"dI" ((USItype)(d))); \
543
(r) = __rq.__i.__l; (q) = __rq.__i.__h; \
544
} while (0)
545
#define count_leading_zeros(count, x) \
546
do { \
547
USItype __cbtmp; \
548
__asm__ ("scanbit %1,%0" \
549
: "=r" (__cbtmp) \
550
: "r" ((USItype)(x))); \
551
(count) = __cbtmp ^ 31; \
552
} while (0)
553
#define COUNT_LEADING_ZEROS_0 (-32) /* sic */
554
#if defined (__i960mx) /* what is the proper symbol to test??? */
555
#define rshift_rhlc(r,h,l,c) \
556
do { \
557
union {UDItype __ll; \
558
struct {USItype __l, __h;} __i; \
559
} __nn; \
560
__nn.__i.__h = (h); __nn.__i.__l = (l); \
561
__asm__ ("shre %2,%1,%0" \
562
: "=d" (r) : "dI" (__nn.__ll), "dI" (c)); \
563
}
564
#endif /* i960mx */
565
#endif /* i960 */
566
567
568
/***************************************
569
************** 68000 ****************
570
***************************************/
571
#if (defined (__mc68000__) || defined (__mc68020__) || defined (__NeXT__) || defined(mc68020)) && W_TYPE_SIZE == 32
572
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
573
__asm__ ("add%.l %5,%1\n" \
574
"addx%.l %3,%0" \
575
: "=d" ((USItype)(sh)), \
576
"=&d" ((USItype)(sl)) \
577
: "%0" ((USItype)(ah)), \
578
"d" ((USItype)(bh)), \
579
"%1" ((USItype)(al)), \
580
"g" ((USItype)(bl)))
581
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
582
__asm__ ("sub%.l %5,%1\n" \
583
"subx%.l %3,%0" \
584
: "=d" ((USItype)(sh)), \
585
"=&d" ((USItype)(sl)) \
586
: "0" ((USItype)(ah)), \
587
"d" ((USItype)(bh)), \
588
"1" ((USItype)(al)), \
589
"g" ((USItype)(bl)))
590
#if (defined (__mc68020__) || defined (__NeXT__) || defined(mc68020))
591
#define umul_ppmm(w1, w0, u, v) \
592
__asm__ ("mulu%.l %3,%1:%0" \
593
: "=d" ((USItype)(w0)), \
594
"=d" ((USItype)(w1)) \
595
: "%0" ((USItype)(u)), \
596
"dmi" ((USItype)(v)))
597
#define UMUL_TIME 45
598
#define udiv_qrnnd(q, r, n1, n0, d) \
599
__asm__ ("divu%.l %4,%1:%0" \
600
: "=d" ((USItype)(q)), \
601
"=d" ((USItype)(r)) \
602
: "0" ((USItype)(n0)), \
603
"1" ((USItype)(n1)), \
604
"dmi" ((USItype)(d)))
605
#define UDIV_TIME 90
606
#define sdiv_qrnnd(q, r, n1, n0, d) \
607
__asm__ ("divs%.l %4,%1:%0" \
608
: "=d" ((USItype)(q)), \
609
"=d" ((USItype)(r)) \
610
: "0" ((USItype)(n0)), \
611
"1" ((USItype)(n1)), \
612
"dmi" ((USItype)(d)))
613
#define count_leading_zeros(count, x) \
614
__asm__ ("bfffo %1{%b2:%b2},%0" \
615
: "=d" ((USItype)(count)) \
616
: "od" ((USItype)(x)), "n" (0))
617
#define COUNT_LEADING_ZEROS_0 32
618
#else /* not mc68020 */
619
#define umul_ppmm(xh, xl, a, b) \
620
do { USItype __umul_tmp1, __umul_tmp2; \
621
__asm__ ("| Inlined umul_ppmm \n" \
622
" move%.l %5,%3 \n" \
623
" move%.l %2,%0 \n" \
624
" move%.w %3,%1 \n" \
625
" swap %3 \n" \
626
" swap %0 \n" \
627
" mulu %2,%1 \n" \
628
" mulu %3,%0 \n" \
629
" mulu %2,%3 \n" \
630
" swap %2 \n" \
631
" mulu %5,%2 \n" \
632
" add%.l %3,%2 \n" \
633
" jcc 1f \n" \
634
" add%.l %#0x10000,%0 \n" \
635
"1: move%.l %2,%3 \n" \
636
" clr%.w %2 \n" \
637
" swap %2 \n" \
638
" swap %3 \n" \
639
" clr%.w %3 \n" \
640
" add%.l %3,%1 \n" \
641
" addx%.l %2,%0 \n" \
642
" | End inlined umul_ppmm" \
643
: "=&d" ((USItype)(xh)), "=&d" ((USItype)(xl)), \
644
"=d" (__umul_tmp1), "=&d" (__umul_tmp2) \
645
: "%2" ((USItype)(a)), "d" ((USItype)(b))); \
646
} while (0)
647
#define UMUL_TIME 100
648
#define UDIV_TIME 400
649
#endif /* not mc68020 */
650
#endif /* mc68000 */
651
652
653
/***************************************
654
************** 88000 ****************
655
***************************************/
656
#if defined (__m88000__) && W_TYPE_SIZE == 32
657
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
658
__asm__ ("addu.co %1,%r4,%r5\n" \
659
"addu.ci %0,%r2,%r3" \
660
: "=r" ((USItype)(sh)), \
661
"=&r" ((USItype)(sl)) \
662
: "%rJ" ((USItype)(ah)), \
663
"rJ" ((USItype)(bh)), \
664
"%rJ" ((USItype)(al)), \
665
"rJ" ((USItype)(bl)))
666
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
667
__asm__ ("subu.co %1,%r4,%r5\n" \
668
"subu.ci %0,%r2,%r3" \
669
: "=r" ((USItype)(sh)), \
670
"=&r" ((USItype)(sl)) \
671
: "rJ" ((USItype)(ah)), \
672
"rJ" ((USItype)(bh)), \
673
"rJ" ((USItype)(al)), \
674
"rJ" ((USItype)(bl)))
675
#define count_leading_zeros(count, x) \
676
do { \
677
USItype __cbtmp; \
678
__asm__ ("ff1 %0,%1" \
679
: "=r" (__cbtmp) \
680
: "r" ((USItype)(x))); \
681
(count) = __cbtmp ^ 31; \
682
} while (0)
683
#define COUNT_LEADING_ZEROS_0 63 /* sic */
684
#if defined (__m88110__)
685
#define umul_ppmm(wh, wl, u, v) \
686
do { \
687
union {UDItype __ll; \
688
struct {USItype __h, __l;} __i; \
689
} __x; \
690
__asm__ ("mulu.d %0,%1,%2" : "=r" (__x.__ll) : "r" (u), "r" (v)); \
691
(wh) = __x.__i.__h; \
692
(wl) = __x.__i.__l; \
693
} while (0)
694
#define udiv_qrnnd(q, r, n1, n0, d) \
695
({union {UDItype __ll; \
696
struct {USItype __h, __l;} __i; \
697
} __x, __q; \
698
__x.__i.__h = (n1); __x.__i.__l = (n0); \
699
__asm__ ("divu.d %0,%1,%2" \
700
: "=r" (__q.__ll) : "r" (__x.__ll), "r" (d)); \
701
(r) = (n0) - __q.__l * (d); (q) = __q.__l; })
702
#define UMUL_TIME 5
703
#define UDIV_TIME 25
704
#else
705
#define UMUL_TIME 17
706
#define UDIV_TIME 150
707
#endif /* __m88110__ */
708
#endif /* __m88000__ */
709
710
/***************************************
711
************** MIPS *****************
712
***************************************/
713
#if defined (__mips__) && W_TYPE_SIZE == 32
714
#if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
715
#define umul_ppmm(w1, w0, u, v) \
716
__asm__ ("multu %2,%3" \
717
: "=l" ((USItype)(w0)), \
718
"=h" ((USItype)(w1)) \
719
: "d" ((USItype)(u)), \
720
"d" ((USItype)(v)))
721
#else
722
#define umul_ppmm(w1, w0, u, v) \
723
__asm__ ("multu %2,%3 \n" \
724
"mflo %0 \n" \
725
"mfhi %1" \
726
: "=d" ((USItype)(w0)), \
727
"=d" ((USItype)(w1)) \
728
: "d" ((USItype)(u)), \
729
"d" ((USItype)(v)))
730
#endif
731
#define UMUL_TIME 10
732
#define UDIV_TIME 100
733
#endif /* __mips__ */
734
735
/***************************************
736
************** MIPS/64 **************
737
***************************************/
738
#if (defined (__mips) && __mips >= 3) && W_TYPE_SIZE == 64
739
#if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
740
#define umul_ppmm(w1, w0, u, v) \
741
__asm__ ("dmultu %2,%3" \
742
: "=l" ((UDItype)(w0)), \
743
"=h" ((UDItype)(w1)) \
744
: "d" ((UDItype)(u)), \
745
"d" ((UDItype)(v)))
746
#else
747
#define umul_ppmm(w1, w0, u, v) \
748
__asm__ ("dmultu %2,%3 \n" \
749
"mflo %0 \n" \
750
"mfhi %1" \
751
: "=d" ((UDItype)(w0)), \
752
"=d" ((UDItype)(w1)) \
753
: "d" ((UDItype)(u)), \
754
"d" ((UDItype)(v)))
755
#endif
756
#define UMUL_TIME 20
757
#define UDIV_TIME 140
758
#endif /* __mips__ */
759
760
761
/***************************************
762
************** 32000 ****************
763
***************************************/
764
#if defined (__ns32000__) && W_TYPE_SIZE == 32
765
#define umul_ppmm(w1, w0, u, v) \
766
({union {UDItype __ll; \
767
struct {USItype __l, __h;} __i; \
768
} __xx; \
769
__asm__ ("meid %2,%0" \
770
: "=g" (__xx.__ll) \
771
: "%0" ((USItype)(u)), \
772
"g" ((USItype)(v))); \
773
(w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
774
#define __umulsidi3(u, v) \
775
({UDItype __w; \
776
__asm__ ("meid %2,%0" \
777
: "=g" (__w) \
778
: "%0" ((USItype)(u)), \
779
"g" ((USItype)(v))); \
780
__w; })
781
#define udiv_qrnnd(q, r, n1, n0, d) \
782
({union {UDItype __ll; \
783
struct {USItype __l, __h;} __i; \
784
} __xx; \
785
__xx.__i.__h = (n1); __xx.__i.__l = (n0); \
786
__asm__ ("deid %2,%0" \
787
: "=g" (__xx.__ll) \
788
: "0" (__xx.__ll), \
789
"g" ((USItype)(d))); \
790
(r) = __xx.__i.__l; (q) = __xx.__i.__h; })
791
#define count_trailing_zeros(count,x) \
792
do {
793
__asm__ ("ffsd %2,%0" \
794
: "=r" ((USItype) (count)) \
795
: "0" ((USItype) 0), \
796
"r" ((USItype) (x))); \
797
} while (0)
798
#endif /* __ns32000__ */
799
800
801
/***************************************
802
************** PPC ******************
803
***************************************/
804
#if (defined (_ARCH_PPC) || defined (_IBMR2)) && W_TYPE_SIZE == 32
805
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
806
do { \
807
if (__builtin_constant_p (bh) && (bh) == 0) \
808
__asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \
809
: "=r" ((USItype)(sh)), \
810
"=&r" ((USItype)(sl)) \
811
: "%r" ((USItype)(ah)), \
812
"%r" ((USItype)(al)), \
813
"rI" ((USItype)(bl))); \
814
else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0) \
815
__asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \
816
: "=r" ((USItype)(sh)), \
817
"=&r" ((USItype)(sl)) \
818
: "%r" ((USItype)(ah)), \
819
"%r" ((USItype)(al)), \
820
"rI" ((USItype)(bl))); \
821
else \
822
__asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \
823
: "=r" ((USItype)(sh)), \
824
"=&r" ((USItype)(sl)) \
825
: "%r" ((USItype)(ah)), \
826
"r" ((USItype)(bh)), \
827
"%r" ((USItype)(al)), \
828
"rI" ((USItype)(bl))); \
829
} while (0)
830
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
831
do { \
832
if (__builtin_constant_p (ah) && (ah) == 0) \
833
__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \
834
: "=r" ((USItype)(sh)), \
835
"=&r" ((USItype)(sl)) \
836
: "r" ((USItype)(bh)), \
837
"rI" ((USItype)(al)), \
838
"r" ((USItype)(bl))); \
839
else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0) \
840
__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \
841
: "=r" ((USItype)(sh)), \
842
"=&r" ((USItype)(sl)) \
843
: "r" ((USItype)(bh)), \
844
"rI" ((USItype)(al)), \
845
"r" ((USItype)(bl))); \
846
else if (__builtin_constant_p (bh) && (bh) == 0) \
847
__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \
848
: "=r" ((USItype)(sh)), \
849
"=&r" ((USItype)(sl)) \
850
: "r" ((USItype)(ah)), \
851
"rI" ((USItype)(al)), \
852
"r" ((USItype)(bl))); \
853
else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0) \
854
__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \
855
: "=r" ((USItype)(sh)), \
856
"=&r" ((USItype)(sl)) \
857
: "r" ((USItype)(ah)), \
858
"rI" ((USItype)(al)), \
859
"r" ((USItype)(bl))); \
860
else \
861
__asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \
862
: "=r" ((USItype)(sh)), \
863
"=&r" ((USItype)(sl)) \
864
: "r" ((USItype)(ah)), \
865
"r" ((USItype)(bh)), \
866
"rI" ((USItype)(al)), \
867
"r" ((USItype)(bl))); \
868
} while (0)
869
#define count_leading_zeros(count, x) \
870
__asm__ ("{cntlz|cntlzw} %0,%1" \
871
: "=r" ((USItype)(count)) \
872
: "r" ((USItype)(x)))
873
#define COUNT_LEADING_ZEROS_0 32
874
#if defined (_ARCH_PPC)
875
#define umul_ppmm(ph, pl, m0, m1) \
876
do { \
877
USItype __m0 = (m0), __m1 = (m1); \
878
__asm__ ("mulhwu %0,%1,%2" \
879
: "=r" ((USItype) ph) \
880
: "%r" (__m0), \
881
"r" (__m1)); \
882
(pl) = __m0 * __m1; \
883
} while (0)
884
#define UMUL_TIME 15
885
#define smul_ppmm(ph, pl, m0, m1) \
886
do { \
887
SItype __m0 = (m0), __m1 = (m1); \
888
__asm__ ("mulhw %0,%1,%2" \
889
: "=r" ((SItype) ph) \
890
: "%r" (__m0), \
891
"r" (__m1)); \
892
(pl) = __m0 * __m1; \
893
} while (0)
894
#define SMUL_TIME 14
895
#define UDIV_TIME 120
896
#else
897
#define umul_ppmm(xh, xl, m0, m1) \
898
do { \
899
USItype __m0 = (m0), __m1 = (m1); \
900
__asm__ ("mul %0,%2,%3" \
901
: "=r" ((USItype)(xh)), \
902
"=q" ((USItype)(xl)) \
903
: "r" (__m0), \
904
"r" (__m1)); \
905
(xh) += ((((SItype) __m0 >> 31) & __m1) \
906
+ (((SItype) __m1 >> 31) & __m0)); \
907
} while (0)
908
#define UMUL_TIME 8
909
#define smul_ppmm(xh, xl, m0, m1) \
910
__asm__ ("mul %0,%2,%3" \
911
: "=r" ((SItype)(xh)), \
912
"=q" ((SItype)(xl)) \
913
: "r" (m0), \
914
"r" (m1))
915
#define SMUL_TIME 4
916
#define sdiv_qrnnd(q, r, nh, nl, d) \
917
__asm__ ("div %0,%2,%4" \
918
: "=r" ((SItype)(q)), "=q" ((SItype)(r)) \
919
: "r" ((SItype)(nh)), "1" ((SItype)(nl)), "r" ((SItype)(d)))
920
#define UDIV_TIME 100
921
#endif
922
#endif /* Power architecture variants. */
923
924
925
/***************************************
926
************** PYR ******************
927
***************************************/
928
#if defined (__pyr__) && W_TYPE_SIZE == 32
929
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
930
__asm__ ("addw %5,%1 \n" \
931
"addwc %3,%0" \
932
: "=r" ((USItype)(sh)), \
933
"=&r" ((USItype)(sl)) \
934
: "%0" ((USItype)(ah)), \
935
"g" ((USItype)(bh)), \
936
"%1" ((USItype)(al)), \
937
"g" ((USItype)(bl)))
938
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
939
__asm__ ("subw %5,%1 \n" \
940
"subwb %3,%0" \
941
: "=r" ((USItype)(sh)), \
942
"=&r" ((USItype)(sl)) \
943
: "0" ((USItype)(ah)), \
944
"g" ((USItype)(bh)), \
945
"1" ((USItype)(al)), \
946
"g" ((USItype)(bl)))
947
/* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP. */
948
#define umul_ppmm(w1, w0, u, v) \
949
({union {UDItype __ll; \
950
struct {USItype __h, __l;} __i; \
951
} __xx; \
952
__asm__ ("movw %1,%R0 \n" \
953
"uemul %2,%0" \
954
: "=&r" (__xx.__ll) \
955
: "g" ((USItype) (u)), \
956
"g" ((USItype)(v))); \
957
(w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
958
#endif /* __pyr__ */
959
960
961
/***************************************
962
************** RT/ROMP **************
963
***************************************/
964
#if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
965
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
966
__asm__ ("a %1,%5 \n" \
967
"ae %0,%3" \
968
: "=r" ((USItype)(sh)), \
969
"=&r" ((USItype)(sl)) \
970
: "%0" ((USItype)(ah)), \
971
"r" ((USItype)(bh)), \
972
"%1" ((USItype)(al)), \
973
"r" ((USItype)(bl)))
974
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
975
__asm__ ("s %1,%5\n" \
976
"se %0,%3" \
977
: "=r" ((USItype)(sh)), \
978
"=&r" ((USItype)(sl)) \
979
: "0" ((USItype)(ah)), \
980
"r" ((USItype)(bh)), \
981
"1" ((USItype)(al)), \
982
"r" ((USItype)(bl)))
983
#define umul_ppmm(ph, pl, m0, m1) \
984
do { \
985
USItype __m0 = (m0), __m1 = (m1); \
986
__asm__ ( \
987
"s r2,r2 \n" \
988
"mts r10,%2 \n" \
989
"m r2,%3 \n" \
990
"m r2,%3 \n" \
991
"m r2,%3 \n" \
992
"m r2,%3 \n" \
993
"m r2,%3 \n" \
994
"m r2,%3 \n" \
995
"m r2,%3 \n" \
996
"m r2,%3 \n" \
997
"m r2,%3 \n" \
998
"m r2,%3 \n" \
999
"m r2,%3 \n" \
1000
"m r2,%3 \n" \
1001
"m r2,%3 \n" \
1002
"m r2,%3 \n" \
1003
"m r2,%3 \n" \
1004
"m r2,%3 \n" \
1005
"cas %0,r2,r0 \n" \
1006
"mfs r10,%1" \
1007
: "=r" ((USItype)(ph)), \
1008
"=r" ((USItype)(pl)) \
1009
: "%r" (__m0), \
1010
"r" (__m1) \
1011
: "r2"); \
1012
(ph) += ((((SItype) __m0 >> 31) & __m1) \
1013
+ (((SItype) __m1 >> 31) & __m0)); \
1014
} while (0)
1015
#define UMUL_TIME 20
1016
#define UDIV_TIME 200
1017
#define count_leading_zeros(count, x) \
1018
do { \
1019
if ((x) >= 0x10000) \
1020
__asm__ ("clz %0,%1" \
1021
: "=r" ((USItype)(count)) \
1022
: "r" ((USItype)(x) >> 16)); \
1023
else \
1024
{ \
1025
__asm__ ("clz %0,%1" \
1026
: "=r" ((USItype)(count)) \
1027
: "r" ((USItype)(x))); \
1028
(count) += 16; \
1029
} \
1030
} while (0)
1031
#endif /* RT/ROMP */
1032
1033
1034
/***************************************
1035
************** SH2 ******************
1036
***************************************/
1037
#if defined (__sh2__) && W_TYPE_SIZE == 32
1038
#define umul_ppmm(w1, w0, u, v) \
1039
__asm__ ( \
1040
"dmulu.l %2,%3\n" \
1041
"sts macl,%1\n" \
1042
"sts mach,%0" \
1043
: "=r" ((USItype)(w1)), \
1044
"=r" ((USItype)(w0)) \
1045
: "r" ((USItype)(u)), \
1046
"r" ((USItype)(v)) \
1047
: "macl", "mach")
1048
#define UMUL_TIME 5
1049
#endif
1050
1051
/***************************************
1052
************** SPARC ****************
1053
***************************************/
1054
#if defined (__sparc__) && W_TYPE_SIZE == 32
1055
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1056
__asm__ ("addcc %r4,%5,%1\n" \
1057
"addx %r2,%3,%0" \
1058
: "=r" ((USItype)(sh)), \
1059
"=&r" ((USItype)(sl)) \
1060
: "%rJ" ((USItype)(ah)), \
1061
"rI" ((USItype)(bh)), \
1062
"%rJ" ((USItype)(al)), \
1063
"rI" ((USItype)(bl)) \
1064
__CLOBBER_CC)
1065
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1066
__asm__ ("subcc %r4,%5,%1\n" \
1067
"subx %r2,%3,%0" \
1068
: "=r" ((USItype)(sh)), \
1069
"=&r" ((USItype)(sl)) \
1070
: "rJ" ((USItype)(ah)), \
1071
"rI" ((USItype)(bh)), \
1072
"rJ" ((USItype)(al)), \
1073
"rI" ((USItype)(bl)) \
1074
__CLOBBER_CC)
1075
#if defined (__sparc_v8__)
1076
/* Don't match immediate range because, 1) it is not often useful,
1077
2) the 'I' flag thinks of the range as a 13 bit signed interval,
1078
while we want to match a 13 bit interval, sign extended to 32 bits,
1079
but INTERPRETED AS UNSIGNED. */
1080
#define umul_ppmm(w1, w0, u, v) \
1081
__asm__ ("umul %2,%3,%1;rd %%y,%0" \
1082
: "=r" ((USItype)(w1)), \
1083
"=r" ((USItype)(w0)) \
1084
: "r" ((USItype)(u)), \
1085
"r" ((USItype)(v)))
1086
#define UMUL_TIME 5
1087
#ifndef SUPERSPARC /* SuperSPARC's udiv only handles 53 bit dividends */
1088
#define udiv_qrnnd(q, r, n1, n0, d) \
1089
do { \
1090
USItype __q; \
1091
__asm__ ("mov %1,%%y;nop;nop;nop;udiv %2,%3,%0" \
1092
: "=r" ((USItype)(__q)) \
1093
: "r" ((USItype)(n1)), \
1094
"r" ((USItype)(n0)), \
1095
"r" ((USItype)(d))); \
1096
(r) = (n0) - __q * (d); \
1097
(q) = __q; \
1098
} while (0)
1099
#define UDIV_TIME 25
1100
#endif /* SUPERSPARC */
1101
#else /* ! __sparc_v8__ */
1102
#if defined (__sparclite__)
1103
/* This has hardware multiply but not divide. It also has two additional
1104
instructions scan (ffs from high bit) and divscc. */
1105
#define umul_ppmm(w1, w0, u, v) \
1106
__asm__ ("umul %2,%3,%1;rd %%y,%0" \
1107
: "=r" ((USItype)(w1)), \
1108
"=r" ((USItype)(w0)) \
1109
: "r" ((USItype)(u)), \
1110
"r" ((USItype)(v)))
1111
#define UMUL_TIME 5
1112
#define udiv_qrnnd(q, r, n1, n0, d) \
1113
__asm__ ("! Inlined udiv_qrnnd \n" \
1114
" wr %%g0,%2,%%y ! Not a delayed write for sparclite \n" \
1115
" tst %%g0 \n" \
1116
" divscc %3,%4,%%g1 \n" \
1117
" divscc %%g1,%4,%%g1 \n" \
1118
" divscc %%g1,%4,%%g1 \n" \
1119
" divscc %%g1,%4,%%g1 \n" \
1120
" divscc %%g1,%4,%%g1 \n" \
1121
" divscc %%g1,%4,%%g1 \n" \
1122
" divscc %%g1,%4,%%g1 \n" \
1123
" divscc %%g1,%4,%%g1 \n" \
1124
" divscc %%g1,%4,%%g1 \n" \
1125
" divscc %%g1,%4,%%g1 \n" \
1126
" divscc %%g1,%4,%%g1 \n" \
1127
" divscc %%g1,%4,%%g1 \n" \
1128
" divscc %%g1,%4,%%g1 \n" \
1129
" divscc %%g1,%4,%%g1 \n" \
1130
" divscc %%g1,%4,%%g1 \n" \
1131
" divscc %%g1,%4,%%g1 \n" \
1132
" divscc %%g1,%4,%%g1 \n" \
1133
" divscc %%g1,%4,%%g1 \n" \
1134
" divscc %%g1,%4,%%g1 \n" \
1135
" divscc %%g1,%4,%%g1 \n" \
1136
" divscc %%g1,%4,%%g1 \n" \
1137
" divscc %%g1,%4,%%g1 \n" \
1138
" divscc %%g1,%4,%%g1 \n" \
1139
" divscc %%g1,%4,%%g1 \n" \
1140
" divscc %%g1,%4,%%g1 \n" \
1141
" divscc %%g1,%4,%%g1 \n" \
1142
" divscc %%g1,%4,%%g1 \n" \
1143
" divscc %%g1,%4,%%g1 \n" \
1144
" divscc %%g1,%4,%%g1 \n" \
1145
" divscc %%g1,%4,%%g1 \n" \
1146
" divscc %%g1,%4,%%g1 \n" \
1147
" divscc %%g1,%4,%0 \n" \
1148
" rd %%y,%1 \n" \
1149
" bl,a 1f \n" \
1150
" add %1,%4,%1 \n" \
1151
"1: ! End of inline udiv_qrnnd" \
1152
: "=r" ((USItype)(q)), \
1153
"=r" ((USItype)(r)) \
1154
: "r" ((USItype)(n1)), \
1155
"r" ((USItype)(n0)), \
1156
"rI" ((USItype)(d)) \
1157
: "%g1" __AND_CLOBBER_CC)
1158
#define UDIV_TIME 37
1159
#define count_leading_zeros(count, x) \
1160
__asm__ ("scan %1,0,%0" \
1161
: "=r" ((USItype)(x)) \
1162
: "r" ((USItype)(count)))
1163
/* Early sparclites return 63 for an argument of 0, but they warn that future
1164
implementations might change this. Therefore, leave COUNT_LEADING_ZEROS_0
1165
undefined. */
1166
#endif /* __sparclite__ */
1167
#endif /* __sparc_v8__ */
1168
/* Default to sparc v7 versions of umul_ppmm and udiv_qrnnd. */
1169
#ifndef umul_ppmm
1170
#define umul_ppmm(w1, w0, u, v) \
1171
__asm__ ("! Inlined umul_ppmm \n" \
1172
" wr %%g0,%2,%%y ! SPARC has 0-3 delay insn after a wr \n" \
1173
" sra %3,31,%%g2 ! Don't move this insn \n" \
1174
" and %2,%%g2,%%g2 ! Don't move this insn \n" \
1175
" andcc %%g0,0,%%g1 ! Don't move this insn \n" \
1176
" mulscc %%g1,%3,%%g1 \n" \
1177
" mulscc %%g1,%3,%%g1 \n" \
1178
" mulscc %%g1,%3,%%g1 \n" \
1179
" mulscc %%g1,%3,%%g1 \n" \
1180
" mulscc %%g1,%3,%%g1 \n" \
1181
" mulscc %%g1,%3,%%g1 \n" \
1182
" mulscc %%g1,%3,%%g1 \n" \
1183
" mulscc %%g1,%3,%%g1 \n" \
1184
" mulscc %%g1,%3,%%g1 \n" \
1185
" mulscc %%g1,%3,%%g1 \n" \
1186
" mulscc %%g1,%3,%%g1 \n" \
1187
" mulscc %%g1,%3,%%g1 \n" \
1188
" mulscc %%g1,%3,%%g1 \n" \
1189
" mulscc %%g1,%3,%%g1 \n" \
1190
" mulscc %%g1,%3,%%g1 \n" \
1191
" mulscc %%g1,%3,%%g1 \n" \
1192
" mulscc %%g1,%3,%%g1 \n" \
1193
" mulscc %%g1,%3,%%g1 \n" \
1194
" mulscc %%g1,%3,%%g1 \n" \
1195
" mulscc %%g1,%3,%%g1 \n" \
1196
" mulscc %%g1,%3,%%g1 \n" \
1197
" mulscc %%g1,%3,%%g1 \n" \
1198
" mulscc %%g1,%3,%%g1 \n" \
1199
" mulscc %%g1,%3,%%g1 \n" \
1200
" mulscc %%g1,%3,%%g1 \n" \
1201
" mulscc %%g1,%3,%%g1 \n" \
1202
" mulscc %%g1,%3,%%g1 \n" \
1203
" mulscc %%g1,%3,%%g1 \n" \
1204
" mulscc %%g1,%3,%%g1 \n" \
1205
" mulscc %%g1,%3,%%g1 \n" \
1206
" mulscc %%g1,%3,%%g1 \n" \
1207
" mulscc %%g1,%3,%%g1 \n" \
1208
" mulscc %%g1,0,%%g1 \n" \
1209
" add %%g1,%%g2,%0 \n" \
1210
" rd %%y,%1" \
1211
: "=r" ((USItype)(w1)), \
1212
"=r" ((USItype)(w0)) \
1213
: "%rI" ((USItype)(u)), \
1214
"r" ((USItype)(v)) \
1215
: "%g1", "%g2" __AND_CLOBBER_CC)
1216
#define UMUL_TIME 39 /* 39 instructions */
1217
#endif
1218
#ifndef udiv_qrnnd
1219
#ifndef LONGLONG_STANDALONE
1220
#define udiv_qrnnd(q, r, n1, n0, d) \
1221
do { USItype __r; \
1222
(q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \
1223
(r) = __r; \
1224
} while (0)
1225
extern USItype __udiv_qrnnd ();
1226
#define UDIV_TIME 140
1227
#endif /* LONGLONG_STANDALONE */
1228
#endif /* udiv_qrnnd */
1229
#endif /* __sparc__ */
1230
1231
1232
/***************************************
1233
************** VAX ******************
1234
***************************************/
1235
#if defined (__vax__) && W_TYPE_SIZE == 32
1236
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1237
__asm__ ("addl2 %5,%1\n" \
1238
"adwc %3,%0" \
1239
: "=g" ((USItype)(sh)), \
1240
"=&g" ((USItype)(sl)) \
1241
: "%0" ((USItype)(ah)), \
1242
"g" ((USItype)(bh)), \
1243
"%1" ((USItype)(al)), \
1244
"g" ((USItype)(bl)))
1245
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1246
__asm__ ("subl2 %5,%1\n" \
1247
"sbwc %3,%0" \
1248
: "=g" ((USItype)(sh)), \
1249
"=&g" ((USItype)(sl)) \
1250
: "0" ((USItype)(ah)), \
1251
"g" ((USItype)(bh)), \
1252
"1" ((USItype)(al)), \
1253
"g" ((USItype)(bl)))
1254
#define umul_ppmm(xh, xl, m0, m1) \
1255
do { \
1256
union {UDItype __ll; \
1257
struct {USItype __l, __h;} __i; \
1258
} __xx; \
1259
USItype __m0 = (m0), __m1 = (m1); \
1260
__asm__ ("emul %1,%2,$0,%0" \
1261
: "=g" (__xx.__ll) \
1262
: "g" (__m0), \
1263
"g" (__m1)); \
1264
(xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
1265
(xh) += ((((SItype) __m0 >> 31) & __m1) \
1266
+ (((SItype) __m1 >> 31) & __m0)); \
1267
} while (0)
1268
#define sdiv_qrnnd(q, r, n1, n0, d) \
1269
do { \
1270
union {DItype __ll; \
1271
struct {SItype __l, __h;} __i; \
1272
} __xx; \
1273
__xx.__i.__h = n1; __xx.__i.__l = n0; \
1274
__asm__ ("ediv %3,%2,%0,%1" \
1275
: "=g" (q), "=g" (r) \
1276
: "g" (__xx.__ll), "g" (d)); \
1277
} while (0)
1278
#endif /* __vax__ */
1279
1280
1281
/***************************************
1282
************** Z8000 ****************
1283
***************************************/
1284
#if defined (__z8000__) && W_TYPE_SIZE == 16
1285
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1286
__asm__ ("add %H1,%H5\n\tadc %H0,%H3" \
1287
: "=r" ((unsigned int)(sh)), \
1288
"=&r" ((unsigned int)(sl)) \
1289
: "%0" ((unsigned int)(ah)), \
1290
"r" ((unsigned int)(bh)), \
1291
"%1" ((unsigned int)(al)), \
1292
"rQR" ((unsigned int)(bl)))
1293
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1294
__asm__ ("sub %H1,%H5\n\tsbc %H0,%H3" \
1295
: "=r" ((unsigned int)(sh)), \
1296
"=&r" ((unsigned int)(sl)) \
1297
: "0" ((unsigned int)(ah)), \
1298
"r" ((unsigned int)(bh)), \
1299
"1" ((unsigned int)(al)), \
1300
"rQR" ((unsigned int)(bl)))
1301
#define umul_ppmm(xh, xl, m0, m1) \
1302
do { \
1303
union {long int __ll; \
1304
struct {unsigned int __h, __l;} __i; \
1305
} __xx; \
1306
unsigned int __m0 = (m0), __m1 = (m1); \
1307
__asm__ ("mult %S0,%H3" \
1308
: "=r" (__xx.__i.__h), \
1309
"=r" (__xx.__i.__l) \
1310
: "%1" (__m0), \
1311
"rQR" (__m1)); \
1312
(xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
1313
(xh) += ((((signed int) __m0 >> 15) & __m1) \
1314
+ (((signed int) __m1 >> 15) & __m0)); \
1315
} while (0)
1316
#endif /* __z8000__ */
1317
1318
#endif /* __GNUC__ */
1319
1320
1321
/***************************************
1322
*********** Generic Versions ********
1323
***************************************/
1324
#if !defined (umul_ppmm) && defined (__umulsidi3)
1325
#define umul_ppmm(ph, pl, m0, m1) \
1326
{ \
1327
UDWtype __ll = __umulsidi3 (m0, m1); \
1328
ph = (UWtype) (__ll >> W_TYPE_SIZE); \
1329
pl = (UWtype) __ll; \
1330
}
1331
#endif
1332
1333
#if !defined (__umulsidi3)
1334
#define __umulsidi3(u, v) \
1335
({UWtype __hi, __lo; \
1336
umul_ppmm (__hi, __lo, u, v); \
1337
((UDWtype) __hi << W_TYPE_SIZE) | __lo; })
1338
#endif
1339
1340
/* If this machine has no inline assembler, use C macros. */
1341
1342
#if !defined (add_ssaaaa)
1343
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1344
do { \
1345
UWtype __x; \
1346
__x = (al) + (bl); \
1347
(sh) = (ah) + (bh) + (__x < (al)); \
1348
(sl) = __x; \
1349
} while (0)
1350
#endif
1351
1352
#if !defined (sub_ddmmss)
1353
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1354
do { \
1355
UWtype __x; \
1356
__x = (al) - (bl); \
1357
(sh) = (ah) - (bh) - (__x > (al)); \
1358
(sl) = __x; \
1359
} while (0)
1360
#endif
1361
1362
#if !defined (umul_ppmm)
1363
#define umul_ppmm(w1, w0, u, v) \
1364
do { \
1365
UWtype __x0, __x1, __x2, __x3; \
1366
UHWtype __ul, __vl, __uh, __vh; \
1367
UWtype __u = (u), __v = (v); \
1368
\
1369
__ul = __ll_lowpart (__u); \
1370
__uh = __ll_highpart (__u); \
1371
__vl = __ll_lowpart (__v); \
1372
__vh = __ll_highpart (__v); \
1373
\
1374
__x0 = (UWtype) __ul * __vl; \
1375
__x1 = (UWtype) __ul * __vh; \
1376
__x2 = (UWtype) __uh * __vl; \
1377
__x3 = (UWtype) __uh * __vh; \
1378
\
1379
__x1 += __ll_highpart (__x0);/* this can't give carry */ \
1380
__x1 += __x2; /* but this indeed can */ \
1381
if (__x1 < __x2) /* did we get it? */ \
1382
__x3 += __ll_B; /* yes, add it in the proper pos. */ \
1383
\
1384
(w1) = __x3 + __ll_highpart (__x1); \
1385
(w0) = (__ll_lowpart (__x1) << W_TYPE_SIZE/2) + __ll_lowpart (__x0);\
1386
} while (0)
1387
#endif
1388
1389
#if !defined (umul_ppmm)
1390
#define smul_ppmm(w1, w0, u, v) \
1391
do { \
1392
UWtype __w1; \
1393
UWtype __m0 = (u), __m1 = (v); \
1394
umul_ppmm (__w1, w0, __m0, __m1); \
1395
(w1) = __w1 - (-(__m0 >> (W_TYPE_SIZE - 1)) & __m1) \
1396
- (-(__m1 >> (W_TYPE_SIZE - 1)) & __m0); \
1397
} while (0)
1398
#endif
1399
1400
/* Define this unconditionally, so it can be used for debugging. */
1401
#define __udiv_qrnnd_c(q, r, n1, n0, d) \
1402
do { \
1403
UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m; \
1404
__d1 = __ll_highpart (d); \
1405
__d0 = __ll_lowpart (d); \
1406
\
1407
__r1 = (n1) % __d1; \
1408
__q1 = (n1) / __d1; \
1409
__m = (UWtype) __q1 * __d0; \
1410
__r1 = __r1 * __ll_B | __ll_highpart (n0); \
1411
if (__r1 < __m) \
1412
{ \
1413
__q1--, __r1 += (d); \
1414
if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1415
if (__r1 < __m) \
1416
__q1--, __r1 += (d); \
1417
} \
1418
__r1 -= __m; \
1419
\
1420
__r0 = __r1 % __d1; \
1421
__q0 = __r1 / __d1; \
1422
__m = (UWtype) __q0 * __d0; \
1423
__r0 = __r0 * __ll_B | __ll_lowpart (n0); \
1424
if (__r0 < __m) \
1425
{ \
1426
__q0--, __r0 += (d); \
1427
if (__r0 >= (d)) \
1428
if (__r0 < __m) \
1429
__q0--, __r0 += (d); \
1430
} \
1431
__r0 -= __m; \
1432
\
1433
(q) = (UWtype) __q1 * __ll_B | __q0; \
1434
(r) = __r0; \
1435
} while (0)
1436
1437
/* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1438
__udiv_w_sdiv (defined in libgcc or elsewhere). */
1439
#if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1440
#define udiv_qrnnd(q, r, nh, nl, d) \
1441
do { \
1442
UWtype __r; \
1443
(q) = __MPN(udiv_w_sdiv) (&__r, nh, nl, d); \
1444
(r) = __r; \
1445
} while (0)
1446
#endif
1447
1448
/* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c. */
1449
#if !defined (udiv_qrnnd)
1450
#define UDIV_NEEDS_NORMALIZATION 1
1451
#define udiv_qrnnd __udiv_qrnnd_c
1452
#endif
1453
1454
#if !defined (count_leading_zeros)
1455
extern
1456
#ifdef __STDC__
1457
const
1458
#endif
1459
unsigned char __clz_tab[];
1460
#define MPI_INTERNAL_NEED_CLZ_TAB 1
1461
#define count_leading_zeros(count, x) \
1462
do { \
1463
UWtype __xr = (x); \
1464
UWtype __a; \
1465
\
1466
if (W_TYPE_SIZE <= 32) \
1467
{ \
1468
__a = __xr < ((UWtype) 1 << 2*__BITS4) \
1469
? (__xr < ((UWtype) 1 << __BITS4) ? 0 : __BITS4) \
1470
: (__xr < ((UWtype) 1 << 3*__BITS4) ? 2*__BITS4 : 3*__BITS4);\
1471
} \
1472
else \
1473
{ \
1474
for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8) \
1475
if (((__xr >> __a) & 0xff) != 0) \
1476
break; \
1477
} \
1478
\
1479
(count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a); \
1480
} while (0)
1481
/* This version gives a well-defined value for zero. */
1482
#define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1483
#endif
1484
1485
#if !defined (count_trailing_zeros)
1486
/* Define count_trailing_zeros using count_leading_zeros. The latter might be
1487
defined in asm, but if it is not, the C version above is good enough. */
1488
#define count_trailing_zeros(count, x) \
1489
do { \
1490
UWtype __ctz_x = (x); \
1491
UWtype __ctz_c; \
1492
count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x); \
1493
(count) = W_TYPE_SIZE - 1 - __ctz_c; \
1494
} while (0)
1495
#endif
1496
1497
#ifndef UDIV_NEEDS_NORMALIZATION
1498
#define UDIV_NEEDS_NORMALIZATION 0
1499
#endif
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