1
/* This file is generated by the genmloop script. DO NOT EDIT! */
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/* Enable switch() support in cgen headers. */
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#include "sim-assert.h"
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/* Fill in the administrative ARGBUF fields required by all insns,
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sh64_compact_fill_argbuf (const SIM_CPU *cpu, ARGBUF *abuf, const IDESC *idesc,
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PCADDR pc, int fast_p)
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SEM_SET_CODE (abuf, idesc, fast_p);
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ARGBUF_ADDR (abuf) = pc;
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ARGBUF_IDESC (abuf) = idesc;
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/* Fill in tracing/profiling fields of an ARGBUF. */
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sh64_compact_fill_argbuf_tp (const SIM_CPU *cpu, ARGBUF *abuf,
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int trace_p, int profile_p)
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ARGBUF_TRACE_P (abuf) = trace_p;
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ARGBUF_PROFILE_P (abuf) = profile_p;
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/* Emit the "x-before" handler.
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x-before is emitted before each insn (serial or parallel).
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This is as opposed to x-after which is only emitted at the end of a group
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sh64_compact_emit_before (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc, int first_p)
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ARGBUF *abuf = &sc[0].argbuf;
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const IDESC *id = & CPU_IDESC (current_cpu) [SH64_COMPACT_INSN_X_BEFORE];
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abuf->fields.before.first_p = first_p;
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sh64_compact_fill_argbuf (current_cpu, abuf, id, pc, 0);
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/* no need to set trace_p,profile_p */
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/* Emit the "x-after" handler.
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x-after is emitted after a serial insn or at the end of a group of
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sh64_compact_emit_after (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc)
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ARGBUF *abuf = &sc[0].argbuf;
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const IDESC *id = & CPU_IDESC (current_cpu) [SH64_COMPACT_INSN_X_AFTER];
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sh64_compact_fill_argbuf (current_cpu, abuf, id, pc, 0);
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/* no need to set trace_p,profile_p */
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#endif /* WITH_SCACHE_PBB */
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static INLINE const IDESC *
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extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, ARGBUF *abuf,
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const IDESC *id = sh64_compact_decode (current_cpu, pc, insn, insn, abuf);
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sh64_compact_fill_argbuf (current_cpu, abuf, id, pc, fast_p);
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int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
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int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
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sh64_compact_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p);
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execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p)
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#if ! WITH_SEM_SWITCH_FAST
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vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc);
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vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf);
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#endif /* WITH_SEM_SWITCH_FAST */
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#if ! WITH_SEM_SWITCH_FULL
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ARGBUF *abuf = &sc->argbuf;
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const IDESC *idesc = abuf->idesc;
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int virtual_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_VIRTUAL);
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/* FIXME: call x-before */
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if (ARGBUF_PROFILE_P (abuf))
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PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num);
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/* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */
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if (PROFILE_MODEL_P (current_cpu)
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&& ARGBUF_PROFILE_P (abuf))
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sh64_compact_model_insn_before (current_cpu, 1 /*first_p*/);
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TRACE_INSN_INIT (current_cpu, abuf, 1);
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TRACE_INSN (current_cpu, idesc->idata,
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(const struct argbuf *) abuf, abuf->addr);
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vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc);
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vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf);
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/* FIXME: call x-after */
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if (PROFILE_MODEL_P (current_cpu)
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&& ARGBUF_PROFILE_P (abuf))
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cycles = (*idesc->timing->model_fn) (current_cpu, sc);
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sh64_compact_model_insn_after (current_cpu, 1 /*last_p*/, cycles);
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TRACE_INSN_FINI (current_cpu, abuf, 1);
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#endif /* WITH_SEM_SWITCH_FULL */
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/* Record address of cti terminating a pbb. */
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#define SET_CTI_VPC(sc) do { _cti_sc = (sc); } while (0)
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/* Record number of [real] insns in pbb. */
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#define SET_INSN_COUNT(n) do { _insn_count = (n); } while (0)
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/* Fetch and extract a pseudo-basic-block.
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FAST_P is non-zero if no tracing/profiling/etc. is wanted. */
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sh64_compact_pbb_begin (SIM_CPU *current_cpu, int FAST_P)
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int max_insns = CPU_SCACHE_MAX_CHAIN_LENGTH (current_cpu);
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new_vpc = scache_lookup_or_alloc (current_cpu, pc, max_insns, &sc);
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/* Leading '_' to avoid collision with mainloop.in. */
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SCACHE *orig_sc = sc;
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SCACHE *_cti_sc = NULL;
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int slice_insns = CPU_MAX_SLICE_INSNS (current_cpu);
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/* First figure out how many instructions to compile.
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MAX_INSNS is the size of the allocated buffer, which includes space
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for before/after handlers if they're being used.
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SLICE_INSNS is the maxinum number of real insns that can be
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executed. Zero means "as many as we want". */
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/* ??? max_insns is serving two incompatible roles.
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1) Number of slots available in scache buffer.
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2) Number of real insns to execute.
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They're incompatible because there are virtual insns emitted too
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(chain,cti-chain,before,after handlers). */
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if (slice_insns == 1)
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/* No need to worry about extra slots required for virtual insns
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and parallel exec support because MAX_CHAIN_LENGTH is
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guaranteed to be big enough to execute at least 1 insn! */
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/* Allow enough slop so that while compiling insns, if max_insns > 0
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then there's guaranteed to be enough space to emit one real insn.
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MAX_CHAIN_LENGTH is typically much longer than
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the normal number of insns between cti's anyway. */
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max_insns -= (1 /* one for the trailing chain insn */
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: (1 + MAX_PARALLEL_INSNS) /* before+after */)
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+ (MAX_PARALLEL_INSNS > 1
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? (MAX_PARALLEL_INSNS * 2)
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/* Account for before/after handlers. */
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&& slice_insns < max_insns)
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max_insns = slice_insns;
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/* SC,PC must be updated to point passed the last entry used.
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SET_CTI_VPC must be called if pbb is terminated by a cti.
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SET_INSN_COUNT must be called to record number of real insns in
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pbb [could be computed by us of course, extra cpu but perhaps
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negligible enough]. */
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/* begin extract-pbb */
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while (max_insns > 0)
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UHI insn = GETIMEMUHI (current_cpu, pc);
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idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
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SEM_SKIP_COMPILE (current_cpu, sc, 1);
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if (IDESC_CTI_P (idesc))
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SET_CTI_VPC (sc - 1);
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if (CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT))
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USI insn = GETIMEMUHI (current_cpu, pc);
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idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
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if (IDESC_CTI_P (idesc) ||
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CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_ILLSLOT))
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SIM_DESC sd = CPU_STATE (current_cpu);
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sim_io_eprintf (CPU_STATE (current_cpu),
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"malformed program, `%s' insn in delay slot\n",
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CGEN_INSN_NAME (idesc->idata));
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sim_engine_halt (sd, current_cpu, NULL, pc,
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sim_stopped, SIM_SIGILL);
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SET_INSN_COUNT (icount);
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/* end extract-pbb */
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/* The last one is a pseudo-insn to link to the next chain.
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It is also used to record the insn count for this chain. */
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/* Was pbb terminated by a cti? */
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id = & CPU_IDESC (current_cpu) [SH64_COMPACT_INSN_X_CTI_CHAIN];
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id = & CPU_IDESC (current_cpu) [SH64_COMPACT_INSN_X_CHAIN];
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SEM_SET_CODE (&sc->argbuf, id, FAST_P);
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sc->argbuf.idesc = id;
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sc->argbuf.addr = pc;
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sc->argbuf.fields.chain.insn_count = _insn_count;
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sc->argbuf.fields.chain.next = 0;
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sc->argbuf.fields.chain.branch_target = 0;
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/* Update the pointer to the next free entry, may not have used as
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many entries as was asked for. */
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CPU_SCACHE_NEXT_FREE (current_cpu) = sc;
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/* Record length of chain if profiling.
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This includes virtual insns since they count against
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PROFILE_COUNT_SCACHE_CHAIN_LENGTH (current_cpu, sc - orig_sc);
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/* Chain to the next block from a non-cti terminated previous block. */
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sh64_compact_pbb_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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PBB_UPDATE_INSN_COUNT (current_cpu, sem_arg);
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SET_H_PC (abuf->addr);
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/* If not running forever, exit back to main loop. */
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if (CPU_MAX_SLICE_INSNS (current_cpu) != 0
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/* Also exit back to main loop if there's an event.
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Note that if CPU_MAX_SLICE_INSNS != 1, events won't get processed
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at the "right" time, but then that was what was asked for.
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There is no silver bullet for simulator engines.
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??? Clearly this needs a cleaner interface.
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At present it's just so Ctrl-C works. */
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|| STATE_EVENTS (CPU_STATE (current_cpu))->work_pending)
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CPU_RUNNING_P (current_cpu) = 0;
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/* If chained to next block, go straight to it. */
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if (abuf->fields.chain.next)
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return abuf->fields.chain.next;
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/* See if next block has already been compiled. */
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abuf->fields.chain.next = scache_lookup (current_cpu, abuf->addr);
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if (abuf->fields.chain.next)
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return abuf->fields.chain.next;
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/* Nope, so next insn is a virtual insn to invoke the compiler
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return CPU_SCACHE_PBB_BEGIN (current_cpu);
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/* Chain to the next block from a cti terminated previous block.
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BR_TYPE indicates whether the branch was taken and whether we can cache
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the vpc of the branch target.
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NEW_PC is the target's branch address, and is only valid if
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BR_TYPE != SEM_BRANCH_UNTAKEN. */
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sh64_compact_pbb_cti_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg,
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SEM_BRANCH_TYPE br_type, PCADDR new_pc)
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PBB_UPDATE_INSN_COUNT (current_cpu, sem_arg);
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/* If we have switched ISAs, exit back to main loop.
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Set idesc to 0 to cause the engine to point to the right insn table. */
375
/* Switch to SHmedia. */
376
CPU_IDESC_SEM_INIT_P (current_cpu) = 0;
377
CPU_RUNNING_P (current_cpu) = 0;
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/* If not running forever, exit back to main loop. */
381
if (CPU_MAX_SLICE_INSNS (current_cpu) != 0
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/* Also exit back to main loop if there's an event.
383
Note that if CPU_MAX_SLICE_INSNS != 1, events won't get processed
384
at the "right" time, but then that was what was asked for.
385
There is no silver bullet for simulator engines.
386
??? Clearly this needs a cleaner interface.
387
At present it's just so Ctrl-C works. */
388
|| STATE_EVENTS (CPU_STATE (current_cpu))->work_pending)
389
CPU_RUNNING_P (current_cpu) = 0;
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/* Restart compiler if we branched to an uncacheable address
393
if (br_type == SEM_BRANCH_UNCACHEABLE)
396
return CPU_SCACHE_PBB_BEGIN (current_cpu);
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/* If branch wasn't taken, update the pc and set BR_ADDR_PTR to our
401
if (br_type == SEM_BRANCH_UNTAKEN)
403
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
406
new_vpc_ptr = &abuf->fields.chain.next;
410
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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new_vpc_ptr = &abuf->fields.chain.branch_target;
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/* If chained to next block, go straight to it. */
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/* See if next block has already been compiled. */
419
*new_vpc_ptr = scache_lookup (current_cpu, new_pc);
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/* Nope, so next insn is a virtual insn to invoke the compiler
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return CPU_SCACHE_PBB_BEGIN (current_cpu);
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This is called before each insn. */
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sh64_compact_pbb_before (SIM_CPU *current_cpu, SCACHE *sc)
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SEM_ARG sem_arg = sc;
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const ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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int first_p = abuf->fields.before.first_p;
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const ARGBUF *cur_abuf = SEM_ARGBUF (sc + 1);
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const IDESC *cur_idesc = cur_abuf->idesc;
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PCADDR pc = cur_abuf->addr;
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if (ARGBUF_PROFILE_P (cur_abuf))
441
PROFILE_COUNT_INSN (current_cpu, pc, cur_idesc->num);
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/* If this isn't the first insn, finish up the previous one. */
447
if (PROFILE_MODEL_P (current_cpu))
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const SEM_ARG prev_sem_arg = sc - 1;
450
const ARGBUF *prev_abuf = SEM_ARGBUF (prev_sem_arg);
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const IDESC *prev_idesc = prev_abuf->idesc;
454
/* ??? May want to measure all insns if doing insn tracing. */
455
if (ARGBUF_PROFILE_P (prev_abuf))
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cycles = (*prev_idesc->timing->model_fn) (current_cpu, prev_sem_arg);
458
sh64_compact_model_insn_after (current_cpu, 0 /*last_p*/, cycles);
462
TRACE_INSN_FINI (current_cpu, cur_abuf, 0 /*last_p*/);
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/* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */
466
if (PROFILE_MODEL_P (current_cpu)
467
&& ARGBUF_PROFILE_P (cur_abuf))
468
sh64_compact_model_insn_before (current_cpu, first_p);
470
TRACE_INSN_INIT (current_cpu, cur_abuf, first_p);
471
TRACE_INSN (current_cpu, cur_idesc->idata, cur_abuf, pc);
475
This is called after a serial insn or at the end of a group of parallel
479
sh64_compact_pbb_after (SIM_CPU *current_cpu, SCACHE *sc)
481
SEM_ARG sem_arg = sc;
482
const ARGBUF *abuf = SEM_ARGBUF (sem_arg);
483
const SEM_ARG prev_sem_arg = sc - 1;
484
const ARGBUF *prev_abuf = SEM_ARGBUF (prev_sem_arg);
486
/* ??? May want to measure all insns if doing insn tracing. */
487
if (PROFILE_MODEL_P (current_cpu)
488
&& ARGBUF_PROFILE_P (prev_abuf))
490
const IDESC *prev_idesc = prev_abuf->idesc;
493
cycles = (*prev_idesc->timing->model_fn) (current_cpu, prev_sem_arg);
494
sh64_compact_model_insn_after (current_cpu, 1 /*last_p*/, cycles);
496
TRACE_INSN_FINI (current_cpu, prev_abuf, 1 /*last_p*/);
502
sh64_compact_engine_run_full (SIM_CPU *current_cpu)
504
SIM_DESC current_state = CPU_STATE (current_cpu);
505
SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
506
/* virtual program counter */
508
#if WITH_SEM_SWITCH_FULL
509
/* For communication between cti's and cti-chain. */
510
SEM_BRANCH_TYPE pbb_br_type;
515
if (! CPU_IDESC_SEM_INIT_P (current_cpu))
517
/* ??? 'twould be nice to move this up a level and only call it once.
518
On the other hand, in the "let's go fast" case the test is only done
519
once per pbb (since we only return to the main loop at the end of
520
a pbb). And in the "let's run until we're done" case we don't return
521
until the program exits. */
523
#if WITH_SEM_SWITCH_FULL
524
#if defined (__GNUC__)
525
/* ??? Later maybe paste sem-switch.c in when building mainloop.c. */
526
#define DEFINE_LABELS
527
#include "sem-compact-switch.c"
530
sh64_compact_sem_init_idesc_table (current_cpu);
533
/* Initialize the "begin (compile) a pbb" virtual insn. */
534
vpc = CPU_SCACHE_PBB_BEGIN (current_cpu);
535
SEM_SET_FULL_CODE (SEM_ARGBUF (vpc),
536
& CPU_IDESC (current_cpu) [SH64_COMPACT_INSN_X_BEGIN]);
537
vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [SH64_COMPACT_INSN_X_BEGIN];
539
CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
542
CPU_RUNNING_P (current_cpu) = 1;
543
/* ??? In the case where we're returning to the main loop after every
544
pbb we don't want to call pbb_begin each time (which hashes on the pc
545
and does a table lookup). A way to speed this up is to save vpc
547
vpc = sh64_compact_pbb_begin (current_cpu, FAST_P);
551
/* begin full-exec-pbb */
553
#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST)
554
#define DEFINE_SWITCH
555
#include "sem-compact-switch.c"
557
vpc = execute (current_cpu, vpc, FAST_P);
560
/* end full-exec-pbb */
562
while (CPU_RUNNING_P (current_cpu));
571
sh64_compact_engine_run_fast (SIM_CPU *current_cpu)
573
SIM_DESC current_state = CPU_STATE (current_cpu);
574
SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
575
/* virtual program counter */
577
#if WITH_SEM_SWITCH_FAST
578
/* For communication between cti's and cti-chain. */
579
SEM_BRANCH_TYPE pbb_br_type;
584
if (! CPU_IDESC_SEM_INIT_P (current_cpu))
586
/* ??? 'twould be nice to move this up a level and only call it once.
587
On the other hand, in the "let's go fast" case the test is only done
588
once per pbb (since we only return to the main loop at the end of
589
a pbb). And in the "let's run until we're done" case we don't return
590
until the program exits. */
592
#if WITH_SEM_SWITCH_FAST
593
#if defined (__GNUC__)
594
/* ??? Later maybe paste sem-switch.c in when building mainloop.c. */
595
#define DEFINE_LABELS
596
#include "sem-compact-switch.c"
599
sh64_compact_semf_init_idesc_table (current_cpu);
602
/* Initialize the "begin (compile) a pbb" virtual insn. */
603
vpc = CPU_SCACHE_PBB_BEGIN (current_cpu);
604
SEM_SET_FAST_CODE (SEM_ARGBUF (vpc),
605
& CPU_IDESC (current_cpu) [SH64_COMPACT_INSN_X_BEGIN]);
606
vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [SH64_COMPACT_INSN_X_BEGIN];
608
CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
611
CPU_RUNNING_P (current_cpu) = 1;
612
/* ??? In the case where we're returning to the main loop after every
613
pbb we don't want to call pbb_begin each time (which hashes on the pc
614
and does a table lookup). A way to speed this up is to save vpc
616
vpc = sh64_compact_pbb_begin (current_cpu, FAST_P);
620
/* begin fast-exec-pbb */
622
#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST)
623
#define DEFINE_SWITCH
624
#include "sem-compact-switch.c"
626
vpc = execute (current_cpu, vpc, FAST_P);
629
/* end fast-exec-pbb */
631
while (CPU_RUNNING_P (current_cpu));
added
removed
sim/sh64/mloop-compact.c
