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Viewing changes to src/drivers/champbwl.c

  • Committer: Bazaar Package Importer
  • Author(s): Bruno Barrera C.
  • Date: 2007-02-16 10:06:54 UTC
  • mfrom: (2.1.5 edgy)
  • Revision ID: james.westby@ubuntu.com-20070216100654-iztas2cl47k5j039
Tags: 0.106-2
http://bugs.debian.org/382672
http://bugs.debian.org/396610
http://bugs.debian.org/400011
http://bugs.debian.org/409960
* Added Italian debconf templates translation. (closes: #382672)
* Added German debconf templates translation. (closes: #396610)
* Added Japanese debconf templates translation. (closes: #400011)
* Added Portuguese debconf templates translation. (closes: #409960)

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src/drivers/champbwl.c
 
1
/*
 
2
 
 
3
Championship Bowling
 
4
Romstar Inc., 1989
 
5
 
 
6
This game runs on Seta Hardware.
 
7
 
 
8
PCB Layout
 
9
----------
 
10
 
 
11
PO-052A
 
12
|---------------------------------------------------------|
 
13
| MB3712     SW1        AB001009  AB001007  AB001005      |
 
14
|                 X1-007                                  |
 
15
|        VOL                          AB001006  AB001004  |
 
16
|                                                         |
 
17
|                       AB001008                          |
 
18
|                                                         |
 
19
|        4050                                             |
 
20
|                                                         |
 
21
|      CN1                             X1-002A            |
 
22
|                                                         |
 
23
|J                                                3V_BATT |
 
24
|A                        2063         X1-001A            |
 
25
|M                                                        |
 
26
|M                                                  SW2   |
 
27
|A         16MHz                                          |
 
28
|                            4520                         |
 
29
|                                                         |
 
30
|                                                  6116   |
 
31
|       X1-010                                            |
 
32
|                                                         |
 
33
|      |---------------ROM-Sub-Board----------------|     |
 
34
|  3404|                                            |     |
 
35
|      |    DIP32                                   |     |
 
36
|      |                                          AB001001|
 
37
|      |          6116                       Z80    |     |
 
38
|      |                                            |     |
 
39
|      |                                            |     |
 
40
|------|--------------------------------------------|-----|
 
41
 
 
42
 
 
43
ROM Sub Board (plugs into DIP32 socket on main board)
 
44
-------------
 
45
 
 
46
PO-047A
 
47
|--------------------------------------------|
 
48
|                                            |
 
49
|     AB003003           AB002003            |
 
50
|                                            |
 
51
|              AB003002            AB002002  |
 
52
|                                            |
 
53
| 74HC139                                    |
 
54
|--------------------------------------------|
 
55
 
 
56
Notes:
 
57
      Z80 clock     - 4.000MHz [16/4]
 
58
      X1-010 clocks - pin1 16.000MHz, pin2 8.000MHz, pin79 4.000MHz, pin80 2.000MHz
 
59
      VSync         - 57.5Hz
 
60
      2063          - Toshiba TMM2063AP-10 8K x8 SRAM (DIP28)
 
61
      6116          - Hitachi 6116LP-2 2K x8 SRAM (DIP24)
 
62
      MB3712        - Fujitsu MB3712 5.7 Watt Power AMP (SIP8)
 
63
      4050          - Toshiba TC4050BP Non-Inverting Hex Buffer / Converter (DIP16)
 
64
      4520          - Hitachi HD14520 Dual Up Counter (DIP16)
 
65
      3404          - Japan Radio Co. JRC3404 Low Power Quad Op AMP (DIP8)
 
66
      SW1           - Reset Switch
 
67
      SW2           - 2-Position Switch (when ON, powers 6116 RAM near it)
 
68
      3V_BATT       - Sony CR2032 3V Lithium Coin Battery
 
69
      DIP32         - Empty DIP32 socket for connection of ROM Sub Board
 
70
      CN1           - 4-pin Connector
 
71
 
 
72
      Custom IC's -
 
73
                    X1-001A (SDIP64) \ Sprite Generators
 
74
                    X1-002A (SDIP64) /
 
75
                    X1-007  (SDIP42)   Video DAC? (connected to RGB output)
 
76
                    X1-010  (QFP80)    Sound Chip, 16Bit PCM
 
77
 
 
78
      ROMs -
 
79
            Filename        Type                Use
 
80
            -----------------------------------------------
 
81
            AB001001.U1    27C1000 (DIP32)      Z80 Program
 
82
 
 
83
            AB001004.U7    512K MaskROM (DIP28) \
 
84
            AB001005.U9    512K MaskROM (DIP28) | GFX
 
85
            AB001006.U15   512K MaskROM (DIP28) |
 
86
            AB001007.U22   512K MaskROM (DIP28) /
 
87
 
 
88
            AB001008.U26   82S147 PROM (DIP20)
 
89
            AB001009.U27   82S147 PROM (DIP20)
 
90
 
 
91
            AB002002.2-2   2M MaskROM (DIP32)   \
 
92
            AB002003.2-3   2M MaskROM (DIP32)   | PCM Samples (Connected to X1-010 via a sub-board)
 
93
            AB003002.3-2   2M MaskROM (DIP32)   |
 
94
            AB003003.3-3   2M MaskROM (DIP32)   /
 
95
 
 
96
  Driver by Pierpaolo Prazzoli
 
97
 
 
98
*/
 
99
 
 
100
#include "driver.h"
 
101
#include "sound/x1_010.h"
 
102
 
 
103
extern unsigned char *tnzs_objram, *tnzs_sharedram;
 
104
extern unsigned char *tnzs_vdcram, *tnzs_scrollram, *tnzs_objctrl;
 
105
 
 
106
PALETTE_INIT( arknoid2 );
 
107
VIDEO_UPDATE( tnzs );
 
108
VIDEO_EOF( tnzs );
 
109
 
 
110
static UINT8 last_trackball_val[2] = {0,0};
 
111
 
 
112
static READ8_HANDLER( trackball_r )
 
113
{
 
114
        UINT8 ret;
 
115
        UINT8 port4 = readinputport(4);
 
116
        UINT8 port5 = readinputport(5);
 
117
 
 
118
        ret = (((port4 - last_trackball_val[0]) & 0x0f)<<4) | ((port5 - last_trackball_val[1]) & 0x0f);
 
119
 
 
120
        last_trackball_val[0] = port4;
 
121
        last_trackball_val[1] = port5;
 
122
 
 
123
        return ret;
 
124
}
 
125
 
 
126
static WRITE8_HANDLER( champbwl_misc_w )
 
127
{
 
128
        coin_counter_w(0, data & 1);
 
129
        coin_counter_w(1, data & 2);
 
130
 
 
131
        coin_lockout_w(0, ~data & 8);
 
132
        coin_lockout_w(1, ~data & 4);
 
133
 
 
134
        memory_set_bankptr(1, memory_region(REGION_CPU1) + 0x10000 + 0x4000 * ((data & 0x30)>>4));
 
135
}
 
136
 
 
137
static WRITE8_HANDLER( champbwl_objctrl_w )
 
138
{
 
139
        if(offset != 0)
 
140
                data ^= 0xff;
 
141
 
 
142
        tnzs_objctrl[offset] = data;
 
143
}
 
144
 
 
145
static ADDRESS_MAP_START( champbwl_map, ADDRESS_SPACE_PROGRAM, 8 )
 
146
        AM_RANGE(0x0000, 0x3fff) AM_ROM AM_REGION(REGION_CPU1, 0x10000)
 
147
        AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
 
148
        AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
 
149
        AM_RANGE(0xa000, 0xbfff) AM_RAM AM_BASE(&tnzs_objram)
 
150
        AM_RANGE(0xc000, 0xdfff) AM_READWRITE(seta_sound_r, seta_sound_w)
 
151
        AM_RANGE(0xe000, 0xe1ff) AM_RAM AM_BASE(&tnzs_vdcram)
 
152
        AM_RANGE(0xe200, 0xe2ff) AM_RAM AM_BASE(&tnzs_scrollram) /* scrolling info */
 
153
        AM_RANGE(0xe300, 0xe303) AM_MIRROR(0xfc) AM_WRITE(champbwl_objctrl_w) AM_BASE(&tnzs_objctrl) /* control registers (0x80 mirror used by Arkanoid 2) */
 
154
 
 
155
        AM_RANGE(0xe800, 0xe800) AM_WRITENOP
 
156
 
 
157
        AM_RANGE(0xf000, 0xf000) AM_READ(trackball_r)
 
158
        AM_RANGE(0xf002, 0xf002) AM_READ(input_port_0_r)
 
159
        AM_RANGE(0xf004, 0xf004) AM_READ(input_port_1_r)
 
160
        AM_RANGE(0xf006, 0xf006) AM_READ(input_port_2_r)
 
161
        AM_RANGE(0xf007, 0xf007) AM_READ(input_port_3_r)
 
162
 
 
163
        AM_RANGE(0xf000, 0xf000) AM_WRITE(champbwl_misc_w)
 
164
        AM_RANGE(0xf002, 0xf002) AM_WRITENOP /*buttons light? */
 
165
        AM_RANGE(0xf004, 0xf004) AM_WRITENOP /*buttons light? */
 
166
        AM_RANGE(0xf006, 0xf006) AM_WRITENOP /*buttons light? */
 
167
        AM_RANGE(0xf800, 0xf800) AM_WRITENOP
 
168
ADDRESS_MAP_END
 
169
 
 
170
INPUT_PORTS_START( champbwl )
 
171
        PORT_START
 
172
        PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
 
173
        PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )
 
174
        PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
 
175
        PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Player Change")
 
176
        PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
 
177
        PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
 
178
        PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* INT( 4M) */
 
179
        PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* INT(16M) */
 
180
 
 
181
        PORT_START
 
182
        PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
 
183
        PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
 
184
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
185
        PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
 
186
        PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
 
187
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
188
        PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
 
189
        PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
 
190
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
191
        PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
 
192
        PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
 
193
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
194
        PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
 
195
        PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
 
196
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
197
        PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
 
198
        PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
 
199
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
200
        PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
 
201
        PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
 
202
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
203
        PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
 
204
        PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
 
205
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
206
 
 
207
        PORT_START
 
208
        PORT_SERVICE( 0x01, IP_ACTIVE_LOW )
 
209
        PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
 
210
        PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
 
211
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
212
        PORT_DIPNAME( 0x04, 0x04, DEF_STR( Free_Play ) )
 
213
        PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
 
214
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
215
        PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) )
 
216
        PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
 
217
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
218
        PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unused ) )
 
219
        PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
 
220
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
221
        PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused ) )
 
222
        PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
 
223
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
224
        PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) )
 
225
        PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
 
226
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
227
        PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )
 
228
        PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
 
229
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
230
 
 
231
        PORT_START
 
232
        PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) )
 
233
        PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
 
234
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
235
        PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
 
236
        PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
 
237
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
238
        PORT_DIPNAME( 0x0c, 0x0c, "License" )
 
239
        PORT_DIPSETTING(    0x00, "Romstar (1)")
 
240
        PORT_DIPSETTING(    0x04, "Romstar (2)")
 
241
        PORT_DIPSETTING(    0x08, "Seta U.S.A, Romstar License" )
 
242
        PORT_DIPSETTING(    0x0c, "Seta" )
 
243
        PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unused ) )
 
244
        PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
 
245
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
246
        PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused ) )
 
247
        PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
 
248
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
249
        PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) )
 
250
        PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
 
251
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
252
        PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )
 
253
        PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
 
254
        PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
255
 
 
256
        PORT_START      /* FAKE */
 
257
        PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X )PORT_SENSITIVITY(50) PORT_KEYDELTA(50) PORT_CENTERDELTA(0)
 
258
 
 
259
        PORT_START      /* FAKE */
 
260
        PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(45) PORT_CENTERDELTA(0) PORT_REVERSE
 
261
INPUT_PORTS_END
 
262
 
 
263
static const gfx_layout charlayout =
 
264
{
 
265
        16,16,
 
266
        RGN_FRAC(1,4),
 
267
        4,
 
268
        { RGN_FRAC(3,4), RGN_FRAC(2,4), RGN_FRAC(1,4), RGN_FRAC(0,4) },
 
269
        { 0, 1, 2, 3, 4, 5, 6, 7,
 
270
                        8*8+0, 8*8+1, 8*8+2, 8*8+3, 8*8+4, 8*8+5, 8*8+6, 8*8+7 },
 
271
        { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
 
272
                        16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8 },
 
273
        32*8
 
274
};
 
275
 
 
276
static const gfx_decode gfxdecodeinfo[] =
 
277
{
 
278
        { REGION_GFX1, 0, &charlayout, 0, 32 },
 
279
        { -1 }  /* end of array */
 
280
};
 
281
 
 
282
static struct x1_010_interface champbwl_sound_intf =
 
283
{
 
284
        0x0000          /* address */
 
285
};
 
286
 
 
287
static MACHINE_DRIVER_START( champbwl )
 
288
 
 
289
        /* basic machine hardware */
 
290
        MDRV_CPU_ADD(Z80, 16000000/4) /* 4MHz */
 
291
        MDRV_CPU_PROGRAM_MAP(champbwl_map,0)
 
292
        MDRV_CPU_VBLANK_INT(irq0_line_pulse,1)
 
293
 
 
294
        MDRV_FRAMES_PER_SECOND(57.5)
 
295
        MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
 
296
 
 
297
        MDRV_NVRAM_HANDLER(generic_0fill)
 
298
 
 
299
        /* video hardware */
 
300
        MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
 
301
        MDRV_SCREEN_SIZE(64*8, 32*8)
 
302
        MDRV_VISIBLE_AREA(0*8, 48*8-1, 1*8, 31*8-1)
 
303
        MDRV_GFXDECODE(gfxdecodeinfo)
 
304
        MDRV_PALETTE_LENGTH(512)
 
305
 
 
306
        MDRV_PALETTE_INIT(arknoid2)
 
307
        MDRV_VIDEO_UPDATE(tnzs)
 
308
        MDRV_VIDEO_EOF(tnzs)
 
309
 
 
310
        /* sound hardware */
 
311
        MDRV_SPEAKER_STANDARD_STEREO("left", "right")
 
312
 
 
313
        MDRV_SOUND_ADD(X1_010, 16000000)
 
314
        MDRV_SOUND_CONFIG(champbwl_sound_intf)
 
315
        MDRV_SOUND_ROUTE(0, "left", 1.0)
 
316
        MDRV_SOUND_ROUTE(1, "right", 1.0)
 
317
MACHINE_DRIVER_END
 
318
 
 
319
ROM_START( champbwl )
 
320
        ROM_REGION( 0x20000, REGION_CPU1, 0 )           /* Z80 Code */
 
321
        ROM_LOAD( "ab001001.u1",  0x10000, 0x10000, CRC(6c6f7675) SHA1(19834f25f2644ae5d156c1e1bbb3fc50cae10fd2) )
 
322
 
 
323
        ROM_REGION( 0x80000, REGION_GFX1, ROMREGION_DISPOSE )
 
324
        ROM_LOAD( "ab001007.u22", 0x00000, 0x20000, CRC(1ee9f6b1) SHA1(1a67e969b1f471ec7ada294b89185c15cde8c1ab) )
 
325
        ROM_LOAD( "ab001006.u15", 0x20000, 0x20000, CRC(37baf753) SHA1(efa57d915a9e14393b62b161e1ac807b8fcb8501) )
 
326
        ROM_LOAD( "ab001005.u9",  0x40000, 0x20000, CRC(b80a9ed6) SHA1(ac7a31ad82a60c4d2034770c59cf383b8a036e6a) )
 
327
        ROM_LOAD( "ab001004.u7",  0x60000, 0x20000, CRC(584477b1) SHA1(296f96526044e9bd13673e5d817260e3f98f696c) )
 
328
 
 
329
        ROM_REGION( 0x0400, REGION_PROMS, 0 )
 
330
        ROM_LOAD( "ab001008.u26", 0x0000, 0x0200, CRC(30ac8d48) SHA1(af034de3f3b8548534effdf4e3717fe3838b7754) )
 
331
        ROM_LOAD( "ab001009.u27", 0x0200, 0x0200, CRC(3bbd4bcd) SHA1(8c87ccc42ece2432b8ad25f8679cdf886e12a43c) )
 
332
 
 
333
        ROM_REGION( 0x100000, REGION_SOUND1, 0 )        /* Samples */
 
334
        ROM_LOAD( "ab003003.3-3", 0x00000, 0x40000, CRC(ad40ad10) SHA1(db0e5744ea3fcda87345b545031f82fcb3fec175) )
 
335
        ROM_LOAD( "ab003002.3-2", 0x40000, 0x40000, CRC(7ede8f28) SHA1(b5519c09b4f0019dc76cadca725da1d581912540) )
 
336
        ROM_LOAD( "ab002003.2-3", 0x80000, 0x40000, CRC(3051b8c3) SHA1(5f53596d7af1c79db1dde4bdca3878e07c67b5d1) )
 
337
        ROM_LOAD( "ab002002.2-2", 0xc0000, 0x40000, CRC(42ebe997) SHA1(1808b9e5e996a395c1d48ac001067f736f96feec) )
 
338
ROM_END
 
339
 
 
340
GAME( 1989, champbwl, 0, champbwl, champbwl, 0, ROT270, "Seta / Romstar Inc.", "Championship Bowling", 0 )