11
#define UNUSEDARG __attribute__((__unused__))
19
/* obsolete, to be removed */
20
#define READ_WORD(a) (*(UINT16 *)(a))
21
#define WRITE_WORD(a,d) (*(UINT16 *)(a) = (d))
22
#define COMBINE_WORD(w,d) (((w) & ((d) >> 16)) | ((d) & 0xffff))
23
#define COMBINE_WORD_MEM(a,d) (WRITE_WORD((a), (READ_WORD(a) & ((d) >> 16)) | (d)))
25
#define ASSERT_LINE (1)
26
#define CLEAR_LINE (0)
27
#define TIME_NEVER (0)
29
#define TIME_IN_HZ(hz) (1.0 / (double)(hz))
30
#define TIME_IN_MSEC(ms) ((double)(ms) * (1.0 / 1000.0))
31
#define TIME_IN_USEC(us) ((double)(us) * (1.0 / 1000000.0))
33
/***************************************************************************
35
Note that the memory hooks are not passed the actual memory address where
36
the operation takes place, but the offset from the beginning of the block
37
they are assigned to. This makes handling of mirror addresses easier, and
38
makes the handlers a bit more "object oriented". If you handler needs to
39
read/write the main memory area, provide a "base" pointer: it will be
40
initialized by the main engine to point to the beginning of the memory block
41
assigned to the handler. You may also provided a pointer to "size": it
42
will be set to the length of the memory area processed by the handler.
44
***************************************************************************/
46
#define MEMORY_WIDTH_MASK 0x00000003
47
#define MEMORY_WIDTH_8 0x00000001
48
#define MEMORY_WIDTH_16 0x00000002
49
#define MEMORY_WIDTH_32 0x00000003
51
#define MEMORY_TYPE_MASK 0x30000000
52
#define MEMORY_TYPE_MEM 0x10000000
53
#define MEMORY_TYPE_IO 0x20000000
55
#define MEMORY_DIRECTION_MASK 0xc0000000
56
#define MEMORY_DIRECTION_READ 0x40000000
57
#define MEMORY_DIRECTION_WRITE 0x80000000
59
typedef unsigned int offs_t;
60
typedef offs_t (*opbase_handler)(UNUSEDARG offs_t address);
62
/***************************************************************************
63
8-BIT Core memory read/write/opbase handler types
64
***************************************************************************/
66
typedef unsigned char data8_t;
67
typedef unsigned short data16_t;
69
typedef data8_t (*mem_read_handler)(UNUSEDARG offs_t offset);
70
typedef void (*mem_write_handler)(UNUSEDARG offs_t offset, UNUSEDARG data8_t data);
72
#define READ_HANDLER(name) data8_t name(UNUSEDARG offs_t offset)
73
#define WRITE_HANDLER(name) void name(UNUSEDARG offs_t offset, UNUSEDARG data8_t data)
74
#define OPBASE_HANDLER(name) offs_t name(UNUSEDARG offs_t address)
76
#define READ16_HANDLER(name) data16_t name(UNUSEDARG offs_t offset, UNUSEDARG UINT32 mem_mask)
77
#define WRITE16_HANDLER(name) void name(UNUSEDARG offs_t offset, UNUSEDARG data16_t data, UNUSEDARG UINT32 mem_mask)
78
#define OPBASE16_HANDLER(name) offs_t name(UNUSEDARG offs_t address)
80
#define MRA_NOP 0 /* don't care, return 0 */
81
#define MWA_NOP 0 /* do nothing */
82
#define MRA_RAM ((mem_read_handler)-1) /* plain RAM location (return its contents) */
83
#define MWA_RAM ((mem_write_handler)-1) /* plain RAM location (store the value) */
84
#define MRA_ROM ((mem_read_handler)-2) /* plain ROM location (return its contents) */
85
#define MWA_ROM ((mem_write_handler)-2) /* plain ROM location (do nothing) */
86
/**************************************************************************
87
* If the CPU opcodes are encrypted, they are fetched from a different
88
* memory space. In such a case, if the program dynamically creates code
89
* in RAM and executes it, it won't work unless you use MWA_RAMROM
90
* to affect both memory spaces.
91
**************************************************************************/
92
#define MWA_RAMROM ((mem_write_handler)-3)
95
#define MRA_BANK1 ((mem_read_handler)-10)
96
#define MWA_BANK1 ((mem_write_handler)-10)
97
#define MRA_BANK2 ((mem_read_handler)-11)
98
#define MWA_BANK2 ((mem_write_handler)-11)
99
#define MRA_BANK3 ((mem_read_handler)-12)
100
#define MWA_BANK3 ((mem_write_handler)-12)
101
#define MRA_BANK4 ((mem_read_handler)-13)
102
#define MWA_BANK4 ((mem_write_handler)-13)
103
#define MRA_BANK5 ((mem_read_handler)-14)
104
#define MWA_BANK5 ((mem_write_handler)-14)
105
#define MRA_BANK6 ((mem_read_handler)-15)
106
#define MWA_BANK6 ((mem_write_handler)-15)
107
#define MRA_BANK7 ((mem_read_handler)-16)
108
#define MWA_BANK7 ((mem_write_handler)-16)
109
#define MRA_BANK8 ((mem_read_handler)-17)
110
#define MWA_BANK8 ((mem_write_handler)-17)
111
#define MRA_BANK9 ((mem_read_handler)-18)
112
#define MWA_BANK9 ((mem_write_handler)-18)
113
#define MRA_BANK10 ((mem_read_handler)-19)
114
#define MWA_BANK10 ((mem_write_handler)-19)
115
#define MRA_BANK11 ((mem_read_handler)-20)
116
#define MWA_BANK11 ((mem_write_handler)-20)
117
#define MRA_BANK12 ((mem_read_handler)-21)
118
#define MWA_BANK12 ((mem_write_handler)-21)
119
#define MRA_BANK13 ((mem_read_handler)-22)
120
#define MWA_BANK13 ((mem_write_handler)-22)
121
#define MRA_BANK14 ((mem_read_handler)-23)
122
#define MWA_BANK14 ((mem_write_handler)-23)
123
#define MRA_BANK15 ((mem_read_handler)-24)
124
#define MWA_BANK15 ((mem_write_handler)-24)
125
#define MRA_BANK16 ((mem_read_handler)-25)
126
#define MWA_BANK16 ((mem_write_handler)-25)
127
#define MRA_BANK17 ((mem_read_handler)-26)
128
#define MWA_BANK17 ((mem_write_handler)-26)
129
#define MRA_BANK18 ((mem_read_handler)-27)
130
#define MWA_BANK18 ((mem_write_handler)-27)
131
#define MRA_BANK19 ((mem_read_handler)-28)
132
#define MWA_BANK19 ((mem_write_handler)-28)
133
#define MRA_BANK20 ((mem_read_handler)-29)
134
#define MWA_BANK20 ((mem_write_handler)-29)
136
struct Memory_ReadAddress
139
mem_read_handler handler; /* see special values above */
142
struct Memory_WriteAddress
145
mem_write_handler handler; /* see special values above */
146
data8_t **base; /* optional (see explanation above) */
147
size_t *size; /* optional (see explanation above) */
150
#define MEMORY_MARKER ((offs_t)~0)
152
#define MEMORY_END { MEMORY_MARKER, 0 } };
154
#define IS_MEMORY_MARKER( ma ) ((ma)->start == MEMORY_MARKER && (ma)->end < MEMORY_MARKER)
155
#define IS_MEMORY_END( ma ) ((ma)->start == MEMORY_MARKER && (ma)->end == 0)
157
#define MEMORY_READ_START(name) const struct Memory_ReadAddress name[] = { \
158
{ MEMORY_MARKER, MEMORY_DIRECTION_READ | MEMORY_TYPE_MEM | MEMORY_WIDTH_8 },
159
#define MEMORY_WRITE_START(name) const struct Memory_WriteAddress name[] = { \
160
{ MEMORY_MARKER, MEMORY_DIRECTION_WRITE | MEMORY_TYPE_MEM | MEMORY_WIDTH_8 },
162
/***************************************************************************
163
16-BIT Core memory read/write/opbase handler types
164
***************************************************************************/
166
typedef data16_t (*mem_read16_handler)(UNUSEDARG offs_t offset);
167
typedef void (*mem_write16_handler)(UNUSEDARG offs_t offset, UNUSEDARG data16_t data, UNUSEDARG UINT32 mem_mask);
169
#define READ16_HANDLER(name) data16_t name(UNUSEDARG offs_t offset, UNUSEDARG UINT32 mem_mask)
170
#define WRITE16_HANDLER(name) void name(UNUSEDARG offs_t offset, UNUSEDARG data16_t data, UNUSEDARG UINT32 mem_mask)
171
#define OPBASE16_HANDLER(name) offs_t name(UNUSEDARG offs_t address)
173
#define MRA16_NOP 0 /* don't care, return 0 */
174
#define MWA16_NOP 0 /* do nothing */
175
#define MRA16_RAM ((mem_read16_handler)-1) /* plain RAM location (return its contents) */
176
#define MWA16_RAM ((mem_write16_handler)-1) /* plqain RAM location (store the value) */
177
#define MRA16_ROM ((mem_read16_handler)-2) /* plain ROM location (return its contents) */
178
#define MWA16_ROM ((mem_write16_handler)-2) /* plain ROM location (do nothing) */
179
/**************************************************************************
180
* If the CPU opcodes are encrypted, they are fetched from a different
181
* memory space. In such a case, if the program dynamically creates code
182
* in RAM and executes it, it won't work unless you use MWA_RAMROM
183
* to affect both memory spaces.
184
**************************************************************************/
185
#define MWA16_RAMROM ((mem_write16_handler)-3)
188
#define MRA16_BANK1 ((mem_read16_handler)-10)
189
#define MWA16_BANK1 ((mem_write16_handler)-10)
190
#define MRA16_BANK2 ((mem_read16_handler)-11)
191
#define MWA16_BANK2 ((mem_write16_handler)-11)
192
#define MRA16_BANK3 ((mem_read16_handler)-12)
193
#define MWA16_BANK3 ((mem_write16_handler)-12)
194
#define MRA16_BANK4 ((mem_read16_handler)-13)
195
#define MWA16_BANK4 ((mem_write16_handler)-13)
196
#define MRA16_BANK5 ((mem_read16_handler)-14)
197
#define MWA16_BANK5 ((mem_write16_handler)-14)
198
#define MRA16_BANK6 ((mem_read16_handler)-15)
199
#define MWA16_BANK6 ((mem_write16_handler)-15)
200
#define MRA16_BANK7 ((mem_read16_handler)-16)
201
#define MWA16_BANK7 ((mem_write16_handler)-16)
202
#define MRA16_BANK8 ((mem_read16_handler)-17)
203
#define MWA16_BANK8 ((mem_write16_handler)-17)
204
#define MRA16_BANK9 ((mem_read16_handler)-18)
205
#define MWA16_BANK9 ((mem_write16_handler)-18)
206
#define MRA16_BANK10 ((mem_read16_handler)-19)
207
#define MWA16_BANK10 ((mem_write16_handler)-19)
208
#define MRA16_BANK11 ((mem_read16_handler)-20)
209
#define MWA16_BANK11 ((mem_write16_handler)-20)
210
#define MRA16_BANK12 ((mem_read16_handler)-21)
211
#define MWA16_BANK12 ((mem_write16_handler)-21)
212
#define MRA16_BANK13 ((mem_read16_handler)-22)
213
#define MWA16_BANK13 ((mem_write16_handler)-22)
214
#define MRA16_BANK14 ((mem_read16_handler)-23)
215
#define MWA16_BANK14 ((mem_write16_handler)-23)
216
#define MRA16_BANK15 ((mem_read16_handler)-24)
217
#define MWA16_BANK15 ((mem_write16_handler)-24)
218
#define MRA16_BANK16 ((mem_read16_handler)-25)
219
#define MWA16_BANK16 ((mem_write16_handler)-25)
220
#define MRA16_BANK17 ((mem_read16_handler)-26)
221
#define MWA16_BANK17 ((mem_write16_handler)-26)
222
#define MRA16_BANK18 ((mem_read16_handler)-27)
223
#define MWA16_BANK18 ((mem_write16_handler)-27)
224
#define MRA16_BANK19 ((mem_read16_handler)-28)
225
#define MWA16_BANK19 ((mem_write16_handler)-28)
226
#define MRA16_BANK20 ((mem_read16_handler)-29)
227
#define MWA16_BANK20 ((mem_write16_handler)-29)
229
struct Memory_ReadAddress16
232
mem_read16_handler handler; /* see special values above */
235
struct Memory_WriteAddress16
238
mem_write16_handler handler; /* see special values above */
239
data16_t **base; /* optional (see explanation above) */
240
size_t *size; /* optional (see explanation above) */
243
#define MEMORY_READ16_START(name) const struct Memory_ReadAddress16 name[] = { \
244
{ MEMORY_MARKER, MEMORY_DIRECTION_READ | MEMORY_TYPE_MEM | MEMORY_WIDTH_16 },
245
#define MEMORY_WRITE16_START(name) const struct Memory_WriteAddress16 name[] = { \
246
{ MEMORY_MARKER, MEMORY_DIRECTION_WRITE | MEMORY_TYPE_MEM | MEMORY_WIDTH_16 },
248
/***************************************************************************
249
32-BIT Core memory read/write/opbase handler types
250
***************************************************************************/
252
typedef UINT32 data32_t;
254
typedef data32_t (*mem_read32_handler)(UNUSEDARG offs_t offset);
255
typedef void (*mem_write32_handler)(UNUSEDARG offs_t offset, UNUSEDARG data32_t data, UNUSEDARG UINT32 mem_mask);
257
#define READ32_HANDLER(name) data32_t name(UNUSEDARG offs_t offset, UNUSEDARG UINT32 mem_mask)
258
#define WRITE32_HANDLER(name) void name(UNUSEDARG offs_t offset, UNUSEDARG data32_t data, UNUSEDARG UINT32 mem_mask)
259
#define OPBASE32_HANDLER(name) offs_t name(UNUSEDARG offs_t address)
261
#define MRA32_NOP 0 /* don't care, return 0 */
262
#define MWA32_NOP 0 /* do nothing */
263
#define MRA32_RAM ((mem_read32_handler)-1) /* plain RAM location (return its contents) */
264
#define MWA32_RAM ((mem_write32_handler)-1) /* plain RAM location (store the value) */
265
#define MRA32_ROM ((mem_read32_handler)-2) /* plain ROM location (return its contents) */
266
#define MWA32_ROM ((mem_write32_handler)-2) /* plain ROM location (do nothing) */
267
/**************************************************************************
268
* If the CPU opcodes are encrypted, they are fetched from a different
269
* memory space. In such a case, if the program dynamically creates code
270
* in RAM and executes it, it won't work unless you use MWA_RAMROM
271
* to affect both memory spaces.
272
**************************************************************************/
273
#define MWA32_RAMROM ((mem_write32_handler)-3)
276
#define MRA32_BANK1 ((mem_read32_handler)-10)
277
#define MWA32_BANK1 ((mem_write32_handler)-10)
278
#define MRA32_BANK2 ((mem_read32_handler)-11)
279
#define MWA32_BANK2 ((mem_write32_handler)-11)
280
#define MRA32_BANK3 ((mem_read32_handler)-12)
281
#define MWA32_BANK3 ((mem_write32_handler)-12)
282
#define MRA32_BANK4 ((mem_read32_handler)-13)
283
#define MWA32_BANK4 ((mem_write32_handler)-13)
284
#define MRA32_BANK5 ((mem_read32_handler)-14)
285
#define MWA32_BANK5 ((mem_write32_handler)-14)
286
#define MRA32_BANK6 ((mem_read32_handler)-15)
287
#define MWA32_BANK6 ((mem_write32_handler)-15)
288
#define MRA32_BANK7 ((mem_read32_handler)-16)
289
#define MWA32_BANK7 ((mem_write32_handler)-16)
290
#define MRA32_BANK8 ((mem_read32_handler)-17)
291
#define MWA32_BANK8 ((mem_write32_handler)-17)
292
#define MRA32_BANK9 ((mem_read32_handler)-18)
293
#define MWA32_BANK9 ((mem_write32_handler)-18)
294
#define MRA32_BANK10 ((mem_read32_handler)-19)
295
#define MWA32_BANK10 ((mem_write32_handler)-19)
296
#define MRA32_BANK11 ((mem_read32_handler)-20)
297
#define MWA32_BANK11 ((mem_write32_handler)-20)
298
#define MRA32_BANK12 ((mem_read32_handler)-21)
299
#define MWA32_BANK12 ((mem_write32_handler)-21)
300
#define MRA32_BANK13 ((mem_read32_handler)-22)
301
#define MWA32_BANK13 ((mem_write32_handler)-22)
302
#define MRA32_BANK14 ((mem_read32_handler)-23)
303
#define MWA32_BANK14 ((mem_write32_handler)-23)
304
#define MRA32_BANK15 ((mem_read32_handler)-24)
305
#define MWA32_BANK15 ((mem_write32_handler)-24)
306
#define MRA32_BANK32 ((mem_read32_handler)-25)
307
#define MWA32_BANK32 ((mem_write32_handler)-25)
308
#define MRA32_BANK17 ((mem_read32_handler)-26)
309
#define MWA32_BANK17 ((mem_write32_handler)-26)
310
#define MRA32_BANK18 ((mem_read32_handler)-27)
311
#define MWA32_BANK18 ((mem_write32_handler)-27)
312
#define MRA32_BANK19 ((mem_read32_handler)-28)
313
#define MWA32_BANK19 ((mem_write32_handler)-28)
314
#define MRA32_BANK20 ((mem_read32_handler)-29)
315
#define MWA32_BANK20 ((mem_write32_handler)-29)
317
struct Memory_ReadAddress32
320
mem_read32_handler handler; /* see special values above */
323
struct Memory_WriteAddress32
326
mem_write32_handler handler; /* see special values above */
327
data32_t **base; /* optional (see explanation above) */
328
size_t *size; /* optional (see explanation above) */
331
#define MEMORY_READ32_START(name) const struct Memory_ReadAddress32 name[] = { \
332
{ MEMORY_MARKER, MEMORY_DIRECTION_READ | MEMORY_TYPE_MEM | MEMORY_WIDTH_32 },
333
#define MEMORY_WRITE32_START(name) const struct Memory_WriteAddress32 name[] = { \
334
{ MEMORY_MARKER, MEMORY_DIRECTION_WRITE | MEMORY_TYPE_MEM | MEMORY_WIDTH_32 },
336
/***************************************************************************
338
IN and OUT ports are handled like memory accesses, the hook template is the
339
same so you can interchange them. Of course there is no 'base' pointer for
342
***************************************************************************/
347
mem_read_handler handler; /* see special values below */
350
#define IORP_NOP 0 /* don't care, return 0 */
356
mem_write_handler handler; /* see special values below */
359
#define IOWP_NOP 0 /* do nothing */
361
#define PORT_READ_START(name) const struct IO_ReadPort name[] = { \
362
{ MEMORY_MARKER, MEMORY_DIRECTION_READ | MEMORY_TYPE_IO | MEMORY_WIDTH_8 },
363
#define PORT_WRITE_START(name) const struct IO_WritePort name[] = { \
364
{ MEMORY_MARKER, MEMORY_DIRECTION_WRITE | MEMORY_TYPE_IO | MEMORY_WIDTH_8 },
365
#define PORT_END MEMORY_END
367
/***************************************************************************
369
If a memory region contains areas that are outside of the ROM region for
370
an address space, the memory system will allocate an array of structures
371
to track the external areas.
373
***************************************************************************/
375
#define MAX_EXT_MEMORY 64
379
offs_t start,end,region;
383
extern struct ExtMemory ext_memory[MAX_EXT_MEMORY];
387
/***************************************************************************
389
For a given number of address bits, we need to determine how many elements
390
there are in the first and second-order lookup tables. We also need to know
391
how many low-order bits to ignore. The ABITS* values represent these
392
constants for each address space type we support.
394
***************************************************************************/
396
/* memory element block size */
397
#define MH_SBITS 8 /* sub element bank size */
398
#define MH_PBITS 8 /* port current element size */
399
#define MH_ELEMAX 64 /* sub elements limit */
400
#define MH_HARDMAX 64 /* hardware functions limit */
402
/* 16 bits address */
405
#define ABITS_MIN_16 0 /* minimum memory block is 1 byte */
406
/* 16 bits address (word access) */
407
#define ABITS1_16W 12
409
#define ABITS_MIN_16W 1 /* minimum memory block is 2 bytes */
410
/* 20 bits address */
413
#define ABITS_MIN_20 0 /* minimum memory block is 1 byte */
414
/* 21 bits address */
417
#define ABITS_MIN_21 0 /* minimum memory block is 1 byte */
418
/* 24 bits address */
421
#define ABITS_MIN_24 0 /* minimum memory block is 1 byte */
422
/* 24 bits address (word access) */
423
#define ABITS1_24W 15
425
#define ABITS_MIN_24W 1 /* minimum memory block is 2 bytes */
426
/* 24 bits address (dword access) */
427
#define ABITS1_24DW 14
428
#define ABITS2_24DW 8
429
#define ABITS_MIN_24DW 2 /* minimum memory block is 4 bytes */
430
/* 26 bits address (dword access) */
431
#define ABITS1_26DW 16
432
#define ABITS2_26DW 8
433
#define ABITS_MIN_26DW 2 /* minimum memory block is 4 bytes */
434
/* 29 bits address (word access) */
435
#define ABITS1_29W 20
437
#define ABITS_MIN_29W 1 /* minimum memory block is 2 bytes */
438
/* 32 bits address (word access) */
439
#define ABITS1_32W 23
441
#define ABITS_MIN_32W 1 /* minimum memory block is 2 bytes */
442
/* 32 bits address (dword access) */
443
#define ABITS1_32DW 22
444
#define ABITS2_32DW 8
445
#define ABITS_MIN_32DW 2 /* minimum memory block is 4 bytes */
447
#define MHMASK(abits) (0xffffffff >> (32 - abits))
450
/***************************************************************************
454
***************************************************************************/
456
typedef unsigned char MHELE;
458
extern MHELE ophw; /* opcode handler */
459
extern MHELE *cur_mrhard; /* current set of read handlers */
460
extern MHELE *cur_mwhard; /* current set of write handlers */
462
extern UINT8 *OP_RAM; /* opcode RAM base */
463
extern UINT8 *OP_ROM; /* opcode ROM base */
464
extern UINT8 *cpu_bankbase[]; /* array of bank bases */
467
/* global memory access width and mask (16-bit and 32-bit under-size accesses) */
468
//extern UINT32 mem_width;
469
//extern UINT32 mem_mask;
470
//extern UINT32 mem_offs;
472
/***************************************************************************
476
***************************************************************************/
478
/* ----- 16-bit memory accessing ----- */
479
#define COMBINE_DATA(varptr) (*(varptr) = (*(varptr) & mem_mask) | (data & ~mem_mask))
480
#define ACCESSING_LSB ((mem_mask & 0x00ff) == 0)
481
#define ACCESSING_MSB ((mem_mask & 0xff00) == 0)
483
//extern unsigned char prgrom[128*1024];
485
/* ----- opcode reading ----- */
486
#define cpu_readop cpu_readmem16
487
//#define cpu_readop16(A) READ_WORD(&prgrom[A&0x3fff])
488
//#define cpu_readop32(A) READ_DWORD(&prgrom[A&0x3fff])
490
/* ----- opcode argument reading ----- */
491
#define cpu_readop_arg cpu_readmem16
492
//#define cpu_readop_arg16(A) READ_WORD(&prgrom[A&0x3fff])
493
//#define cpu_readop_arg32(A) READ_DWORD(&prgrom[A&0x3fff])
495
/* ----- bank switching for CPU cores ----- */
496
#define change_pc_generic(pc,abits2,abitsmin,shift,setop) \
498
if (cur_mrhard[(pc)>>(abits2+abitsmin+shift)] != ophw) \
501
#define change_pc16(pc)
502
//change_pc_generic(pc, ABITS2_16, ABITS_MIN_16, 0, cpu_setOPbase16)
503
#define change_pc20(pc) change_pc_generic(pc, ABITS2_20, ABITS_MIN_20, 0, cpu_setOPbase20)
504
#define change_pc21(pc) change_pc_generic(pc, ABITS2_21, ABITS_MIN_21, 0, cpu_setOPbase21)
505
#define change_pc24(pc) change_pc_generic(pc, ABITS2_24, ABITS_MIN_24, 0, cpu_setOPbase24)
506
#define change_pc16bew(pc) change_pc_generic(pc, ABITS2_16W, ABITS_MIN_16W, 0, cpu_setOPbase16bew)
507
#define change_pc16lew(pc) change_pc_generic(pc, ABITS2_16W, ABITS_MIN_16W, 0, cpu_setOPbase16lew)
508
#define change_pc24bew(pc) change_pc_generic(pc, ABITS2_24W, ABITS_MIN_24W, 0, cpu_setOPbase24bew)
509
#define change_pc29lew(pc) change_pc_generic(pc, ABITS2_29W, ABITS_MIN_29W, 3, cpu_setOPbase29lew)
510
#define change_pc32bew(pc) change_pc_generic(pc, ABITS2_32W, ABITS_MIN_32W, 0, cpu_setOPbase32bew)
511
#define change_pc32lew(pc) change_pc_generic(pc, ABITS2_32W, ABITS_MIN_32W, 0, cpu_setOPbase32lew)
512
#define change_pc24bedw(pc) change_pc_generic(pc, ABITS2_24DW, ABITS_MIN_24DW, 0, cpu_setOPbase24bedw)
513
#define change_pc26ledw(pc) change_pc_generic(pc, ABITS2_26DW, ABITS_MIN_26DW, 0, cpu_setOPbase26ledw)
514
#define change_pc32bedw(pc) change_pc_generic(pc, ABITS2_32DW, ABITS_MIN_32DW, 0, cpu_setOPbase32bedw)
516
/* backward compatibility */
517
#define change_pc(pc)
520
/* ----- for use OPbaseOverride driver, request override callback to next cpu_setOPbase ----- */
521
#define catch_nextBranch() (ophw = 0xff)
523
/* ----- bank switching macro ----- */
524
#define cpu_setbank(bank, base) \
526
if (bank >= 1 && bank <= MAX_BANKS) \
528
cpu_bankbase[bank] = (UINT8 *)(base); \
532
cpu_set_op_base(cpu_get_pc()); \
538
/***************************************************************************
542
***************************************************************************/
544
/* ----- memory setup function ----- */
546
/* ----- memory read functions ----- */
547
data8_t cpu_readmem16(offs_t address);
548
data8_t cpu_readmem20(offs_t address);
549
data8_t cpu_readmem21(offs_t address);
550
data8_t cpu_readmem24(offs_t address);
552
data16_t cpu_readmem16bew(offs_t address);
553
data16_t cpu_readmem16bew_word(offs_t address);
554
data16_t cpu_readmem16lew(offs_t address);
555
data16_t cpu_readmem16lew_word(offs_t address);
556
data16_t cpu_readmem24bew(offs_t address);
557
data16_t cpu_readmem24bew_word(offs_t address);
558
data16_t cpu_readmem29lew(offs_t address);
559
data16_t cpu_readmem29lew_word(offs_t address);
560
data16_t cpu_readmem32bew(offs_t address);
561
data16_t cpu_readmem32bew_word(offs_t address);
562
data16_t cpu_readmem32lew(offs_t address);
563
data16_t cpu_readmem32lew_word(offs_t address);
565
data32_t cpu_readmem24bedw(offs_t address);
566
data32_t cpu_readmem24bedw_word(offs_t address);
567
data32_t cpu_readmem24bedw_dword(offs_t address);
568
data32_t cpu_readmem26ledw(offs_t address);
569
data32_t cpu_readmem26ledw_word(offs_t address);
570
data32_t cpu_readmem26ledw_dword(offs_t address);
571
data32_t cpu_readmem27bedw(offs_t address);
572
data32_t cpu_readmem27bedw_word(offs_t address);
573
data32_t cpu_readmem27bedw_dword(offs_t address);
574
data32_t cpu_readmem32bedw(offs_t address);
575
data32_t cpu_readmem32bedw_word(offs_t address);
576
data32_t cpu_readmem32bedw_dword(offs_t address);
578
/* ----- memory write functions ----- */
579
void cpu_writemem16(offs_t address,data8_t data);
580
void cpu_writemem20(offs_t address,data8_t data);
581
void cpu_writemem21(offs_t address,data8_t data);
582
void cpu_writemem24(offs_t address,data8_t data);
584
void cpu_writemem16bew(offs_t address,data16_t data);
585
void cpu_writemem16bew_word(offs_t address,data16_t data);
586
void cpu_writemem16lew(offs_t address,data16_t data);
587
void cpu_writemem16lew_word(offs_t address,data16_t data);
588
void cpu_writemem24bew(offs_t address,data16_t data);
589
void cpu_writemem24bew_word(offs_t address,data16_t data);
590
void cpu_writemem29lew(offs_t address,data16_t data);
591
void cpu_writemem29lew_word(offs_t address,data16_t data);
592
void cpu_writemem32bew(offs_t address,data16_t data);
593
void cpu_writemem32bew_word(offs_t address,data16_t data);
594
void cpu_writemem32lew(offs_t address,data16_t data);
595
void cpu_writemem32lew_word(offs_t address,data16_t data);
597
void cpu_writemem24bedw(offs_t address,data32_t data);
598
void cpu_writemem24bedw_word(offs_t address,data32_t data);
599
void cpu_writemem24bedw_dword(offs_t address,data32_t data);
600
void cpu_writemem26ledw(offs_t address,data32_t data);
601
void cpu_writemem26ledw_word(offs_t address,data32_t data);
602
void cpu_writemem26ledw_dword(offs_t address,data32_t data);
603
void cpu_writemem27bedw(offs_t address,data32_t data);
604
void cpu_writemem27bedw_word(offs_t address,data32_t data);
605
void cpu_writemem27bedw_dword(offs_t address,data32_t data);
606
void cpu_writemem32bedw(offs_t address,data32_t data);
607
void cpu_writemem32bedw_word(offs_t address,data32_t data);
608
void cpu_writemem32bedw_dword(offs_t address,data32_t data);
610
/* ----- port I/O functions ----- */
611
int cpu_readport(int port);
612
void cpu_writeport(int port, int value);
614
/* ----- dynamic memory/port mapping ----- */
615
void *install_mem_read_handler(int cpu, int start, int end, mem_read_handler handler);
616
void *install_mem_read16_handler(int cpu, int start, int end, mem_read16_handler handler);
617
void *install_mem_read32_handler(int cpu, int start, int end, mem_read32_handler handler);
618
void *install_mem_write_handler(int cpu, int start, int end, mem_write_handler handler);
619
void *install_mem_write16_handler(int cpu, int start, int end, mem_write16_handler handler);
620
void *install_mem_write32_handler(int cpu, int start, int end, mem_write32_handler handler);
621
void *install_port_read_handler(int cpu, int start, int end, mem_read_handler handler);
622
void *install_port_write_handler(int cpu, int start, int end, mem_write_handler handler);
624
/* ----- dynamic bank handlers ----- */
625
void cpu_setbankhandler_r(int bank, mem_read_handler handler);
626
void cpu_setbankhandler_w(int bank, mem_write_handler handler);
628
/* ----- opcode base control ---- */
629
void cpu_setOPbase16(offs_t pc);
630
void cpu_setOPbase20(offs_t pc);
631
void cpu_setOPbase21(offs_t pc);
632
void cpu_setOPbase24(offs_t pc);
633
void cpu_setOPbase16bew(offs_t pc);
634
void cpu_setOPbase16lew(offs_t pc);
635
void cpu_setOPbase24bew(offs_t pc);
636
void cpu_setOPbase24bedw(offs_t pc);
637
void cpu_setOPbase26ledw(offs_t pc);
638
void cpu_setOPbase29lew(offs_t pc);
639
void cpu_setOPbase32bew(offs_t pc);
640
void cpu_setOPbase32lew(offs_t pc);
641
void cpu_setOPbaseoverride(int cpu, opbase_handler function);
643
/* ----- harder-to-explain functions ---- */
645
/* use this to set the a different opcode base address when using a CPU with
646
opcodes and data encrypted separately */
647
void memory_set_opcode_base(int cpu, void *base);
649
/* look up a chunk of memory and get its start/end addresses, and its base.
650
Pass in the cpu number and the offset. It will find the chunk containing
651
that offset and return the start and end addresses, along with a pointer to
652
the base of the memory.
653
This can be used (carefully!) by drivers that wish to access memory directly
654
without going through the readmem/writemem accessors (e.g., blitters). */
655
void *findmemorychunk(int cpu, int offset, int *chunkstart, int *chunkend);
661
#endif /* !_MEMORY_H */
added
removed
src/psf/mamemem.h
