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* Copyright (C) 2004 Daniel Foesch (dfoesch@cs.nmsu.edu)
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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#define PPC_OPC_VRc (1<<10)
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/* Rather than write each function to be endianless, we're writing these
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* defines to do an endianless access to elements of the vector.
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* These are for ADDRESSED vector elements. Usually, most vector operations
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* can be performed in either direction without care, so most of the
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* for-loops should not use these, as it will introduce unneeded code
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* for little-endian systems.
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#if HOST_ENDIANESS == HOST_ENDIANESS_LE
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#define VECT_B(reg, index) ((reg).b[15 - (index)])
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#define VECT_SB(reg, index) ((reg).sb[15 - (index)])
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#define VECT_H(reg, index) ((reg).h[7 - (index)])
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#define VECT_SH(reg, index) ((reg).sh[7 - (index)])
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#define VECT_W(reg, index) ((reg).w[3 - (index)])
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#define VECT_SW(reg, index) ((reg).sw[3 - (index)])
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#define VECT_D(reg, index) ((reg).d[1 - (index)])
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#define VECT_SD(reg, index) ((reg).sd[1 - (index)])
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#define VECT_EVEN(index) (((index) << 1) + 1)
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#define VECT_ODD(index) (((index) << 1) + 0)
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#elif HOST_ENDIANESS == HOST_ENDIANESS_BE
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#define VECT_B(reg, index) ((reg).b[(index)])
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#define VECT_SB(reg, index) ((reg).sb[(index)])
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#define VECT_H(reg, index) ((reg).h[(index)])
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#define VECT_SH(reg, index) ((reg).sh[(index)])
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#define VECT_W(reg, index) ((reg).w[(index)])
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#define VECT_SW(reg, index) ((reg).sw[(index)])
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#define VECT_D(reg, index) ((reg).d[(index)])
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#define VECT_SD(reg, index) ((reg).sd[(index)])
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#define VECT_EVEN(index) (((index) << 1) + 0)
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#define VECT_ODD(index) (((index) << 1) + 1)
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#error Endianess not supported!
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//#define VECTOR_DEBUG fprintf(stderr, "[PPC/VEC] %s\n", __FUNCTION__)
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//#define VECTOR_DEBUG_COMMON fprintf(stderr, "[PPC/VEC] %s\n", __FUNCTION__)
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#define VECTOR_DEBUG_COMMON
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/* Undefine this to turn of the MSR_VEC check for vector instructions. */
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//#define __VEC_EXC_OFF__
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//#include "tools/snprintf.h"
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void ppc_opc_vsldoi();
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void ppc_opc_vmrghb();
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void ppc_opc_vmrghh();
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void ppc_opc_vmrghw();
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void ppc_opc_vmrglb();
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void ppc_opc_vmrglh();
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void ppc_opc_vmrglw();
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void ppc_opc_vspltb();
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void ppc_opc_vsplth();
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void ppc_opc_vspltw();
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void ppc_opc_vspltisb();
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void ppc_opc_vspltish();
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void ppc_opc_vspltisw();
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void ppc_opc_mfvscr();
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void ppc_opc_mtvscr();
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void ppc_opc_vpkuhum();
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void ppc_opc_vpkuwum();
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void ppc_opc_vpkpx();
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void ppc_opc_vpkuhus();
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void ppc_opc_vpkshss();
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void ppc_opc_vpkuwus();
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void ppc_opc_vpkswss();
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void ppc_opc_vpkuhus();
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void ppc_opc_vpkshus();
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void ppc_opc_vpkuwus();
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void ppc_opc_vpkswus();
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void ppc_opc_vupkhsb();
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void ppc_opc_vupkhpx();
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void ppc_opc_vupkhsh();
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void ppc_opc_vupklsb();
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void ppc_opc_vupklpx();
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void ppc_opc_vupklsh();
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void ppc_opc_vaddubm();
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void ppc_opc_vadduhm();
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void ppc_opc_vadduwm();
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void ppc_opc_vaddfp();
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void ppc_opc_vaddcuw();
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void ppc_opc_vaddubs();
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void ppc_opc_vaddsbs();
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void ppc_opc_vadduhs();
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void ppc_opc_vaddshs();
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void ppc_opc_vadduws();
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void ppc_opc_vaddsws();
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void ppc_opc_vsububm();
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void ppc_opc_vsubuhm();
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void ppc_opc_vsubuwm();
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void ppc_opc_vsubfp();
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void ppc_opc_vsubcuw();
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void ppc_opc_vsububs();
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void ppc_opc_vsubsbs();
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void ppc_opc_vsubuhs();
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void ppc_opc_vsubshs();
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void ppc_opc_vsubuws();
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void ppc_opc_vsubsws();
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void ppc_opc_vmuleub();
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void ppc_opc_vmulesb();
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void ppc_opc_vmuleuh();
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void ppc_opc_vmulesh();
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void ppc_opc_vmuloub();
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void ppc_opc_vmulosb();
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void ppc_opc_vmulouh();
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void ppc_opc_vmulosh();
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void ppc_opc_vmaddfp();
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void ppc_opc_vmhaddshs();
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void ppc_opc_vmladduhm();
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void ppc_opc_vmhraddshs();
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void ppc_opc_vmsumubm();
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void ppc_opc_vmsumuhm();
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void ppc_opc_vmsummbm();
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void ppc_opc_vmsumshm();
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void ppc_opc_vmsumuhs();
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void ppc_opc_vmsumshs();
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void ppc_opc_vsum4ubs();
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void ppc_opc_vsum4sbs();
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void ppc_opc_vsum4shs();
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void ppc_opc_vsum2sws();
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void ppc_opc_vsumsws();
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void ppc_opc_vnmsubfp();
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void ppc_opc_vavgub();
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void ppc_opc_vavgsb();
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void ppc_opc_vavguh();
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void ppc_opc_vavgsh();
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void ppc_opc_vavguw();
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void ppc_opc_vavgsw();
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void ppc_opc_vmaxub();
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void ppc_opc_vmaxsb();
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void ppc_opc_vmaxuh();
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void ppc_opc_vmaxsh();
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void ppc_opc_vmaxuw();
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void ppc_opc_vmaxsw();
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void ppc_opc_vmaxfp();
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void ppc_opc_vminub();
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void ppc_opc_vminsb();
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void ppc_opc_vminuh();
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void ppc_opc_vminsh();
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void ppc_opc_vminuw();
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void ppc_opc_vminsw();
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void ppc_opc_vminfp();
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void ppc_opc_vrfin();
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void ppc_opc_vrfip();
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void ppc_opc_vrfim();
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void ppc_opc_vrfiz();
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void ppc_opc_vrefp();
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void ppc_opc_vrsqrtefp();
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void ppc_opc_vlogefp();
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void ppc_opc_vexptefp();
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void ppc_opc_vcfux();
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void ppc_opc_vcfsx();
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void ppc_opc_vctsxs();
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void ppc_opc_vctuxs();
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void ppc_opc_vandc();
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void ppc_opc_vcmpequbx();
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void ppc_opc_vcmpequhx();
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void ppc_opc_vcmpequwx();
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void ppc_opc_vcmpeqfpx();
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void ppc_opc_vcmpgtubx();
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void ppc_opc_vcmpgtsbx();
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void ppc_opc_vcmpgtuhx();
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void ppc_opc_vcmpgtshx();
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void ppc_opc_vcmpgtuwx();
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void ppc_opc_vcmpgtswx();
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void ppc_opc_vcmpgtfpx();
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void ppc_opc_vcmpgefpx();
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void ppc_opc_vcmpbfpx();
added
removed
arch/ppc/common/ppc_vec.h
