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#define MI_NOOP (CMD_MI | 0)
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#define MI_BATCH_BUFFER_END (CMD_MI | (0xA << 23))
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#define MI_BATCH_BUFFER_START (CMD_MI | (0x31 << 23))
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#define MI_FLUSH (CMD_MI | (0x4 << 23))
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#define STATE_INSTRUCTION_CACHE_INVALIDATE (0x1 << 0)
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#define MI_FLUSH_STATE_INSTRUCTION_CACHE_INVALIDATE (0x1 << 0)
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#define MI_FLUSH_DW (CMD_MI | (0x26 << 23) | 0x2)
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#define MI_FLUSH_DW_VIDEO_PIPELINE_CACHE_INVALIDATE (0x1 << 7)
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#define XY_COLOR_BLT_CMD (CMD_2D | (0x50 << 22) | 0x04)
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#define XY_COLOR_BLT_WRITE_ALPHA (1 << 21)
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#define ALIGN(i, n) (((i) + (n) - 1) & ~((n) - 1))
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#define MIN(a, b) ((a) < (b) ? (a) : (b))
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#define MAX(a, b) ((a) > (b) ? (a) : (b))
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#define ARRAY_ELEMS(a) (sizeof(a) / sizeof((a)[0]))
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53
#define SET_BLOCKED_SIGSET() do { \
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54
sigset_t bl_mask; \
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#define PCI_CHIP_G45_G 0x2E22
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#define PCI_CHIP_G41_G 0x2E32
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#define PCI_CHIP_IGDNG_D_G 0x0042
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#define PCI_CHIP_IGDNG_M_G 0x0046
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#define IS_G45(devid) (devid == PCI_CHIP_IGD_E_G || \
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devid == PCI_CHIP_Q45_G || \
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devid == PCI_CHIP_G45_G || \
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#define PCI_CHIP_IRONLAKE_D_G 0x0042
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#define PCI_CHIP_IRONLAKE_M_G 0x0046
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#ifndef PCI_CHIP_SANDYBRIDGE_GT1
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#define PCI_CHIP_SANDYBRIDGE_GT1 0x0102 /* Desktop */
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#define PCI_CHIP_SANDYBRIDGE_GT2 0x0112
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#define PCI_CHIP_SANDYBRIDGE_GT2_PLUS 0x0122
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#define PCI_CHIP_SANDYBRIDGE_M_GT1 0x0106 /* Mobile */
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#define PCI_CHIP_SANDYBRIDGE_M_GT2 0x0116
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#define PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS 0x0126
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#define PCI_CHIP_SANDYBRIDGE_S_GT 0x010A /* Server */
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#define IS_G45(devid) (devid == PCI_CHIP_IGD_E_G || \
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devid == PCI_CHIP_Q45_G || \
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devid == PCI_CHIP_G45_G || \
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devid == PCI_CHIP_G41_G)
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#define IS_GM45(devid) (devid == PCI_CHIP_GM45_GM)
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#define IS_G4X(devid) (IS_G45(devid) || IS_GM45(devid))
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#define IS_IGDNG_D(devid) (devid == PCI_CHIP_IGDNG_D_G)
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#define IS_IGDNG_M(devid) (devid == PCI_CHIP_IGDNG_M_G)
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#define IS_IGDNG(devid) (IS_IGDNG_D(devid) || IS_IGDNG_M(devid))
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#define IS_IRONLAKE_D(devid) (devid == PCI_CHIP_IRONLAKE_D_G)
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#define IS_IRONLAKE_M(devid) (devid == PCI_CHIP_IRONLAKE_M_G)
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#define IS_IRONLAKE(devid) (IS_IRONLAKE_D(devid) || IS_IRONLAKE_M(devid))
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#define IS_GEN6(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT1 || \
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devid == PCI_CHIP_SANDYBRIDGE_GT2 || \
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devid == PCI_CHIP_SANDYBRIDGE_GT2_PLUS ||\
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devid == PCI_CHIP_SANDYBRIDGE_M_GT1 || \
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devid == PCI_CHIP_SANDYBRIDGE_M_GT2 || \
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devid == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS || \
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devid == PCI_CHIP_SANDYBRIDGE_S_GT)
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#endif /* _INTEL_DRIVER_H_ */