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* Common header file for both SetHWScoreboard and SetHWScoreboard_MBAFF kernels
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* Copyright © <2010>, Intel Corporation.
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* This program is licensed under the terms and conditions of the
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* Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
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* http://www.opensource.org/licenses/eclipse-1.0.php.
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#if !defined(__SETHWSCOREBOARD_HEADER__) // Make sure this file is only included once
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#define __SETHWSCOREBOARD_HEADER__
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// Module name: SetHWScoreboard_header.inc
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// Common header file for both SetHWScoreboard and SetHWScoreboard_MBAFF kernels
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#define BI_CMD_BUF 0 // Binding table index for command buffer
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// For use by setting HW scoreboard kernel for MBAFF picture
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#define TOP_FM_MASK1_D r1.0 // Bit mask for first half of top frame MB SB mask
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#define TOP_FM_MASK1_B r1.0 // Bit mask for first half of top frame MB SB mask
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#define TOP_FM_MASK2_D r1.1 // Bit mask for second half of top frame MB SB mask
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#define TOP_FM_MASK2_B r1.4 // Bit mask for second half of top frame MB SB mask
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#define BOT_FM_MASK1_D r1.2 // Bit mask for first half of bottom frame MB SB mask
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#define BOT_FM_MASK1_B r1.8 // Bit mask for first half of bottom frame MB SB mask
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#define BOT_FM_MASK2_D r1.3 // Bit mask for second half of bottom frame MB SB mask
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#define BOT_FM_MASK2_B r1.12 // Bit mask for second half of bottom frame MB SB mask
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#define TOP_FD_MASK1_D r1.4 // Bit mask for first half of top field MB SB mask
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#define TOP_FD_MASK1_B r1.16 // Bit mask for first half of top field MB SB mask
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#define TOP_FD_MASK2_D r1.5 // Bit mask for second half of top field MB SB mask
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#define TOP_FD_MASK2_B r1.20 // Bit mask for second half of top field MB SB mask
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#define BOT_FD_MASK1_D r1.6 // Bit mask for first half of bottom field MB SB mask
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#define BOT_FD_MASK1_B r1.24 // Bit mask for first half of bottom field MB SB mask
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#define BOT_FD_MASK2_D r1.7 // Bit mask for second half of bottom field MB SB mask
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#define BOT_FD_MASK2_B r1.28 // Bit mask for second half of bottom field MB SB mask
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// For use by setting HW scoreboard kernel for non-MBAFF picture
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#define MB_SHIFT_MASK_W r1.0 // :w type. Shift values for two parts of the MB SB mask
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#define MB_SHIFT_MASK_B r1.0 // :b type. Shift values for two parts of the MB SB mask
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#define INLINE_REG_OFFSET 1
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#define StartingMB INLINE_REG.0 // :uw type. Starting MB number
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#define TotalMB INLINE_REG.1 // :uw type. Total number of MB to be processed
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#define PicWidthMB INLINE_REG.2 // :uw type. Picture width in MB
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// Temporary variables
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#define RemainderMB r3.0 // :uw type. Remainder of MB (<16) to be processed
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#define TEMP_FD_X_W r3.2 // :w type. Temporary variable for field MB X origin in MBAFF picture
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#define TEMP_FD_X_B r3.4 // :b type. Temporary variable for field MB X origin in MBAFF picture
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#define TEMP_FD_Y_W r3.3 // :w type. Temporary variable for field MB Y origin in MBAFF picture
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#define TEMP_FD_Y_B r3.6 // :b type. Temporary variable for field MB Y origin in MBAFF picture
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#define TEMP_INTRA_FLAG_W r3.4 // :uw type. Temporary intra available flag
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#define MB_MASK_D r3.4 // :ud type. Bit masks for MBAFF MB
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#define MB_MASK_B r3.16 // :ub type. Bit masks for MBAFF MB
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#define MRF_READ_HEADER_SRC r63
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// MEDIA_OBJECT_EX Command map
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// In DW1 of each MEDIA_OBJECT_EX command (VFE DWORD)
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#define CUR_X 0 // Byte 0
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#define CUR_Y 0 // Byte 2
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// In DW2 of each MEDIA_OBJECT_EX command
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#define USE_SCOREBOARD BIT21
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// In DW4 of each MEDIA_OBJECT_EX command
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#define IS_INTRA_MB BIT13
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#define IS_FIELD_MB BIT14
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#define IS_INTRA8X8 BIT15
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#define IS_BOT_FD BIT24
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// In DW7 of each MEDIA_OBJECT_EX command
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#define CMD_BUFFER_REG_OFF 4
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.declare CMD_BUFFER_D Base=GRF(4) ElementSize=4 SrcRegion=REGION(8,1) Type=ud // Command buffer (32 GRF)
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.declare CMD_BUFFER_W Base=GRF(4) ElementSize=2 SrcRegion=REGION(16,1) Type=uw // Command buffer (32 GRF)
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.declare CMD_BUFFER_B Base=GRF(4) ElementSize=1 SrcRegion=REGION(16,1) Type=ub // Command buffer (32 GRF)
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#define MRF_READ_HEADER m1
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#define MRF_READ_HEADER0 m1
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#define MRF_READ_HEADER1 m2
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#define MRF_READ_HEADER2 m3
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#define MRF_READ_HEADER3 m4
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#define MRF_INTER_WRITE_HEADER m5
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#define MRF_INTER_WRITE_DATA0 m6
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#define MRF_INTER_WRITE_DATA1 m7
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#define MRF_WRITE_HEADER m11
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#define MRF_INTRA_WRITE_HEADER m11
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#define MRF_CMD_BUF_REG_OFF 12
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.declare MRF_CMD_BUF_D Base=m12 ElementSize=4 SrcRegion=REGION(8,1) Type=ud // Command buffer stored in MRF
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.declare MRF_CMD_BUF_W Base=m12 ElementSize=2 SrcRegion=REGION(16,1) Type=uw // Command buffer stored in MRF
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.declare MRF_CMD_BUF_B Base=m12 ElementSize=1 SrcRegion=REGION(16,1) Type=ub // Command buffer stored in MRF
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#define BI_CMD_BUFFER 0
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#define OWBRMSGDSC_SC 0x02088000 // OWORD Block Read Message Descriptor, reading from sampler cache = A.
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#define OWBWMSGDSC 0x02080000 // OWORD Block Write Message Descriptor
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#define OWORD_1 0x000
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#define OWORD_2 0x200
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#define OWORD_4 0x300
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#define OWORD_8 0x400
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// End of SETHWSCOREBOARD_HEADER
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#endif // !defined(__SETHWSCOREBOARD_HEADER__)
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i965_drv_video/shaders/h264/mc/SetHWScoreboard_header.inc
