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Viewing changes to src/radeon_driver.c

  • Committer: Bazaar Package Importer
  • Author(s): Robert Hooker
  • Date: 2010-07-08 16:45:59 UTC
  • mfrom: (1.1.34 upstream) (0.2.8 sid)
  • Revision ID: james.westby@ubuntu.com-20100708164559-t1gwcpobj4n39lhf
Tags: 1:6.13.1-1ubuntu1
* Merge from Debian Unstable. Remainning Ubuntu changes:
  + debian/control:
    - Add quilt to build-depends for Ubuntu patches
  + debian/patches/100_radeon-6.9.0-bgnr-enable.patch:
    - Smooth plymouth transition enablement patch
  + debian/rules:
    - Add xsfbs patchsys
    - Drop /etc/modprobe.d/radeon-kms.conf install.
  + debian/xserver-xorg-video-ati.{pre,post}inst.in:
    - Clean existing /etc/modprobe.d/radeon-kms.conf on install.
      At best this does nothing (KMS is the default for our kernel)
      and at worst it makes it harder to disable KMS.
* Add debian/gbp.conf pointing to Ubuntu branch to make git-buildpackage
  less narky.
* Drop 102-no-xv-rn50.patch and 103_new_pci_ids.patch from previous
  Ubuntu releases, they are upstream now.

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Lines of Context:
src/radeon_driver.c
181
181
    { OPTION_RENDER_ACCEL,   "RenderAccel",      OPTV_BOOLEAN, {0}, FALSE },
182
182
    { OPTION_SUBPIXEL_ORDER, "SubPixelOrder",    OPTV_ANYSTR,  {0}, FALSE },
183
183
#endif
184
 
    { OPTION_SHOWCACHE,      "ShowCache",        OPTV_BOOLEAN, {0}, FALSE },
185
184
    { OPTION_CLOCK_GATING,   "ClockGating",      OPTV_BOOLEAN, {0}, FALSE },
186
185
    { OPTION_VGA_ACCESS,     "VGAAccess",        OPTV_BOOLEAN, {0}, TRUE  },
187
186
    { OPTION_REVERSE_DDC,    "ReverseDDC",       OPTV_BOOLEAN, {0}, FALSE },
239
238
    stride = (pScrn->displayWidth * pScrn->bitsPerPixel) / 8;
240
239
    *size = stride;
241
240
 
242
 
    return ((uint8_t *)info->FB + row * stride + offset);
 
241
    return ((uint8_t *)info->FB + pScrn->fbOffset + row * stride + offset);
243
242
}
244
243
static Bool
245
244
RADEONCreateScreenResources (ScreenPtr pScreen)
369
368
    info = RADEONPTR(pScrn);
370
369
 
371
370
    if (info->cp) {
372
 
        xfree(info->cp);
 
371
        free(info->cp);
373
372
        info->cp = NULL;
374
373
    }
375
374
 
376
375
    if (info->dri) {
377
 
        xfree(info->dri);
 
376
        free(info->dri);
378
377
        info->dri = NULL;
379
378
    }
380
379
 
381
380
    if (info->accel_state) {
382
 
        xfree(info->accel_state);
 
381
        free(info->accel_state);
383
382
        info->accel_state = NULL;
384
383
    }
385
384
 
386
385
    for (i = 0; i < RADEON_MAX_BIOS_CONNECTOR; i++) {
387
386
        if (info->encoders[i]) {
388
387
            if (info->encoders[i]->dev_priv) {
389
 
                xfree(info->encoders[i]->dev_priv);
 
388
                free(info->encoders[i]->dev_priv);
390
389
                info->encoders[i]->dev_priv = NULL;
391
390
            }
392
 
            xfree(info->encoders[i]);
 
391
            free(info->encoders[i]);
393
392
            info->encoders[i]= NULL;
394
393
        }
395
394
    }
396
395
 
397
 
    xfree(pScrn->driverPrivate);
 
396
    free(pScrn->driverPrivate);
398
397
    pScrn->driverPrivate = NULL;
399
398
}
400
399
 
403
402
 */
404
403
static Bool RADEONMapMMIO(ScrnInfoPtr pScrn)
405
404
{
 
405
#ifdef XSERVER_LIBPCIACCESS
 
406
    int err;
 
407
#endif
406
408
    RADEONInfoPtr  info = RADEONPTR(pScrn);
407
409
    RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
408
410
 
409
411
    if (pRADEONEnt->MMIO) {
 
412
        pRADEONEnt->MMIO_cnt++;
410
413
        info->MMIO = pRADEONEnt->MMIO;
411
414
        return TRUE;
412
415
    }
419
422
                               info->MMIOAddr,
420
423
                               info->MMIOSize);
421
424
 
422
 
    if (!info->MMIO) return FALSE;
 
425
    if (!info->MMIO)
 
426
        return FALSE;
423
427
#else
424
428
 
425
 
    void** result = (void**)&info->MMIO;
426
 
    int err = pci_device_map_range(info->PciInfo,
 
429
    err = pci_device_map_range(info->PciInfo,
427
430
                                   info->MMIOAddr,
428
431
                                   info->MMIOSize,
429
432
                                   PCI_DEV_MAP_FLAG_WRITABLE,
430
 
                                   result);
 
433
                                   &info->MMIO);
431
434
 
432
435
    if (err) {
433
436
        xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
439
442
#endif
440
443
 
441
444
    pRADEONEnt->MMIO = info->MMIO;
 
445
    pRADEONEnt->MMIO_cnt = 1;
442
446
    return TRUE;
443
447
}
444
448
 
450
454
    RADEONInfoPtr  info = RADEONPTR(pScrn);
451
455
    RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
452
456
 
453
 
    if (info->IsPrimary || info->IsSecondary) {
454
 
      /* never unmap on zaphod */
 
457
    /* refcount for zaphod */
 
458
    if (--pRADEONEnt->MMIO_cnt != 0) {
455
459
      info->MMIO = NULL;
456
460
      return TRUE;
457
461
    }
474
478
    int err;
475
479
#endif
476
480
    RADEONInfoPtr  info = RADEONPTR(pScrn);
 
481
    RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
 
482
 
 
483
    if (pRADEONEnt->FB) {
 
484
        pRADEONEnt->FB_cnt++;
 
485
        info->FB = pRADEONEnt->FB;
 
486
        return TRUE;
 
487
    }
477
488
 
478
489
    xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
479
490
                   "Map: 0x%016llx, 0x%08lx\n", info->LinearAddr, info->FbMapSize);
506
517
 
507
518
#endif
508
519
 
 
520
    pRADEONEnt->FB = info->FB;
 
521
    pRADEONEnt->FB_cnt = 1;
509
522
    return TRUE;
510
523
}
511
524
 
513
526
static Bool RADEONUnmapFB(ScrnInfoPtr pScrn)
514
527
{
515
528
    RADEONInfoPtr  info = RADEONPTR(pScrn);
 
529
    RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
 
530
 
 
531
    /* refcount for zaphod */
 
532
    if (--pRADEONEnt->FB_cnt != 0) {
 
533
      info->FB = NULL;
 
534
      return TRUE;
 
535
    }
516
536
 
517
537
#ifndef XSERVER_LIBPCIACCESS
518
538
    xf86UnMapVidMem(pScrn->scrnIndex, info->FB, info->FbMapSize);
520
540
    pci_device_unmap_range(info->PciInfo, info->FB, info->FbMapSize);
521
541
#endif
522
542
 
 
543
    pRADEONEnt->FB = NULL;
523
544
    info->FB = NULL;
524
545
    return TRUE;
525
546
}
1767
1788
    xf86DrvMsg(pScrn->scrnIndex, from,
1768
1789
               "Mapped VideoRAM: %d kByte (%d bit %s SDRAM)\n", pScrn->videoRam, info->RamWidth, info->IsDDR?"DDR":"SDR");
1769
1790
 
 
1791
    /* Do this before we truncate since we only map fb once */
 
1792
    info->FbMapSize  = (pScrn->videoRam & ~1023) * 1024;
 
1793
 
1770
1794
    if (info->IsPrimary) {
1771
1795
        pScrn->videoRam /= 2;
1772
1796
        xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1773
1797
                   "Using %dk of videoram for primary head\n",
1774
1798
                   pScrn->videoRam);
1775
 
    }
1776
 
    
1777
 
    if (info->IsSecondary) {
 
1799
    } else if (info->IsSecondary) {
1778
1800
        pScrn->videoRam /= 2;
1779
 
        info->LinearAddr += pScrn->videoRam * 1024;
1780
1801
        xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1781
1802
                   "Using %dk of videoram for secondary head\n",
1782
1803
                   pScrn->videoRam);
1783
1804
    }
1784
 
 
1785
1805
    pScrn->videoRam  &= ~1023;
1786
 
    info->FbMapSize  = pScrn->videoRam * 1024;
1787
1806
 
1788
1807
    /* if the card is PCI Express reserve the last 32k for the gart table */
1789
1808
#ifdef XF86DRI
2070
2089
        }
2071
2090
    }
2072
2091
#endif
2073
 
    xf86GetOptValBool(info->Options, OPTION_SHOWCACHE, &info->showCache);
2074
 
    if (info->showCache)
2075
 
        xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
2076
 
                   "Option ShowCache enabled\n");
2077
 
 
2078
2092
#ifdef RENDER
2079
2093
    info->RenderAccel = xf86ReturnOptValBool(info->Options, OPTION_RENDER_ACCEL,
2080
2094
                                             info->Chipset != PCI_CHIP_RN50_515E &&
2140
2154
#if defined(USE_EXA) && defined(USE_XAA)
2141
2155
    char *optstr;
2142
2156
#endif
 
2157
#ifdef XF86DRI /* zaphod FbMapSize is wrong, but no dri then */
2143
2158
    int maxy = info->FbMapSize / (pScrn->displayWidth * info->CurrentLayout.pixel_bytes);
 
2159
#endif
2144
2160
 
2145
 
    if (!(info->accel_state = xcalloc(1, sizeof(struct radeon_accel_state)))) {
 
2161
    if (!(info->accel_state = calloc(1, sizeof(struct radeon_accel_state)))) {
2146
2162
        xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Unable to allocate accel_state rec!\n");
2147
2163
        return FALSE;
2148
2164
    }
2313
2329
    info->directRenderingEnabled = FALSE;
2314
2330
    info->directRenderingInited = FALSE;
2315
2331
 
2316
 
    if (!(info->dri = xcalloc(1, sizeof(struct radeon_dri)))) {
 
2332
    if (!(info->dri = calloc(1, sizeof(struct radeon_dri)))) {
2317
2333
        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"Unable to allocate dri rec!\n");
2318
2334
        return FALSE;
2319
2335
    }
2320
2336
 
2321
 
    if (!(info->cp = xcalloc(1, sizeof(struct radeon_cp)))) {
 
2337
    if (!(info->cp = calloc(1, sizeof(struct radeon_cp)))) {
2322
2338
        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"Unable to allocate cp rec!\n");
2323
2339
        return FALSE;
2324
2340
    }
2701
2717
        switch(info->ChipFamily){
2702
2718
        case CHIP_FAMILY_R200:
2703
2719
        case CHIP_FAMILY_R300:
 
2720
        case CHIP_FAMILY_R350:
2704
2721
        case CHIP_FAMILY_RV350:
 
2722
        case CHIP_FAMILY_RV380:
 
2723
        case CHIP_FAMILY_R420:
 
2724
        case CHIP_FAMILY_RV410:
2705
2725
                info->overlay_scaler_buffer_width = 1920;
2706
2726
                break;
2707
2727
        default:
3065
3085
                                /* We can't do this until we have a
3066
3086
                                   pScrn->display. */
3067
3087
    xf86CollectOptions(pScrn, NULL);
3068
 
    if (!(info->Options = xalloc(sizeof(RADEONOptions))))
 
3088
    if (!(info->Options = malloc(sizeof(RADEONOptions))))
3069
3089
        goto fail;
3070
3090
 
3071
3091
    memcpy(info->Options, RADEONOptions, sizeof(RADEONOptions));
3229
3249
                                /* Pre-init failed. */
3230
3250
                                /* Free the video bios (if applicable) */
3231
3251
    if (info->VBIOS) {
3232
 
        xfree(info->VBIOS);
 
3252
        free(info->VBIOS);
3233
3253
        info->VBIOS = NULL;
3234
3254
    }
3235
3255
 
3426
3446
    pScrn->fbOffset    = info->dri->frontOffset;
3427
3447
#endif
3428
3448
 
3429
 
    if (info->IsSecondary) pScrn->fbOffset = pScrn->videoRam * 1024;
 
3449
    if (info->IsSecondary)
 
3450
        pScrn->fbOffset = pScrn->videoRam * 1024;
3430
3451
#ifdef XF86DRI
3431
3452
    xf86DrvMsg(pScrn->scrnIndex, X_INFO, 
3432
3453
                   "RADEONScreenInit %lx %ld %d\n",
3649
3670
                   "Initializing fb layer\n");
3650
3671
 
3651
3672
    if (info->r600_shadow_fb) {
3652
 
        info->fb_shadow = xcalloc(1,
3653
 
                                  pScrn->displayWidth * pScrn->virtualY *
3654
 
                                  ((pScrn->bitsPerPixel + 7) >> 3));
 
3673
        info->fb_shadow = calloc(1,
 
3674
                                 pScrn->displayWidth * pScrn->virtualY *
 
3675
                                 ((pScrn->bitsPerPixel + 7) >> 3));
3655
3676
        if (info->fb_shadow == NULL) {
3656
3677
            xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
3657
3678
                       "Failed to allocate shadow framebuffer\n");
3667
3688
 
3668
3689
    if (info->r600_shadow_fb == FALSE) {
3669
3690
        /* Init fb layer */
3670
 
        if (!fbScreenInit(pScreen, info->FB,
 
3691
        if (!fbScreenInit(pScreen, info->FB + pScrn->fbOffset,
3671
3692
                          pScrn->virtualX, pScrn->virtualY,
3672
3693
                          pScrn->xDpi, pScrn->yDpi, pScrn->displayWidth,
3673
3694
                          pScrn->bitsPerPixel))
5626
5647
                   "RADEONDoAdjustFrame(%d,%d,%d)\n", x, y, clone);
5627
5648
#endif
5628
5649
 
5629
 
    if (info->showCache && y) {
5630
 
                int lastline = info->FbMapSize /
5631
 
                    ((pScrn->displayWidth * pScrn->bitsPerPixel) / 8);
5632
 
 
5633
 
                lastline -= pScrn->currentMode->VDisplay;
5634
 
                y += (pScrn->virtualY - 1) * (y / 3 + 1);
5635
 
                if (y > lastline) y = lastline;
5636
 
    }
5637
 
 
5638
5650
    Base = pScrn->fbOffset;
5639
5651
 
5640
5652
  /* note we cannot really simply use the info->ModeReg.crtc_offset_cntl value, since the
6006
6018
#ifdef USE_EXA
6007
6019
    if (info->accel_state->exa) {
6008
6020
        exaDriverFini(pScreen);
6009
 
        xfree(info->accel_state->exa);
 
6021
        free(info->accel_state->exa);
6010
6022
        info->accel_state->exa = NULL;
6011
6023
    }
6012
6024
#endif /* USE_EXA */
6017
6029
        info->accel_state->accel = NULL;
6018
6030
 
6019
6031
        if (info->accel_state->scratch_save)
6020
 
            xfree(info->accel_state->scratch_save);
 
6032
            free(info->accel_state->scratch_save);
6021
6033
        info->accel_state->scratch_save = NULL;
6022
6034
    }
6023
6035
#endif /* USE_XAA */