3
;==========================================================================
4
; $Id: p18f67j50.inc,v 1.1 2006/08/19 02:52:40 craigfranklin Exp $
5
; MPASM PIC18F67J50 processor include
7
; (c) Copyright 1999-2006 Microchip Technology, All rights reserved
8
;==========================================================================
12
;==========================================================================
13
; This header file defines configurations, registers, and other useful
14
; bits of information for the PIC18F67J50 microcontroller. These names
15
; are taken to match the data sheets as closely as possible.
17
; Note that the processor must be selected before this file is included.
18
; The processor may be selected the following ways:
20
; 1. Command line switch:
21
; C:\MPASM MYFILE.ASM /PIC18F67J50
22
; 2. LIST directive in the source file
24
; 3. Processor Type entry in the MPASM full-screen interface
25
; 4. Setting the processor in the MPLAB Project Dialog
26
;==========================================================================
28
;==========================================================================
32
;==========================================================================
34
MESSG "Processor-header file mismatch. Verify selected processor."
37
;==========================================================================
38
; 18xxxx Family EQUates
39
;==========================================================================
50
;==========================================================================
52
;==========================================================================
53
; 16Cxxx/17Cxxx Substitutions
54
;==========================================================================
55
#define DDRA TRISA ; PIC17Cxxx SFR substitution
56
#define DDRB TRISB ; PIC17Cxxx SFR substitution
57
#define DDRC TRISC ; PIC17Cxxx SFR substitution
58
#define DDRD TRISD ; PIC17Cxxx SFR substitution
59
#define DDRE TRISE ; PIC17Cxxx SFR substitution
61
;==========================================================================
63
; Register Definitions
65
;==========================================================================
67
;----- Register Files -----------------------------------------------------
113
PMPDATA1L EQU H'0F66'
114
PMPDATA1H EQU H'0F67'
307
;----- PMSTATL Bits -----------------------------------------------------
316
;----- PMSTATH Bits -----------------------------------------------------
325
;----- PMPENL Bits -----------------------------------------------------
336
;----- PMPENH Bits -----------------------------------------------------
347
;----- PMPMODEL Bits -----------------------------------------------------
358
;----- PMPMODEH Bits -----------------------------------------------------
369
;----- PMPCONL Bits -----------------------------------------------------
380
;----- PMPCONH Bits -----------------------------------------------------
391
;----- UEP0 Bits -----------------------------------------------------
399
;----- UEP1 Bits -----------------------------------------------------
407
;----- UEP2 Bits -----------------------------------------------------
415
;----- UEP3 Bits -----------------------------------------------------
423
;----- UEP4 Bits -----------------------------------------------------
431
;----- UEP5 Bits -----------------------------------------------------
439
;----- UEP6 Bits -----------------------------------------------------
447
;----- UEP7 Bits -----------------------------------------------------
455
;----- UEP8 Bits -----------------------------------------------------
463
;----- UEP9 Bits -----------------------------------------------------
471
;----- UEP10 Bits -----------------------------------------------------
479
;----- UEP11 Bits -----------------------------------------------------
487
;----- UEP12 Bits -----------------------------------------------------
495
;----- UEP13 Bits -----------------------------------------------------
503
;----- UEP14 Bits -----------------------------------------------------
511
;----- UEP15 Bits -----------------------------------------------------
519
;----- UIE Bits -----------------------------------------------------
529
;----- UEIE Bits -----------------------------------------------------
538
;----- UADDR Bits -----------------------------------------------------
548
;----- UCFG Bits -----------------------------------------------------
558
;----- UFRML Bits -----------------------------------------------------
569
;----- UFRMH Bits -----------------------------------------------------
575
;----- UIR Bits -----------------------------------------------------
585
;----- UEIR Bits -----------------------------------------------------
594
;----- USTAT Bits -----------------------------------------------------
603
;----- UCON Bits -----------------------------------------------------
612
;----- PMPADDRH Bits -----------------------------------------------------
617
;----- CMSTATUS Bits -----------------------------------------------------
622
;----- SSP2CON2 Bits -----------------------------------------------------
633
;----- SSP2CON1 Bits -----------------------------------------------------
644
;----- SSP2STAT Bits -----------------------------------------------------
655
I2C_START EQU H'0003'
662
NOT_WRITE EQU H'0002'
663
NOT_ADDRESS EQU H'0005'
665
READ_WRITE EQU H'0002'
666
DATA_ADDRESS EQU H'0005'
672
;----- SSP2MSK Bits -----------------------------------------------------
683
;----- CCP5CON Bits -----------------------------------------------------
695
;----- CCP4CON Bits -----------------------------------------------------
707
;----- T4CON Bits -----------------------------------------------------
717
;----- CVRCON Bits -----------------------------------------------------
728
;----- T3CON Bits -----------------------------------------------------
740
NOT_T3SYNC EQU H'0002'
743
;----- BAUDCON2 Bits -----------------------------------------------------
755
;----- BAUDCON1 Bits -----------------------------------------------------
767
;----- PORTA Bits -----------------------------------------------------
788
;----- PORTB Bits -----------------------------------------------------
812
;----- PORTC Bits -----------------------------------------------------
836
; DT is a reserved word
840
;----- PORTD Bits -----------------------------------------------------
877
;----- PORTE Bits -----------------------------------------------------
901
;----- PORTF Bits -----------------------------------------------------
928
;----- PORTG Bits -----------------------------------------------------
949
;----- LATA Bits -----------------------------------------------------
958
;----- LATB Bits -----------------------------------------------------
969
;----- LATC Bits -----------------------------------------------------
980
;----- LATD Bits -----------------------------------------------------
991
;----- LATE Bits -----------------------------------------------------
1002
;----- LATF Bits -----------------------------------------------------
1009
;----- LATG Bits -----------------------------------------------------
1017
;----- DDRA Bits -----------------------------------------------------
1026
;----- TRISA Bits -----------------------------------------------------
1035
;----- DDRB Bits -----------------------------------------------------
1046
;----- TRISB Bits -----------------------------------------------------
1057
;----- DDRC Bits -----------------------------------------------------
1068
;----- TRISC Bits -----------------------------------------------------
1079
;----- DDRD Bits -----------------------------------------------------
1090
;----- TRISD Bits -----------------------------------------------------
1101
;----- DDRE Bits -----------------------------------------------------
1112
;----- TRISE Bits -----------------------------------------------------
1123
;----- DDRF Bits -----------------------------------------------------
1133
;----- TRISF Bits -----------------------------------------------------
1142
;----- DDRG Bits -----------------------------------------------------
1150
;----- TRISG Bits -----------------------------------------------------
1158
;----- OSCTUNE Bits -----------------------------------------------------
1166
HF256DIV EQU H'0007'
1169
;----- RCSTA2 Bits -----------------------------------------------------
1187
;----- PIE1 Bits -----------------------------------------------------
1202
;----- PIR1 Bits -----------------------------------------------------
1217
;----- IPR1 Bits -----------------------------------------------------
1232
;----- PIE2 Bits -----------------------------------------------------
1245
;----- PIR2 Bits -----------------------------------------------------
1258
;----- IPR2 Bits -----------------------------------------------------
1271
;----- PIE3 Bits -----------------------------------------------------
1282
;----- PIR3 Bits -----------------------------------------------------
1293
;----- IPR3 Bits -----------------------------------------------------
1304
;----- EECON1 Bits -----------------------------------------------------
1312
;----- TXSTA2 Bits -----------------------------------------------------
1328
;----- RCSTA Bits -----------------------------------------------------
1346
;----- RCSTA1 Bits -----------------------------------------------------
1364
;----- TXSTA Bits -----------------------------------------------------
1380
;----- TXSTA1 Bits -----------------------------------------------------
1396
;----- CCP3CON Bits -----------------------------------------------------
1410
;----- ECCP3CON Bits -----------------------------------------------------
1424
;----- PWM3CON Bits -----------------------------------------------------
1435
;----- ECCP3AS Bits -----------------------------------------------------
1449
ECCP3AS0 EQU H'0004'
1450
ECCP3AS1 EQU H'0005'
1451
ECCP3AS2 EQU H'0006'
1452
ECCP3ASE EQU H'0007'
1455
;----- CCP2CON Bits -----------------------------------------------------
1469
;----- ECCP2CON Bits -----------------------------------------------------
1483
;----- PWM2CON Bits -----------------------------------------------------
1494
;----- ECCP2AS Bits -----------------------------------------------------
1508
ECCP2AS0 EQU H'0004'
1509
ECCP2AS1 EQU H'0005'
1510
ECCP2AS2 EQU H'0006'
1511
ECCP2ASE EQU H'0007'
1514
;----- CCP1CON Bits -----------------------------------------------------
1528
;----- ECCP1CON Bits -----------------------------------------------------
1542
;----- PWM1CON Bits -----------------------------------------------------
1553
;----- ECCP1AS Bits -----------------------------------------------------
1567
ECCP1AS0 EQU H'0004'
1568
ECCP1AS1 EQU H'0005'
1569
ECCP1AS2 EQU H'0006'
1570
ECCP1ASE EQU H'0007'
1573
;----- WDTCON Bits -----------------------------------------------------
1581
;----- ADCON2 Bits -----------------------------------------------------
1592
;----- ADPCFGL Bits -----------------------------------------------------
1603
;----- ADCON1 Bits -----------------------------------------------------
1617
NOT_DONE EQU H'0001'
1620
;----- ADPCFGH Bits -----------------------------------------------------
1631
;----- SSP1CON2 Bits -----------------------------------------------------
1642
;----- SSPCON2 Bits -----------------------------------------------------
1653
;----- SSP1CON1 Bits -----------------------------------------------------
1664
;----- SSPCON1 Bits -----------------------------------------------------
1675
;----- SSP1STAT Bits -----------------------------------------------------
1685
I2C_READ EQU H'0002'
1686
I2C_START EQU H'0003'
1687
I2C_STOP EQU H'0004'
1693
NOT_WRITE EQU H'0002'
1694
NOT_ADDRESS EQU H'0005'
1696
READ_WRITE EQU H'0002'
1697
DATA_ADDRESS EQU H'0005'
1703
;----- SSPSTAT Bits -----------------------------------------------------
1713
I2C_READ EQU H'0002'
1714
I2C_START EQU H'0003'
1715
I2C_STOP EQU H'0004'
1721
NOT_WRITE EQU H'0002'
1722
NOT_ADDRESS EQU H'0005'
1724
READ_WRITE EQU H'0002'
1725
DATA_ADDRESS EQU H'0005'
1731
;----- T2CON Bits -----------------------------------------------------
1735
T2OUTPS0 EQU H'0003'
1736
T2OUTPS1 EQU H'0004'
1737
T2OUTPS2 EQU H'0005'
1738
T2OUTPS3 EQU H'0006'
1741
;----- MEMCON Bits -----------------------------------------------------
1749
;----- PADCFG1 Bits -----------------------------------------------------
1753
;----- ODCON3 Bits -----------------------------------------------------
1758
;----- T1CON Bits -----------------------------------------------------
1768
T1INSYNC EQU H'0002'
1770
NOT_T1SYNC EQU H'0002'
1773
;----- ODCON2 Bits -----------------------------------------------------
1774
USART1OD EQU H'0000'
1775
USART2OD EQU H'0001'
1778
;----- ODCON1 Bits -----------------------------------------------------
1786
;----- RCON Bits -----------------------------------------------------
1803
;----- CM2CON1 Bits -----------------------------------------------------
1814
;----- CM1CON1 Bits -----------------------------------------------------
1825
;----- OSCCON Bits -----------------------------------------------------
1838
;----- RF0CON Bits -----------------------------------------------------
1848
;----- T0CON Bits -----------------------------------------------------
1861
;----- STATUS Bits -----------------------------------------------------
1869
;----- INTCON3 Bits -----------------------------------------------------
1889
;----- INTCON2 Bits -----------------------------------------------------
1897
NOT_RBPU EQU H'0007'
1904
;----- INTCON Bits -----------------------------------------------------
1922
;----- STKPTR Bits -----------------------------------------------------
1940
;==========================================================================
1944
;==========================================================================
1946
__BADRAM H'0F87'-H'0F88'
1947
__BADRAM H'0F90'-H'0F91'
1948
__BADRAM H'0F99'-H'0F9A'
1951
;==========================================================================
1953
; IMPORTANT: For the PIC18 devices, the __CONFIG directive has been
1954
; superseded by the CONFIG directive. The following settings
1955
; are available for this device.
1957
; Background Debugger Enable bit:
1958
; DEBUG = ON Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug
1959
; DEBUG = OFF Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins
1961
; Extended Instruction Set Enable bit:
1962
; XINST = OFF Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
1963
; XINST = ON Instruction set extension and Indexed Addressing mode enabled
1965
; Stack Overflow/Underflow Reset Enable bit:
1966
; STVREN = OFF Reset on stack overflow/underflow disabled
1967
; STVREN = ON Reset on stack overflow/underflow enabled
1969
; PLL Prescaler Selection bits:
1970
; PLLDIV = 12 Divide by 12 (48 MHz oscillator input)
1971
; PLLDIV = 10 Divide by 10 (40 MHz oscillator input)
1972
; PLLDIV = 6 Divide by 6 (24 MHz oscillator input)
1973
; PLLDIV = 5 Divide by 5 (20 MHz oscillator input)
1974
; PLLDIV = 4 Divide by 4 (16 MHz oscillator input)
1975
; PLLDIV = 3 Divide by 3 (12 MHz oscillator input)
1976
; PLLDIV = 2 Divide by 2 (8 MHz oscillator input)
1977
; PLLDIV = 1 No prescale (4 MHz oscillator input drives PLL directly)
1979
; Watchdog Timer Enable bit:
1980
; WDTEN = OFF WDT disabled (control is placed on SWDTEN bit)
1981
; WDTEN = ON WDT enabled
1983
; Code Protection bit:
1984
; CP0 = ON Program memory is code-protected
1985
; CP0 = OFF Program memory is not code-protected
1987
; CPU System Clock Postscaler:
1988
; CPUDIV = OSC1_PLL2 [OSC1/OSC2 Src: /1][96 MHz PLL Src: /2]
1989
; CPUDIV = OSC2_PLL3 [OSC1/OSC2 Src: /2][96 MHz PLL Src: /3]
1990
; CPUDIV = OSC3_PLL4 [OSC1/OSC2 Src: /3][96 MHz PLL Src: /4]
1991
; CPUDIV = OSC4_PLL6 [OSC1/OSC2 Src: /4][96 MHz PLL Src: /6]
1993
; Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit:
1994
; IESO = OFF Two-Speed Start-up disabled
1995
; IESO = ON Two-Speed Start-up enabled
1997
; Fail-Safe Clock Monitor Enable bit:
1998
; FCMEN = OFF Fail-Safe Clock Monitor disabled
1999
; FCMEN = ON Fail-Safe Clock Monitor enabled
2001
; Oscillator Selection bits:
2002
; FOSC = INTOSCIO Internal oscillator, port function on RA6 and RA7
2003
; FOSC = INTOSC Internal oscillator, CLKOUT on RA6 and port function on RA7
2004
; FOSC = INTOSCPLLIO_HSINTOSC with PLL enabled, port function on RA6 and RA7, HS used by USB
2005
; FOSC = INTOSCPLL_HS INTOSC with PLL enabled,CLKOUT on RA6 and port function on RA7, HS used by USB
2006
; FOSC = HS HS oscillator, HS used by USB
2007
; FOSC = HSPLL_HS HS oscillator, PLL enabled, HS used by USB
2008
; FOSC = EC EC Oscillator with clock out on RA6, EC used by USB
2009
; FOSC = ECPLL_EC EC Oscillator with PLL , CLKOUT on RA6, EC used by USB
2011
; Watchdog Timer Postscaler Select bits:
2022
; WDTPS = 1024 1:1024
2023
; WDTPS = 2048 1:2048
2024
; WDTPS = 4096 1:4096
2025
; WDTPS = 8192 1:8192
2026
; WDTPS = 16384 1:16384
2027
; WDTPS = 32768 1:32768
2029
; External Bus Wait Enable bit:
2030
; WAIT = ON Wait states for operations on external memory bus enabled
2031
; WAIT = OFF Wait states for operations on external memory bus disabled
2033
; Data Bus Width Select bit:
2034
; BW = 8 8-bit external bus mode
2035
; BW = 16 16-bit external bus mode
2037
; Processor Mode Selection:
2038
; MODE = XM20 Extended Microcontroller mode - 20-bit Address mode
2039
; MODE = XM16 Extended Microcontroller mode - 16-bit Address mode
2040
; MODE = XM12 Extended Microcontroller mode - 12-bit Address mode
2041
; MODE = MM Microcontroller mode - External bus disabled
2043
; External Address Bus Shift Enable bit:
2044
; EASHFT = OFF Address shifting disabled, address on external bus reflects the PC value
2045
; EASHFT = ON Address shifting enabled, address on external bus is offset to start at 000000h
2047
; MSSP address select:
2048
; MSSPSEL = ALTERNATE 5 Bit address mode
2049
; MSSPSEL = MSSPPADDRX 7 Bit address mode
2052
; ECCPMX = ALTERNATE ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4
2053
; ECCPMX = DEFAULT ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3
2056
; CCP2MX = ALTERNATE ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode
2057
; CCP2MX = DEFAULT ECCP2/P2A is multiplexed with RC1
2059
;==========================================================================
2060
_DEVID1 EQU H'3FFFFE'
2061
_DEVID2 EQU H'3FFFFF'