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Viewing changes to drivers/media/dvb/frontends/drxd_hard.c

  • Committer: Package Import Robot
  • Author(s): Andy Whitcroft, Andy Whitcroft
  • Date: 2012-06-21 09:16:38 UTC
  • Revision ID: package-import@ubuntu.com-20120621091638-gubhv4nox8xez1ct
Tags: 3.5.0-1.1
[ Andy Whitcroft]

* Rebuild lowlatency against Ubuntu-3.5.0-1.1
* All new configuration system to allow configuration deltas to be
  exposed via debian.lowlatency/config-delta

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Lines of Context:
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struct SNoiseCal {
103
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        int cpOpt;
104
 
        u16 cpNexpOfs;
105
 
        u16 tdCal2k;
106
 
        u16 tdCal8k;
 
104
        short cpNexpOfs;
 
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        short tdCal2k;
 
106
        short tdCal8k;
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};
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enum app_env {
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struct drxd_state {
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        struct dvb_frontend frontend;
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        struct dvb_frontend_ops ops;
123
 
        struct dvb_frontend_parameters param;
 
123
        struct dtv_frontend_properties props;
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125
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        const struct firmware *fw;
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        struct device *dev;
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                return -EIO;
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        }
916
916
 
917
 
        state->microcode = kmalloc(fw->size, GFP_KERNEL);
 
917
        state->microcode = kmemdup(fw->data, fw->size, GFP_KERNEL);
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        if (state->microcode == NULL) {
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                release_firmware(fw);
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                printk(KERN_ERR "drxd: firmware load failure: no memory\n");
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                return -ENOMEM;
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        }
923
923
 
924
 
        memcpy(state->microcode, fw->data, fw->size);
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        state->microcode_length = fw->size;
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        release_firmware(fw);
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        return 0;
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                                break;
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                }
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1625
 
                switch (state->param.u.ofdm.bandwidth) {
1626
 
                case BANDWIDTH_8_MHZ:
 
1624
                switch (state->props.bandwidth_hz) {
 
1625
                case 8000000:
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                        bandwidth = DRXD_BANDWIDTH_8MHZ_IN_HZ;
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                        break;
1629
 
                case BANDWIDTH_7_MHZ:
 
1628
                case 7000000:
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                        bandwidth = DRXD_BANDWIDTH_7MHZ_IN_HZ;
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                        break;
1632
 
                case BANDWIDTH_6_MHZ:
 
1631
                case 6000000:
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                        bandwidth = DRXD_BANDWIDTH_6MHZ_IN_HZ;
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                        break;
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                default:
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                        status = WriteTable(state, state->m_StartDiversityEnd);
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                        if (status < 0)
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                                break;
1807
 
                        if (state->param.u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
 
1806
                        if (state->props.bandwidth_hz == 8000000) {
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                                status = WriteTable(state, state->m_DiversityDelay8MHZ);
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                                if (status < 0)
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                                        break;
1906
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1907
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static int DRX_Start(struct drxd_state *state, s32 off)
1908
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{
1909
 
        struct dvb_ofdm_parameters *p = &state->param.u.ofdm;
 
1908
        struct dtv_frontend_properties *p = &state->props;
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        int status;
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        u16 transmissionParams = 0;
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                if (status < 0)
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                        break;
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                mirrorFreqSpect = (state->param.inversion == INVERSION_ON);
 
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                mirrorFreqSpect = (state->props.inversion == INVERSION_ON);
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                switch (p->transmission_mode) {
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                default:        /* Not set, detect it automatically */
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                        break;
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                }
2023
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2024
 
                switch (p->hierarchy_information) {
 
2023
                switch (p->hierarchy) {
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                case HIERARCHY_1:
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                        transmissionParams |= SC_RA_RAM_OP_PARAM_HIER_A1;
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                        if (state->type_A) {
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                if (status < 0)
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                        break;
2149
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2150
 
                switch (p->constellation) {
 
2149
                switch (p->modulation) {
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                default:
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                        operationMode |= SC_RA_RAM_OP_AUTO_CONST__M;
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                        /* fall through , try first guess
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                   by SC for fix for some 8K,1/8 guard but is restored by
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                   InitEC and ResetEC
2333
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                   functions */
2334
 
                switch (p->bandwidth) {
2335
 
                case BANDWIDTH_AUTO:
2336
 
                case BANDWIDTH_8_MHZ:
 
2333
                switch (p->bandwidth_hz) {
 
2334
                case 0:
 
2335
                        p->bandwidth_hz = 8000000;
 
2336
                        /* fall through */
 
2337
                case 8000000:
2337
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                        /* (64/7)*(8/8)*1000000 */
2338
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                        bandwidth = DRXD_BANDWIDTH_8MHZ_IN_HZ;
2339
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2341
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                        status = Write16(state,
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                                         FE_AG_REG_IND_DEL__A, 50, 0x0000);
2343
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                        break;
2344
 
                case BANDWIDTH_7_MHZ:
 
2345
                case 7000000:
2345
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                        /* (64/7)*(7/8)*1000000 */
2346
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                        bandwidth = DRXD_BANDWIDTH_7MHZ_IN_HZ;
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                        bandwidthParam = 0x4807;        /*binary:0100 1000 0000 0111 */
2348
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                        status = Write16(state,
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                                         FE_AG_REG_IND_DEL__A, 59, 0x0000);
2350
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                        break;
2351
 
                case BANDWIDTH_6_MHZ:
 
2352
                case 6000000:
2352
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                        /* (64/7)*(6/8)*1000000 */
2353
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                        bandwidth = DRXD_BANDWIDTH_6MHZ_IN_HZ;
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                        bandwidthParam = 0x0F07;        /*binary: 0000 1111 0000 0111 */
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        return 0;
2888
2889
}
2889
2890
 
2890
 
static int drxd_get_frontend(struct dvb_frontend *fe,
2891
 
                             struct dvb_frontend_parameters *param)
2892
 
{
2893
 
        return 0;
2894
 
}
2895
 
 
2896
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static int drxd_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
2897
2892
{
2898
2893
        return drxd_config_i2c(fe, enable);
2899
2894
}
2900
2895
 
2901
 
static int drxd_set_frontend(struct dvb_frontend *fe,
2902
 
                             struct dvb_frontend_parameters *param)
 
2896
static int drxd_set_frontend(struct dvb_frontend *fe)
2903
2897
{
 
2898
        struct dtv_frontend_properties *p = &fe->dtv_property_cache;
2904
2899
        struct drxd_state *state = fe->demodulator_priv;
2905
2900
        s32 off = 0;
2906
2901
 
2907
 
        state->param = *param;
 
2902
        state->props = *p;
2908
2903
        DRX_Stop(state);
2909
2904
 
2910
2905
        if (fe->ops.tuner_ops.set_params) {
2911
 
                fe->ops.tuner_ops.set_params(fe, param);
 
2906
                fe->ops.tuner_ops.set_params(fe);
2912
2907
                if (fe->ops.i2c_gate_ctrl)
2913
2908
                        fe->ops.i2c_gate_ctrl(fe, 0);
2914
2909
        }
2915
2910
 
2916
 
        /* FIXME: move PLL drivers */
2917
 
        if (state->config.pll_set &&
2918
 
            state->config.pll_set(state->priv, param,
2919
 
                                  state->config.pll_address,
2920
 
                                  state->config.demoda_address, &off) < 0) {
2921
 
                printk(KERN_ERR "Error in pll_set\n");
2922
 
                return -1;
2923
 
        }
2924
 
 
2925
2911
        msleep(200);
2926
2912
 
2927
2913
        return DRX_Start(state, off);
2935
2921
}
2936
2922
 
2937
2923
static struct dvb_frontend_ops drxd_ops = {
2938
 
 
 
2924
        .delsys = { SYS_DVBT},
2939
2925
        .info = {
2940
2926
                 .name = "Micronas DRXD DVB-T",
2941
 
                 .type = FE_OFDM,
2942
2927
                 .frequency_min = 47125000,
2943
2928
                 .frequency_max = 855250000,
2944
2929
                 .frequency_stepsize = 166667,
2958
2943
        .i2c_gate_ctrl = drxd_i2c_gate_ctrl,
2959
2944
 
2960
2945
        .set_frontend = drxd_set_frontend,
2961
 
        .get_frontend = drxd_get_frontend,
2962
2946
        .get_tune_settings = drxd_get_tune_settings,
2963
2947
 
2964
2948
        .read_status = drxd_read_status,