62
62
static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
63
63
switch (VT.getSimpleVT().SimpleTy) {
64
64
default: llvm_unreachable("Unknown FP format");
65
case MVT::f16: return &APFloat::IEEEhalf;
65
66
case MVT::f32: return &APFloat::IEEEsingle;
66
67
case MVT::f64: return &APFloat::IEEEdouble;
67
68
case MVT::f80: return &APFloat::x87DoubleExtended;
1042
1043
return getConstantFP(APFloat((float)Val), VT, isTarget);
1043
1044
else if (EltVT==MVT::f64)
1044
1045
return getConstantFP(APFloat(Val), VT, isTarget);
1045
else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
1046
else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::f16) {
1047
1048
APFloat apf = APFloat(Val);
1048
1049
apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1627
1628
bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1628
1629
unsigned Depth) const {
1629
1630
APInt KnownZero, KnownOne;
1630
ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1631
ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
1631
1632
assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1632
1633
return (KnownZero & Mask) == Mask;
1636
1637
/// known to be either zero or one and return them in the KnownZero/KnownOne
1637
1638
/// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1638
1639
/// processing.
1639
void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1640
APInt &KnownZero, APInt &KnownOne,
1641
unsigned Depth) const {
1642
unsigned BitWidth = Mask.getBitWidth();
1643
assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1644
"Mask size mismatches value type size!");
1640
void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
1641
APInt &KnownOne, unsigned Depth) const {
1642
unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1646
1644
KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1647
if (Depth == 6 || Mask == 0)
1648
1646
return; // Limit search depth.
1650
1648
APInt KnownZero2, KnownOne2;
1652
1650
switch (Op.getOpcode()) {
1653
1651
case ISD::Constant:
1654
1652
// We know all of the bits for a constant!
1655
KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1656
KnownZero = ~KnownOne & Mask;
1653
KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1654
KnownZero = ~KnownOne;
1659
1657
// If either the LHS or the RHS are Zero, the result is zero.
1660
ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1661
ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1662
KnownZero2, KnownOne2, Depth+1);
1658
ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1659
ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1663
1660
assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1664
1661
assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1669
1666
KnownZero |= KnownZero2;
1672
ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1673
ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1674
KnownZero2, KnownOne2, Depth+1);
1669
ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1670
ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1675
1671
assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1676
1672
assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1681
1677
KnownOne |= KnownOne2;
1683
1679
case ISD::XOR: {
1684
ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1685
ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1680
ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1681
ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1686
1682
assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1687
1683
assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1696
1692
case ISD::MUL: {
1697
APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1698
ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1699
ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1693
ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1694
ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1700
1695
assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1701
1696
assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1715
1710
LeadZ = std::min(LeadZ, BitWidth);
1716
1711
KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1717
1712
APInt::getHighBitsSet(BitWidth, LeadZ);
1721
1715
case ISD::UDIV: {
1722
1716
// For the purposes of computing leading zeros we can conservatively
1723
1717
// treat a udiv as a logical right shift by the power of 2 known to
1724
1718
// be less than the denominator.
1725
APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1726
ComputeMaskedBits(Op.getOperand(0),
1727
AllOnes, KnownZero2, KnownOne2, Depth+1);
1719
ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1728
1720
unsigned LeadZ = KnownZero2.countLeadingOnes();
1730
1722
KnownOne2.clearAllBits();
1731
1723
KnownZero2.clearAllBits();
1732
ComputeMaskedBits(Op.getOperand(1),
1733
AllOnes, KnownZero2, KnownOne2, Depth+1);
1724
ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1734
1725
unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1735
1726
if (RHSUnknownLeadingOnes != BitWidth)
1736
1727
LeadZ = std::min(BitWidth,
1737
1728
LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1739
KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1730
KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
1742
1733
case ISD::SELECT:
1743
ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1744
ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1734
ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
1735
ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1745
1736
assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1746
1737
assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1750
1741
KnownZero &= KnownZero2;
1752
1743
case ISD::SELECT_CC:
1753
ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1754
ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1744
ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
1745
ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
1755
1746
assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1756
1747
assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1783
1774
if (ShAmt >= BitWidth)
1786
ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1787
KnownZero, KnownOne, Depth+1);
1777
ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1788
1778
assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1789
1779
KnownZero <<= ShAmt;
1790
1780
KnownOne <<= ShAmt;
1801
1791
if (ShAmt >= BitWidth)
1804
ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1805
KnownZero, KnownOne, Depth+1);
1794
ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1806
1795
assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1807
1796
KnownZero = KnownZero.lshr(ShAmt);
1808
1797
KnownOne = KnownOne.lshr(ShAmt);
1810
APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1799
APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1811
1800
KnownZero |= HighBits; // High bits known zero.
1819
1808
if (ShAmt >= BitWidth)
1822
APInt InDemandedMask = (Mask << ShAmt);
1823
1811
// If any of the demanded bits are produced by the sign extension, we also
1824
1812
// demand the input sign bit.
1825
APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1826
if (HighBits.getBoolValue())
1827
InDemandedMask |= APInt::getSignBit(BitWidth);
1813
APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1829
ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1815
ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1831
1816
assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1832
1817
KnownZero = KnownZero.lshr(ShAmt);
1833
1818
KnownOne = KnownOne.lshr(ShAmt);
1850
1835
// Sign extension. Compute the demanded bits in the result that are not
1851
1836
// present in the input.
1852
APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1837
APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
1854
1839
APInt InSignBit = APInt::getSignBit(EBits);
1855
APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1840
APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
1857
1842
// If the sign extended bits are demanded, we know that the sign
1858
1843
// bit is demanded.
1860
1845
if (NewBits.getBoolValue())
1861
1846
InputDemandedBits |= InSignBit;
1863
ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1864
KnownZero, KnownOne, Depth+1);
1848
ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1849
KnownOne &= InputDemandedBits;
1850
KnownZero &= InputDemandedBits;
1865
1851
assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1867
1853
// If the sign bit of the input is known set or clear, then we know the
1893
1879
if (ISD::isZEXTLoad(Op.getNode())) {
1894
1880
EVT VT = LD->getMemoryVT();
1895
1881
unsigned MemBits = VT.getScalarType().getSizeInBits();
1896
KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1882
KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
1897
1883
} else if (const MDNode *Ranges = LD->getRanges()) {
1898
computeMaskedBitsLoad(*Ranges, Mask, KnownZero);
1884
computeMaskedBitsLoad(*Ranges, KnownZero);
1902
1888
case ISD::ZERO_EXTEND: {
1903
1889
EVT InVT = Op.getOperand(0).getValueType();
1904
1890
unsigned InBits = InVT.getScalarType().getSizeInBits();
1905
APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1906
APInt InMask = Mask.trunc(InBits);
1891
APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1907
1892
KnownZero = KnownZero.trunc(InBits);
1908
1893
KnownOne = KnownOne.trunc(InBits);
1909
ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1894
ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1910
1895
KnownZero = KnownZero.zext(BitWidth);
1911
1896
KnownOne = KnownOne.zext(BitWidth);
1912
1897
KnownZero |= NewBits;
1916
1901
EVT InVT = Op.getOperand(0).getValueType();
1917
1902
unsigned InBits = InVT.getScalarType().getSizeInBits();
1918
1903
APInt InSignBit = APInt::getSignBit(InBits);
1919
APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1920
APInt InMask = Mask.trunc(InBits);
1922
// If any of the sign extended bits are demanded, we know that the sign
1923
// bit is demanded. Temporarily set this bit in the mask for our callee.
1924
if (NewBits.getBoolValue())
1925
InMask |= InSignBit;
1904
APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1927
1906
KnownZero = KnownZero.trunc(InBits);
1928
1907
KnownOne = KnownOne.trunc(InBits);
1929
ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1908
ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1931
1910
// Note if the sign bit is known to be zero or one.
1932
1911
bool SignBitKnownZero = KnownZero.isNegative();
1934
1913
assert(!(SignBitKnownZero && SignBitKnownOne) &&
1935
1914
"Sign bit can't be known to be both zero and one!");
1937
// If the sign bit wasn't actually demanded by our caller, we don't
1938
// want it set in the KnownZero and KnownOne result values. Reset the
1939
// mask and reapply it to the result values.
1940
InMask = Mask.trunc(InBits);
1941
KnownZero &= InMask;
1944
1916
KnownZero = KnownZero.zext(BitWidth);
1945
1917
KnownOne = KnownOne.zext(BitWidth);
1954
1926
case ISD::ANY_EXTEND: {
1955
1927
EVT InVT = Op.getOperand(0).getValueType();
1956
1928
unsigned InBits = InVT.getScalarType().getSizeInBits();
1957
APInt InMask = Mask.trunc(InBits);
1958
1929
KnownZero = KnownZero.trunc(InBits);
1959
1930
KnownOne = KnownOne.trunc(InBits);
1960
ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1931
ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1961
1932
KnownZero = KnownZero.zext(BitWidth);
1962
1933
KnownOne = KnownOne.zext(BitWidth);
1965
1936
case ISD::TRUNCATE: {
1966
1937
EVT InVT = Op.getOperand(0).getValueType();
1967
1938
unsigned InBits = InVT.getScalarType().getSizeInBits();
1968
APInt InMask = Mask.zext(InBits);
1969
1939
KnownZero = KnownZero.zext(InBits);
1970
1940
KnownOne = KnownOne.zext(InBits);
1971
ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1941
ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1972
1942
assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1973
1943
KnownZero = KnownZero.trunc(BitWidth);
1974
1944
KnownOne = KnownOne.trunc(BitWidth);
1977
1947
case ISD::AssertZext: {
1978
1948
EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1979
1949
APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1980
ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1982
KnownZero |= (~InMask) & Mask;
1950
ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1951
KnownZero |= (~InMask);
1985
1954
case ISD::FGETSIGN:
1996
1965
unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1997
1966
// NLZ can't be BitWidth with no sign bit
1998
1967
APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1999
ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1968
ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2002
1970
// If all of the MaskV bits are known to be zero, then we know the
2003
1971
// output top bits are zero, because we now know that the output is
2016
1984
// Output known-0 bits are known if clear or set in both the low clear bits
2017
1985
// common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2018
1986
// low 3 bits clear.
2019
APInt Mask2 = APInt::getLowBitsSet(BitWidth,
2020
BitWidth - Mask.countLeadingZeros());
2021
ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1987
ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2022
1988
assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2023
1989
unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2025
ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1991
ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2026
1992
assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2027
1993
KnownZeroOut = std::min(KnownZeroOut,
2028
1994
KnownZero2.countTrailingOnes());
2046
2012
if (RA.isPowerOf2()) {
2047
2013
APInt LowBits = RA - 1;
2048
2014
APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2049
ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
2015
ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2051
2017
// The low bits of the first operand are unchanged by the srem.
2052
2018
KnownZero = KnownZero2 & LowBits;
2074
2036
const APInt &RA = Rem->getAPIntValue();
2075
2037
if (RA.isPowerOf2()) {
2076
2038
APInt LowBits = (RA - 1);
2077
APInt Mask2 = LowBits & Mask;
2078
KnownZero |= ~LowBits & Mask;
2079
ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
2039
KnownZero |= ~LowBits;
2040
ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1);
2080
2041
assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2085
2046
// Since the result is less than or equal to either operand, any leading
2086
2047
// zero bits in either operand must also exist in the result.
2087
APInt AllOnes = APInt::getAllOnesValue(BitWidth);
2088
ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
2090
ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
2048
ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2049
ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2093
2051
uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2094
2052
KnownZero2.countLeadingOnes());
2095
2053
KnownOne.clearAllBits();
2096
KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2054
KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2099
2057
case ISD::FrameIndex:
2113
2071
case ISD::INTRINSIC_W_CHAIN:
2114
2072
case ISD::INTRINSIC_VOID:
2115
2073
// Allow the target to implement this method for its nodes.
2116
TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2074
TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2238
2195
if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2239
2196
if (CRHS->isAllOnesValue()) {
2240
2197
APInt KnownZero, KnownOne;
2241
APInt Mask = APInt::getAllOnesValue(VTBits);
2242
ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2198
ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2244
2200
// If the input is known to be 0 or 1, the output is 0/-1, which is all
2245
2201
// sign bits set.
2246
if ((KnownZero | APInt(VTBits, 1)) == Mask)
2202
if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2249
2205
// If we are subtracting one from a positive number, there is no carry
2264
2220
if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2265
2221
if (CLHS->isNullValue()) {
2266
2222
APInt KnownZero, KnownOne;
2267
APInt Mask = APInt::getAllOnesValue(VTBits);
2268
ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2223
ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2269
2224
// If the input is known to be 0 or 1, the output is 0/-1, which is all
2270
2225
// sign bits set.
2271
if ((KnownZero | APInt(VTBits, 1)) == Mask)
2226
if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2274
2229
// If the input is known to be positive (the sign bit is known clear),
2317
2272
// Finally, if we can prove that the top bits of the result are 0's or 1's,
2318
2273
// use this information.
2319
2274
APInt KnownZero, KnownOne;
2320
APInt Mask = APInt::getAllOnesValue(VTBits);
2321
ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2275
ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
2323
2278
if (KnownZero.isNegative()) { // sign bit is 0
2324
2279
Mask = KnownZero;
2325
2280
} else if (KnownOne.isNegative()) { // sign bit is 1;
6040
5995
int64_t GVOffset = 0;
6041
5996
if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6042
5997
unsigned PtrWidth = TLI.getPointerTy().getSizeInBits();
6043
APInt AllOnes = APInt::getAllOnesValue(PtrWidth);
6044
5998
APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6045
llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), AllOnes,
6046
KnownZero, KnownOne, TLI.getTargetData());
5999
llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6000
TLI.getTargetData());
6047
6001
unsigned AlignBits = KnownZero.countTrailingOnes();
6048
6002
unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;