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* Testchip peripheral and fpga gic regions
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#define CNS3XXX_TC11MP_SCU_BASE 0x90000000 /* IRQ, Test chip */
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#define CNS3XXX_TC11MP_GIC_CPU_BASE 0x90000100 /* Test chip interrupt controller CPU interface */
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#define CNS3XXX_TC11MP_TWD_BASE 0x90000600
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#define CNS3XXX_TC11MP_GIC_DIST_BASE 0x90001000 /* Test chip interrupt controller distributor */
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#define CNS3XXX_TC11MP_L220_BASE 0x92002000 /* L220 registers */
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#define CNS3XXX_TC11MP_L220_BASE_VIRT 0xFF002000