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# The first is the name of the application. It is assumed that the
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# application name is the same as the base file name of the single C++
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# file from which the application is generated.
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target = $(basename $(shell echo step-*.cc))
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# The second field determines whether you want to run your program in
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# debug or optimized mode. The latter is significantly faster, but no
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# shall be deleted when calling `make clean'. Object and backup files,
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# executables and the like are removed anyway. Here, we give a list of
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# files in the various output formats that deal.II supports.
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clean-up-files = *gmv *gnuplot *gpl *eps *pov
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clean-up-files = *gmv *gnuplot *gpl *eps *pov *vtk *ucd *.d2
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# Usually, you will not need to change anything beyond this point.
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# The next statement tell the `make' program where to find the
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# The next statement tells the `make' program where to find the
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# deal.II top level directory and to include the file with the global
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include $D/common/Make.global_options
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# Since the whole project consists of only one file, we need not
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# consider difficult dependencies. We only have to declare the
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# libraries which we want to link to the object file, and there need
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# to be two sets of libraries: one for the debug mode version of the
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# application and one for the optimized mode. Here we have selected
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# the versions for 2d. Note that the order in which the libraries are
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# given here is important and that your applications won't link
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# properly if they are given in another order.
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# You may need to augment the lists of libraries when compiling your
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# program for other dimensions, or when using third party libraries
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libs.g = $(lib-deal2-2d.g) \
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libs.o = $(lib-deal2-2d.o) \
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# We now use the variable defined above which switch between debug and
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# libraries which we want to link to the object file. deal.II has two
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# libraries: one for the debug mode version of the
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# application and one for optimized mode.
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libs.g := $(lib-deal2.g)
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libs.o := $(lib-deal2.o)
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# We now use the variable defined above to switch between debug and
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# optimized mode to select the set of libraries to link with. Included
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# in the list of libraries is the name of the object file which we
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# will produce from the single C++ file. Note that by default we use
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# the extension .g.o for object files compiled in debug mode and .o for
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# object files in optimized mode (or whatever the local default on your
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# system is instead of .o).
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# object files in optimized mode (or whatever local default on your
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# system is instead of .o)
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ifeq ($(debug-mode),on)
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libraries = $(target).g.$(OBJEXT) $(libs.g)
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# file produced from the single C++ file into the executable. Since
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# this is the first rule in the Makefile, it is the one `make' selects
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# if you call it without arguments.
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$(target) : $(libraries)
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$(target)$(EXEEXT) : $(libraries)
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@echo ============================ Linking $@
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@$(CXX) -o $@$(EXEEXT) $^ $(LIBS) $(LDFLAGS)
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@$(CXX) -o $@ $^ $(LIBS) $(LDFLAGS)
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# To make running the application somewhat independent of the actual
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# command line using the `at' sign in the first column of the rules
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# and write the string indicating what we do instead.
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./%.g.$(OBJEXT) :
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@echo ==============debug========= $(<F)
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@echo "==============debug========= $(<F) -> $@"
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@$(CXX) $(CXXFLAGS.g) -c $< -o $@
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@echo ==============optimized===== $(<F)
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@echo "==============optimized===== $(<F) -> $@"
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@$(CXX) $(CXXFLAGS.o) -c $< -o $@
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# since the executable depends on some include files from the library,
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# besides the C++ application file of course, it is necessary to
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# re-generate the executable when one of the files it depends on has
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# changed. The following rule to created a dependency file
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# changed. The following rule creates a dependency file
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# `Makefile.dep', which `make' uses to determine when to regenerate
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# the executable. This file is automagically remade whenever needed,
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# i.e. whenever one of the cc-/h-files changed. Make detects whether
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# If the creation of Makefile.dep fails, blow it away and fail
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Makefile.dep: $(target).cc Makefile \
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$(shell echo $D/*/include/*/*.h)
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$(shell echo $D/include/deal.II/*/*.h)
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@echo ============================ Remaking $@
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@$D/common/scripts/make_dependencies $(INCLUDE) -B. $(target).cc \
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|| (rm -f $@ ; false)
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@if test -s $@ ; then : else rm $@ ; fi
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# To make the dependencies known to `make', we finally have to include
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include Makefile.dep