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- Committer: Stefan Lesicnik
- Date: 2010-11-10 13:41:13 UTC
- mfrom: (3.1.5 sid)
- Revision ID: stefan@lsd.co.za-20101110134113-esykqtd368dxm2vp
bzr merge of Debian 1:2.3.0.1+dfsg-2
- files added:
- .pc
- .pc/chanmute
- .pc/chanmute/include
- .pc/chanmute/include/dahdi
- .pc/dahdi_linux_extra
- .pc/dahdi_linux_extra/drivers
- .pc/dahdi_linux_extra/drivers/dahdi
- .pc/dahdi_linux_extra/drivers/dahdi/zaphfc
- .pc/dahdi_linux_extra/drivers/staging
- .pc/dahdi_linux_extra/drivers/staging/echo
- .pc/no_firmware_download
- .pc/oslec_include_2634
- .pc/oslec_include_2634/drivers
- .pc/oslec_include_2634/drivers/dahdi
- .pc/uk_rotary
- .pc/uk_rotary/drivers
- .pc/uk_rotary/drivers/dahdi
- .pc/voicebus_sem_h_2635
- .pc/voicebus_sem_h_2635/drivers
- .pc/voicebus_sem_h_2635/drivers/dahdi
- .pc/voicebus_sem_h_2635/drivers/dahdi/voicebus
- .pc/wcb4xxp_bn4s0e
- .pc/wcb4xxp_bn4s0e/drivers
- .pc/wcb4xxp_bn4s0e/drivers/dahdi
- .pc/wcb4xxp_bn4s0e/drivers/dahdi/wcb4xxp
- .pc/xpp_usb_buffer_2635
- .pc/xpp_usb_buffer_2635/drivers
- .pc/xpp_usb_buffer_2635/drivers/dahdi
- .pc/xpp_usb_buffer_2635/drivers/dahdi/xpp
- debian/source
- drivers/dahdi/zaphfc
- drivers/staging
- drivers/staging/echo
- files modified:
- Makefile
- debian/backports/etch *
- debian/make_static_nodes *
- debian/modulestest *
- debian/patches/beronet *
- debian/patches/oslec_zaptap *
added
removed
drivers/dahdi/zaphfc/base.c
1
/*
2
* zaphfc.c - Dahdi driver for HFC-S PCI A based ISDN BRI cards
3
*
4
* Dahdi rewrite in hardhdlc mode
5
* Jose A. Deniz <odicha@hotmail.com>
6
*
7
* Copyright (C) 2009, Jose A. Deniz
8
* Copyright (C) 2006, headiisue GmbH; Jens Wilke
9
* Copyright (C) 2004 Daniele Orlandi
10
* Copyright (C) 2002, 2003, 2004, Junghanns.NET GmbH
11
*
12
* Jens Wilke <jw_vzaphfc@headissue.com>
13
*
14
* Original author of this code is
15
* Daniele "Vihai" Orlandi <daniele@orlandi.com>
16
*
17
* Major rewrite of the driver made by
18
* Klaus-Peter Junghanns <kpj@junghanns.net>
19
*
20
* This program is free software and may be modified and
21
* distributed under the terms of the GNU Public License.
22
*
23
* Please read the README file for important infos.
24
*/
25
26
#include <linux/spinlock.h>
27
#include <linux/init.h>
28
#include <linux/pci.h>
29
#include <linux/interrupt.h>
30
#include <linux/module.h>
31
#include <linux/moduleparam.h>
32
#include <linux/version.h>
33
#include <linux/kernel.h>
34
#include <linux/delay.h>
35
#include <linux/sched.h>
36
#include <linux/proc_fs.h>
37
#include <linux/if_arp.h>
38
39
#include <dahdi/kernel.h>
40
41
#include "zaphfc.h"
42
#include "fifo.h"
43
44
#if CONFIG_PCI
45
46
#define DAHDI_B1 0
47
#define DAHDI_B2 1
48
#define DAHDI_D 2
49
50
#define D 0
51
#define B1 1
52
#define B2 2
53
54
/*
55
* Mode Te for all
56
*/
57
static int modes;
58
static int nt_modes[hfc_MAX_BOARDS];
59
static int nt_modes_count;
60
static int force_l1_up;
61
static struct proc_dir_entry *hfc_proc_zaphfc_dir;
62
63
#ifdef DEBUG
64
int debug_level;
65
#endif
66
67
#ifndef FALSE
68
#define FALSE 0
69
#endif
70
#ifndef TRUE
71
#define TRUE (!FALSE)
72
#endif
73
74
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
75
#define SET_PROC_DIRENTRY_OWNER(p) do { (p)->owner = THIS_MODULE; } while(0);
76
#else
77
#define SET_PROC_DIRENTRY_OWNER(p) do { } while(0);
78
#endif
79
80
static struct pci_device_id hfc_pci_ids[] = {
81
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_2BD0,
82
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
83
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B000,
84
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
85
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B006,
86
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
87
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B007,
88
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
89
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B008,
90
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
91
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B009,
92
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
93
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B00A,
94
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
95
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B00B,
96
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
97
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B00C,
98
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
99
{PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B100,
100
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
101
{PCI_VENDOR_ID_ABOCOM, PCI_DEVICE_ID_ABOCOM_2BD1,
102
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
103
{PCI_VENDOR_ID_ASUSTEK, PCI_DEVICE_ID_ASUSTEK_0675,
104
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
105
{PCI_VENDOR_ID_BERKOM, PCI_DEVICE_ID_BERKOM_T_CONCEPT,
106
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
107
{PCI_VENDOR_ID_BERKOM, PCI_DEVICE_ID_BERKOM_A1T,
108
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
109
{PCI_VENDOR_ID_ANIGMA, PCI_DEVICE_ID_ANIGMA_MC145575,
110
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
111
{PCI_VENDOR_ID_ZOLTRIX, PCI_DEVICE_ID_ZOLTRIX_2BD0,
112
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
113
{PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_E,
114
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
115
{PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_E,
116
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
117
{PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_A,
118
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
119
{PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_A,
120
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
121
{PCI_VENDOR_ID_SITECOM, PCI_DEVICE_ID_SITECOM_3069,
122
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
123
{0,}
124
};
125
126
MODULE_DEVICE_TABLE(pci, hfc_pci_ids);
127
128
static int __devinit hfc_probe(struct pci_dev *dev
129
, const struct pci_device_id *ent);
130
static void __devexit hfc_remove(struct pci_dev *dev);
131
132
static struct pci_driver hfc_driver = {
133
.name = hfc_DRIVER_NAME,
134
.id_table = hfc_pci_ids,
135
.probe = hfc_probe,
136
.remove = hfc_remove,
137
};
138
139
/******************************************
140
* HW routines
141
******************************************/
142
143
static void hfc_softreset(struct hfc_card *card)
144
{
145
printk(KERN_INFO hfc_DRIVER_PREFIX
146
"card %d: "
147
"resetting\n",
148
card->cardnum);
149
150
/*
151
* Softreset procedure. Put it on, wait and off again
152
*/
153
hfc_outb(card, hfc_CIRM, hfc_CIRM_RESET);
154
udelay(6);
155
hfc_outb(card, hfc_CIRM, 0);
156
157
set_current_state(TASK_UNINTERRUPTIBLE);
158
schedule_timeout((hfc_RESET_DELAY * HZ) / 1000);
159
}
160
161
static void hfc_resetCard(struct hfc_card *card)
162
{
163
card->regs.m1 = 0;
164
hfc_outb(card, hfc_INT_M1, card->regs.m1);
165
166
card->regs.m2 = 0;
167
hfc_outb(card, hfc_INT_M2, card->regs.m2);
168
169
hfc_softreset(card);
170
171
card->regs.trm = 0;
172
hfc_outb(card, hfc_TRM, card->regs.trm);
173
174
/*
175
* Select the non-capacitive line mode for the S/T interface
176
*/
177
card->regs.sctrl = hfc_SCTRL_NONE_CAP;
178
179
if (card->nt_mode) {
180
/*
181
* ST-Bit delay for NT-Mode
182
*/
183
hfc_outb(card, hfc_CLKDEL, hfc_CLKDEL_NT);
184
185
card->regs.sctrl |= hfc_SCTRL_MODE_NT;
186
} else {
187
/*
188
* ST-Bit delay for TE-Mode
189
*/
190
hfc_outb(card, hfc_CLKDEL, hfc_CLKDEL_TE);
191
192
card->regs.sctrl |= hfc_SCTRL_MODE_TE;
193
}
194
195
hfc_outb(card, hfc_SCTRL, card->regs.sctrl);
196
197
/*
198
* S/T Auto awake
199
*/
200
card->regs.sctrl_e = hfc_SCTRL_E_AUTO_AWAKE;
201
hfc_outb(card, hfc_SCTRL_E, card->regs.sctrl_e);
202
203
/*
204
* No B-channel enabled at startup
205
*/
206
card->regs.sctrl_r = 0;
207
hfc_outb(card, hfc_SCTRL_R, card->regs.sctrl_r);
208
209
/*
210
* HFC Master Mode
211
*/
212
hfc_outb(card, hfc_MST_MODE, hfc_MST_MODE_MASTER);
213
214
/*
215
* Connect internal blocks
216
*/
217
card->regs.connect =
218
hfc_CONNECT_B1_HFC_from_ST |
219
hfc_CONNECT_B1_ST_from_HFC |
220
hfc_CONNECT_B1_GCI_from_HFC |
221
hfc_CONNECT_B2_HFC_from_ST |
222
hfc_CONNECT_B2_ST_from_HFC |
223
hfc_CONNECT_B2_GCI_from_HFC;
224
hfc_outb(card, hfc_CONNECT, card->regs.connect);
225
226
/*
227
* All bchans are HDLC by default, not useful, actually
228
* since mode is set during open()
229
*/
230
hfc_outb(card, hfc_CTMT, 0);
231
232
/*
233
* bit order
234
*/
235
hfc_outb(card, hfc_CIRM, 0);
236
237
/*
238
* Enable D-rx FIFO. At least one FIFO must be enabled (by specs)
239
*/
240
card->regs.fifo_en = hfc_FIFOEN_DRX;
241
hfc_outb(card, hfc_FIFO_EN, card->regs.fifo_en);
242
243
card->late_irqs = 0;
244
245
/*
246
* Clear already pending ints
247
*/
248
hfc_inb(card, hfc_INT_S1);
249
hfc_inb(card, hfc_INT_S2);
250
251
/*
252
* Enable IRQ output
253
*/
254
card->regs.m1 = hfc_INTS_DREC | hfc_INTS_L1STATE | hfc_INTS_TIMER;
255
hfc_outb(card, hfc_INT_M1, card->regs.m1);
256
257
card->regs.m2 = hfc_M2_IRQ_ENABLE;
258
hfc_outb(card, hfc_INT_M2, card->regs.m2);
259
260
/*
261
* Unlocks the states machine
262
*/
263
hfc_outb(card, hfc_STATES, 0);
264
265
/*
266
* There's no need to explicitly activate L1 now.
267
* Activation is managed inside the interrupt routine.
268
*/
269
}
270
271
static void hfc_update_fifo_state(struct hfc_card *card)
272
{
273
/*
274
* I'm not sure if irqsave is needed but there could be a race
275
* condition since hfc_update_fifo_state could be called from
276
* both the IRQ handler and the *_(open|close) functions
277
*/
278
279
unsigned long flags;
280
spin_lock_irqsave(&card->chans[B1].lock, flags);
281
if (!card->fifo_suspended &&
282
(card->chans[B1].status == open_framed ||
283
card->chans[B1].status == open_voice)) {
284
285
if (!(card->regs.fifo_en & hfc_FIFOEN_B1RX)) {
286
card->regs.fifo_en |= hfc_FIFOEN_B1RX;
287
hfc_clear_fifo_rx(&card->chans[B1].rx);
288
}
289
290
if (!(card->regs.fifo_en & hfc_FIFOEN_B1TX)) {
291
card->regs.fifo_en |= hfc_FIFOEN_B1TX;
292
hfc_clear_fifo_tx(&card->chans[B1].tx);
293
}
294
} else {
295
if (card->regs.fifo_en & hfc_FIFOEN_B1RX)
296
card->regs.fifo_en &= ~hfc_FIFOEN_B1RX;
297
if (card->regs.fifo_en & hfc_FIFOEN_B1TX)
298
card->regs.fifo_en &= ~hfc_FIFOEN_B1TX;
299
}
300
spin_unlock_irqrestore(&card->chans[B1].lock, flags);
301
302
spin_lock_irqsave(&card->chans[B2].lock, flags);
303
if (!card->fifo_suspended &&
304
(card->chans[B2].status == open_framed ||
305
card->chans[B2].status == open_voice ||
306
card->chans[B2].status == sniff_aux)) {
307
308
if (!(card->regs.fifo_en & hfc_FIFOEN_B2RX)) {
309
card->regs.fifo_en |= hfc_FIFOEN_B2RX;
310
hfc_clear_fifo_rx(&card->chans[B2].rx);
311
}
312
313
if (!(card->regs.fifo_en & hfc_FIFOEN_B2TX)) {
314
card->regs.fifo_en |= hfc_FIFOEN_B2TX;
315
hfc_clear_fifo_tx(&card->chans[B2].tx);
316
}
317
} else {
318
if (card->regs.fifo_en & hfc_FIFOEN_B2RX)
319
card->regs.fifo_en &= ~hfc_FIFOEN_B2RX;
320
if (card->regs.fifo_en & hfc_FIFOEN_B2TX)
321
card->regs.fifo_en &= ~hfc_FIFOEN_B2TX;
322
}
323
spin_unlock_irqrestore(&card->chans[B2].lock, flags);
324
325
spin_lock_irqsave(&card->chans[D].lock, flags);
326
if (!card->fifo_suspended &&
327
card->chans[D].status == open_framed) {
328
329
if (!(card->regs.fifo_en & hfc_FIFOEN_DTX)) {
330
card->regs.fifo_en |= hfc_FIFOEN_DTX;
331
332
card->chans[D].tx.ugly_framebuf_size = 0;
333
card->chans[D].tx.ugly_framebuf_off = 0;
334
}
335
} else {
336
if (card->regs.fifo_en & hfc_FIFOEN_DTX)
337
card->regs.fifo_en &= ~hfc_FIFOEN_DTX;
338
}
339
spin_unlock_irqrestore(&card->chans[D].lock, flags);
340
341
hfc_outb(card, hfc_FIFO_EN, card->regs.fifo_en);
342
}
343
344
static inline void hfc_suspend_fifo(struct hfc_card *card)
345
{
346
card->fifo_suspended = TRUE;
347
348
hfc_update_fifo_state(card);
349
350
/*
351
* When L1 goes down D rx receives garbage; it is nice to
352
* clear it to avoid a CRC error on reactivation
353
* udelay is needed because the FIFO deactivation happens
354
* in 250us
355
*/
356
udelay(250);
357
hfc_clear_fifo_rx(&card->chans[D].rx);
358
359
#ifdef DEBUG
360
if (debug_level >= 3) {
361
printk(KERN_DEBUG hfc_DRIVER_PREFIX
362
"card %d: "
363
"FIFOs suspended\n",
364
card->cardnum);
365
}
366
#endif
367
}
368
369
static inline void hfc_resume_fifo(struct hfc_card *card)
370
{
371
card->fifo_suspended = FALSE;
372
373
hfc_update_fifo_state(card);
374
375
#ifdef DEBUG
376
if (debug_level >= 3) {
377
printk(KERN_DEBUG hfc_DRIVER_PREFIX
378
"card %d: "
379
"FIFOs resumed\n",
380
card->cardnum);
381
}
382
#endif
383
}
384
385
static void hfc_check_l1_up(struct hfc_card *card)
386
{
387
if ((!card->nt_mode && card->l1_state != 7)
388
|| (card->nt_mode && card->l1_state != 3)) {
389
390
hfc_outb(card, hfc_STATES, hfc_STATES_DO_ACTION |
391
hfc_STATES_ACTIVATE|
392
hfc_STATES_NT_G2_G3);
393
394
/*
395
* 0 because this is quite verbose when an inferface is unconnected, jaw
396
*/
397
#if 0
398
if (debug_level >= 1) {
399
printk(KERN_DEBUG hfc_DRIVER_PREFIX
400
"card %d: "
401
"L1 is down, bringing up L1.\n",
402
card->cardnum);
403
}
404
#endif
405
}
406
}
407
408
409
/*******************
410
* Dahdi interface *
411
*******************/
412
413
static int hfc_zap_open(struct dahdi_chan *zaptel_chan)
414
{
415
struct hfc_chan_duplex *chan = zaptel_chan->pvt;
416
struct hfc_card *card = chan->card;
417
418
spin_lock(&chan->lock);
419
420
switch (chan->number) {
421
case D:
422
if (chan->status != free &&
423
chan->status != open_framed) {
424
spin_unlock(&chan->lock);
425
return -EBUSY;
426
}
427
chan->status = open_framed;
428
break;
429
430
case B1:
431
case B2:
432
if (chan->status != free) {
433
spin_unlock(&chan->lock);
434
return -EBUSY;
435
}
436
chan->status = open_voice;
437
break;
438
}
439
440
chan->open_by_zaptel = TRUE;
441
try_module_get(THIS_MODULE);
442
spin_unlock(&chan->lock);
443
444
switch (chan->number) {
445
case D:
446
break;
447
448
case B1:
449
card->regs.m2 |= hfc_M2_PROC_TRANS;
450
/*
451
* Enable transparent mode
452
*/
453
card->regs.ctmt |= hfc_CTMT_TRANSB1;
454
/*
455
* Reversed bit order
456
*/
457
card->regs.cirm |= hfc_CIRM_B1_REV;
458
/*
459
* Enable transmission
460
*/
461
card->regs.sctrl |= hfc_SCTRL_B1_ENA;
462
/*
463
* Enable reception
464
*/
465
card->regs.sctrl_r |= hfc_SCTRL_R_B1_ENA;
466
break;
467
468
case B2:
469
card->regs.m2 |= hfc_M2_PROC_TRANS;
470
card->regs.ctmt |= hfc_CTMT_TRANSB2;
471
card->regs.cirm |= hfc_CIRM_B2_REV;
472
card->regs.sctrl |= hfc_SCTRL_B2_ENA;
473
card->regs.sctrl_r |= hfc_SCTRL_R_B2_ENA;
474
break;
475
476
}
477
478
/*
479
* If not already enabled, enable processing transition (8KHz)
480
* interrupt
481
*/
482
hfc_outb(card, hfc_INT_M2, card->regs.m2);
483
hfc_outb(card, hfc_CTMT, card->regs.ctmt);
484
hfc_outb(card, hfc_CIRM, card->regs.cirm);
485
hfc_outb(card, hfc_SCTRL, card->regs.sctrl);
486
hfc_outb(card, hfc_SCTRL_R, card->regs.sctrl_r);
487
488
hfc_update_fifo_state(card);
489
490
printk(KERN_INFO hfc_DRIVER_PREFIX
491
"card %d: "
492
"chan %s opened as %s.\n",
493
card->cardnum,
494
chan->name,
495
zaptel_chan->name);
496
497
return 0;
498
}
499
500
static int hfc_zap_close(struct dahdi_chan *zaptel_chan)
501
{
502
struct hfc_chan_duplex *chan = zaptel_chan->pvt;
503
struct hfc_card *card = chan->card;
504
505
if (!card) {
506
printk(KERN_CRIT hfc_DRIVER_PREFIX
507
"hfc_zap_close called with NULL card\n");
508
return -1;
509
}
510
511
spin_lock(&chan->lock);
512
513
if (chan->status == free) {
514
spin_unlock(&chan->lock);
515
return -EINVAL;
516
}
517
518
chan->status = free;
519
chan->open_by_zaptel = FALSE;
520
521
spin_unlock(&chan->lock);
522
523
switch (chan->number) {
524
case D:
525
break;
526
527
case B1:
528
card->regs.ctmt &= ~hfc_CTMT_TRANSB1;
529
card->regs.cirm &= ~hfc_CIRM_B1_REV;
530
card->regs.sctrl &= ~hfc_SCTRL_B1_ENA;
531
card->regs.sctrl_r &= ~hfc_SCTRL_R_B1_ENA;
532
break;
533
534
case B2:
535
card->regs.ctmt &= ~hfc_CTMT_TRANSB2;
536
card->regs.cirm &= ~hfc_CIRM_B2_REV;
537
card->regs.sctrl &= ~hfc_SCTRL_B2_ENA;
538
card->regs.sctrl_r &= ~hfc_SCTRL_R_B2_ENA;
539
break;
540
}
541
542
if (card->chans[B1].status == free &&
543
card->chans[B2].status == free)
544
card->regs.m2 &= ~hfc_M2_PROC_TRANS;
545
546
hfc_outb(card, hfc_INT_M2, card->regs.m2);
547
hfc_outb(card, hfc_CTMT, card->regs.ctmt);
548
hfc_outb(card, hfc_CIRM, card->regs.cirm);
549
hfc_outb(card, hfc_SCTRL, card->regs.sctrl);
550
hfc_outb(card, hfc_SCTRL_R, card->regs.sctrl_r);
551
552
hfc_update_fifo_state(card);
553
554
module_put(THIS_MODULE);
555
556
printk(KERN_INFO hfc_DRIVER_PREFIX
557
"card %d: "
558
"chan %s closed as %s.\n",
559
card->cardnum,
560
chan->name,
561
zaptel_chan->name);
562
563
return 0;
564
}
565
566
static int hfc_zap_rbsbits(struct dahdi_chan *chan, int bits)
567
{
568
return 0;
569
}
570
571
static int hfc_zap_ioctl(struct dahdi_chan *chan,
572
unsigned int cmd, unsigned long data)
573
{
574
switch (cmd) {
575
576
default:
577
return -ENOTTY;
578
}
579
580
return 0;
581
}
582
583
static void hfc_hdlc_hard_xmit(struct dahdi_chan *d_chan)
584
{
585
struct hfc_chan_duplex *chan = d_chan->pvt;
586
struct hfc_card *card = chan->card;
587
struct dahdi_hfc *hfccard = card->ztdev;
588
589
atomic_inc(&hfccard->hdlc_pending);
590
591
}
592
593
static int hfc_zap_startup(struct dahdi_span *span)
594
{
595
struct dahdi_hfc *zthfc = span->pvt;
596
struct hfc_card *hfctmp = zthfc->card;
597
int alreadyrunning;
598
599
if (!hfctmp) {
600
printk(KERN_INFO hfc_DRIVER_PREFIX
601
"card %d: "
602
"no card for span at startup!\n",
603
hfctmp->cardnum);
604
}
605
606
alreadyrunning = span->flags & DAHDI_FLAG_RUNNING;
607
608
if (!alreadyrunning)
609
span->flags |= DAHDI_FLAG_RUNNING;
610
611
return 0;
612
}
613
614
static int hfc_zap_shutdown(struct dahdi_span *span)
615
{
616
return 0;
617
}
618
619
static int hfc_zap_maint(struct dahdi_span *span, int cmd)
620
{
621
return 0;
622
}
623
624
static int hfc_zap_chanconfig(struct dahdi_chan *d_chan, int sigtype)
625
{
626
struct hfc_chan_duplex *chan = d_chan->pvt;
627
struct hfc_card *card = chan->card;
628
struct dahdi_hfc *hfccard = card->ztdev;
629
630
if ((sigtype == DAHDI_SIG_HARDHDLC) && (hfccard->sigchan == d_chan)) {
631
hfccard->sigactive = 0;
632
atomic_set(&hfccard->hdlc_pending, 0);
633
}
634
635
return 0;
636
}
637
638
static int hfc_zap_spanconfig(struct dahdi_span *span,
639
struct dahdi_lineconfig *lc)
640
{
641
span->lineconfig = lc->lineconfig;
642
643
return 0;
644
}
645
646
static int hfc_zap_initialize(struct dahdi_hfc *hfccard)
647
{
648
struct hfc_card *hfctmp = hfccard->card;
649
int i;
650
651
memset(&hfccard->span, 0x0, sizeof(struct dahdi_span));
652
sprintf(hfccard->span.name, "ZTHFC%d", hfctmp->cardnum + 1);
653
sprintf(hfccard->span.desc,
654
"HFC-S PCI A ISDN card %d [%s] ",
655
hfctmp->cardnum,
656
hfctmp->nt_mode ? "NT" : "TE");
657
hfccard->span.spantype = hfctmp->nt_mode ? "NT" : "TE";
658
hfccard->span.manufacturer = "Cologne Chips";
659
hfccard->span.spanconfig = hfc_zap_spanconfig;
660
hfccard->span.chanconfig = hfc_zap_chanconfig;
661
hfccard->span.startup = hfc_zap_startup;
662
hfccard->span.shutdown = hfc_zap_shutdown;
663
hfccard->span.maint = hfc_zap_maint;
664
hfccard->span.rbsbits = hfc_zap_rbsbits;
665
hfccard->span.open = hfc_zap_open;
666
hfccard->span.close = hfc_zap_close;
667
hfccard->span.ioctl = hfc_zap_ioctl;
668
hfccard->span.hdlc_hard_xmit = hfc_hdlc_hard_xmit;
669
hfccard->span.flags = 0;
670
hfccard->span.irq = hfctmp->pcidev->irq;
671
dahdi_copy_string(hfccard->span.devicetype, "HFC-S PCI-A ISDN",
672
sizeof(hfccard->span.devicetype));
673
sprintf(hfccard->span.location, "PCI Bus %02d Slot %02d",
674
hfctmp->pcidev->bus->number,
675
PCI_SLOT(hfctmp->pcidev->devfn) + 1);
676
hfccard->span.chans = hfccard->_chans;
677
hfccard->span.channels = 3;
678
for (i = 0; i < hfccard->span.channels; i++)
679
hfccard->_chans[i] = &hfccard->chans[i];
680
hfccard->span.deflaw = DAHDI_LAW_ALAW;
681
hfccard->span.linecompat = DAHDI_CONFIG_AMI | DAHDI_CONFIG_CCS;
682
hfccard->span.offset = 0;
683
init_waitqueue_head(&hfccard->span.maintq);
684
hfccard->span.pvt = hfccard;
685
686
for (i = 0; i < hfccard->span.channels; i++) {
687
memset(&hfccard->chans[i], 0x0, sizeof(struct dahdi_chan));
688
689
sprintf(hfccard->chans[i].name,
690
"ZTHFC%d/%d/%d",
691
hfctmp->cardnum + 1, 0, i + 1);
692
693
printk(KERN_INFO hfc_DRIVER_PREFIX
694
"card %d: "
695
"registered %s\n",
696
hfctmp->cardnum,
697
hfccard->chans[i].name);
698
699
if (i == hfccard->span.channels - 1) {
700
hfccard->chans[i].sigcap = DAHDI_SIG_HARDHDLC;
701
hfccard->sigchan = &hfccard->chans[DAHDI_D];
702
hfccard->sigactive = 0;
703
atomic_set(&hfccard->hdlc_pending, 0);
704
} else {
705
hfccard->chans[i].sigcap =
706
DAHDI_SIG_CLEAR | DAHDI_SIG_DACS;
707
}
708
709
hfccard->chans[i].chanpos = i + 1;
710
}
711
712
hfccard->chans[DAHDI_D].readchunk =
713
hfctmp->chans[D].rx.zaptel_buffer;
714
715
hfccard->chans[DAHDI_D].writechunk =
716
hfctmp->chans[D].tx.zaptel_buffer;
717
718
hfccard->chans[DAHDI_D].pvt = &hfctmp->chans[D];
719
720
hfccard->chans[DAHDI_B1].readchunk =
721
hfctmp->chans[B1].rx.zaptel_buffer;
722
723
hfccard->chans[DAHDI_B1].writechunk =
724
hfctmp->chans[B1].tx.zaptel_buffer;
725
726
hfccard->chans[DAHDI_B1].pvt = &hfctmp->chans[B1];
727
728
hfccard->chans[DAHDI_B2].readchunk =
729
hfctmp->chans[B2].rx.zaptel_buffer;
730
731
hfccard->chans[DAHDI_B2].writechunk =
732
hfctmp->chans[B2].tx.zaptel_buffer;
733
734
hfccard->chans[DAHDI_B2].pvt = &hfctmp->chans[B2];
735
736
if (dahdi_register(&hfccard->span, 0)) {
737
printk(KERN_CRIT "unable to register zaptel device!\n");
738
return -1;
739
}
740
741
return 0;
742
}
743
744
static void hfc_zap_transmit(struct hfc_chan_simplex *chan)
745
{
746
hfc_fifo_put(chan, chan->zaptel_buffer, DAHDI_CHUNKSIZE);
747
}
748
749
static void hfc_zap_receive(struct hfc_chan_simplex *chan)
750
{
751
hfc_fifo_get(chan, chan->zaptel_buffer, DAHDI_CHUNKSIZE);
752
}
753
754
/******************************************
755
* Interrupt Handler
756
******************************************/
757
758
static void hfc_handle_timer_interrupt(struct hfc_card *card);
759
static void hfc_handle_state_interrupt(struct hfc_card *card);
760
static void hfc_handle_processing_interrupt(struct hfc_card *card);
761
static void hfc_frame_arrived(struct hfc_chan_duplex *chan);
762
static void hfc_handle_voice(struct hfc_card *card);
763
764
#if (KERNEL_VERSION(2, 6, 24) < LINUX_VERSION_CODE)
765
static irqreturn_t hfc_interrupt(int irq, void *dev_id)
766
#else
767
static irqreturn_t hfc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
768
#endif
769
{
770
struct hfc_card *card = dev_id;
771
unsigned long flags;
772
u8 status, s1, s2;
773
774
if (!card) {
775
printk(KERN_CRIT hfc_DRIVER_PREFIX
776
"spurious interrupt (IRQ %d)\n",
777
irq);
778
return IRQ_NONE;
779
}
780
781
spin_lock_irqsave(&card->lock, flags);
782
status = hfc_inb(card, hfc_STATUS);
783
if (!(status & hfc_STATUS_ANYINT)) {
784
/*
785
* maybe we are sharing the irq
786
*/
787
spin_unlock_irqrestore(&card->lock, flags);
788
return IRQ_NONE;
789
}
790
791
/* We used to ingore the IRQ when the card was in processing
792
* state but apparently there is no restriction to access the
793
* card in such state:
794
*
795
* Joerg Ciesielski wrote:
796
* > There is no restriction for the IRQ handler to access
797
* > HFC-S PCI during processing phase. A IRQ latency of 375 us
798
* > is also no problem since there are no interrupt sources in
799
* > HFC-S PCI which must be handled very fast.
800
* > Due to its deep fifos the IRQ latency can be several ms with
801
* > out the risk of loosing data. Even the S/T state interrupts
802
* > must not be handled with a latency less than <5ms.
803
* >
804
* > The processing phase only indicates that HFC-S PCI is
805
* > processing the Fifos as PCI master so that data is read and
806
* > written in the 32k memory window. But there is no restriction
807
* > to access data in the memory window during this time.
808
*
809
* // if (status & hfc_STATUS_PCI_PROC) {
810
* // return IRQ_HANDLED;
811
* // }
812
*/
813
814
s1 = hfc_inb(card, hfc_INT_S1);
815
s2 = hfc_inb(card, hfc_INT_S2);
816
817
if (s1 != 0) {
818
if (s1 & hfc_INTS_TIMER) {
819
/*
820
* timer (bit 7)
821
*/
822
hfc_handle_timer_interrupt(card);
823
}
824
825
if (s1 & hfc_INTS_L1STATE) {
826
/*
827
* state machine (bit 6)
828
*/
829
hfc_handle_state_interrupt(card);
830
}
831
832
if (s1 & hfc_INTS_DREC) {
833
/*
834
* D chan RX (bit 5)
835
*/
836
hfc_frame_arrived(&card->chans[D]);
837
}
838
839
if (s1 & hfc_INTS_B1REC) {
840
/*
841
* B1 chan RX (bit 3)
842
*/
843
hfc_frame_arrived(&card->chans[B1]);
844
}
845
846
if (s1 & hfc_INTS_B2REC) {
847
/*
848
* B2 chan RX (bit 4)
849
*/
850
hfc_frame_arrived(&card->chans[B2]);
851
}
852
853
if (s1 & hfc_INTS_DTRANS) {
854
/*
855
* D chan TX (bit 2)
856
*/
857
}
858
859
if (s1 & hfc_INTS_B1TRANS) {
860
/*
861
* B1 chan TX (bit 0)
862
*/
863
}
864
865
if (s1 & hfc_INTS_B2TRANS) {
866
/*
867
* B2 chan TX (bit 1)
868
*/
869
}
870
871
}
872
873
if (s2 != 0) {
874
if (s2 & hfc_M2_PMESEL) {
875
/*
876
* kaboom irq (bit 7)
877
*
878
* CologneChip says:
879
*
880
* the meaning of this fatal error bit is that HFC-S
881
* PCI as PCI master could not access the PCI bus
882
* within 125us to finish its data processing. If this
883
* happens only very seldom it does not cause big
884
* problems but of course some B-channel or D-channel
885
* data will be corrupted due to this event.
886
*
887
* Unfortunately this bit is only set once after the
888
* problem occurs and can only be reseted by a
889
* software reset. That means it is not easily
890
* possible to check how often this fatal error
891
* happens.
892
*
893
*/
894
895
if (!card->sync_loss_reported) {
896
printk(KERN_CRIT hfc_DRIVER_PREFIX
897
"card %d: "
898
"sync lost, pci performance too low!\n",
899
card->cardnum);
900
901
card->sync_loss_reported = TRUE;
902
}
903
}
904
905
if (s2 & hfc_M2_GCI_MON_REC) {
906
/*
907
* RxR monitor channel (bit 2)
908
*/
909
}
910
911
if (s2 & hfc_M2_GCI_I_CHG) {
912
/*
913
* GCI I-change (bit 1)
914
*/
915
}
916
917
if (s2 & hfc_M2_PROC_TRANS) {
918
/*
919
* processing/non-processing transition (bit 0)
920
*/
921
hfc_handle_processing_interrupt(card);
922
}
923
924
}
925
926
spin_unlock_irqrestore(&card->lock, flags);
927
928
return IRQ_HANDLED;
929
}
930
931
static void hfc_handle_timer_interrupt(struct hfc_card *card)
932
{
933
if (card->ignore_first_timer_interrupt) {
934
card->ignore_first_timer_interrupt = FALSE;
935
return;
936
}
937
938
if ((card->nt_mode && card->l1_state == 3) ||
939
(!card->nt_mode && card->l1_state == 7)) {
940
941
card->regs.ctmt &= ~hfc_CTMT_TIMER_MASK;
942
hfc_outb(card, hfc_CTMT, card->regs.ctmt);
943
944
hfc_resume_fifo(card);
945
}
946
}
947
948
static void hfc_handle_state_interrupt(struct hfc_card *card)
949
{
950
u8 new_state = hfc_inb(card, hfc_STATES) & hfc_STATES_STATE_MASK;
951
952
#ifdef DEBUG
953
if (debug_level >= 1) {
954
printk(KERN_DEBUG hfc_DRIVER_PREFIX
955
"card %d: "
956
"layer 1 state = %c%d\n",
957
card->cardnum,
958
card->nt_mode ? 'G' : 'F',
959
new_state);
960
}
961
#endif
962
963
if (card->nt_mode) {
964
/*
965
* NT mode
966
*/
967
968
if (new_state == 3) {
969
/*
970
* fix to G3 state (see specs)
971
*/
972
hfc_outb(card, hfc_STATES, hfc_STATES_LOAD_STATE | 3);
973
}
974
975
if (new_state == 3 && card->l1_state != 3)
976
hfc_resume_fifo(card);
977
978
if (new_state != 3 && card->l1_state == 3)
979
hfc_suspend_fifo(card);
980
981
} else {
982
if (new_state == 3) {
983
/*
984
* Keep L1 up... zaptel & libpri expects
985
* a always up L1...
986
* Enable only when using an unpatched libpri
987
*/
988
989
if (force_l1_up) {
990
hfc_outb(card, hfc_STATES,
991
hfc_STATES_DO_ACTION |
992
hfc_STATES_ACTIVATE|
993
hfc_STATES_NT_G2_G3);
994
}
995
}
996
997
if (new_state == 7 && card->l1_state != 7) {
998
/*
999
* TE is now active, schedule FIFO activation after
1000
* some time, otherwise the first frames are lost
1001
*/
1002
1003
card->regs.ctmt |= hfc_CTMT_TIMER_50 |
1004
hfc_CTMT_TIMER_CLEAR;
1005
hfc_outb(card, hfc_CTMT, card->regs.ctmt);
1006
1007
/*
1008
* Activating the timer firest an
1009
* interrupt immediately, we
1010
* obviously need to ignore it
1011
*/
1012
card->ignore_first_timer_interrupt = TRUE;
1013
}
1014
1015
if (new_state != 7 && card->l1_state == 7) {
1016
/*
1017
* TE has become inactive, disable FIFO
1018
*/
1019
hfc_suspend_fifo(card);
1020
}
1021
}
1022
1023
card->l1_state = new_state;
1024
}
1025
1026
static void hfc_handle_processing_interrupt(struct hfc_card *card)
1027
{
1028
int available_bytes = 0;
1029
1030
/*
1031
* Synchronize with the first enabled channel
1032
*/
1033
if (card->regs.fifo_en & hfc_FIFOEN_B1RX)
1034
available_bytes = hfc_fifo_used_rx(&card->chans[B1].rx);
1035
if (card->regs.fifo_en & hfc_FIFOEN_B2RX)
1036
available_bytes = hfc_fifo_used_rx(&card->chans[B2].rx);
1037
else
1038
available_bytes = -1;
1039
1040
if ((available_bytes == -1 && card->ticks == 8) ||
1041
available_bytes >= DAHDI_CHUNKSIZE + hfc_RX_FIFO_PRELOAD) {
1042
card->ticks = 0;
1043
1044
if (available_bytes > DAHDI_CHUNKSIZE*2 + hfc_RX_FIFO_PRELOAD) {
1045
card->late_irqs++;
1046
/*
1047
* we are out of sync, clear fifos, jaw
1048
*/
1049
hfc_clear_fifo_rx(&card->chans[B1].rx);
1050
hfc_clear_fifo_tx(&card->chans[B1].tx);
1051
hfc_clear_fifo_rx(&card->chans[B2].rx);
1052
hfc_clear_fifo_tx(&card->chans[B2].tx);
1053
1054
#ifdef DEBUG
1055
if (debug_level >= 4) {
1056
printk(KERN_DEBUG hfc_DRIVER_PREFIX
1057
"card %d: "
1058
"late IRQ, %d bytes late\n",
1059
card->cardnum,
1060
available_bytes -
1061
(DAHDI_CHUNKSIZE +
1062
hfc_RX_FIFO_PRELOAD));
1063
}
1064
#endif
1065
} else {
1066
hfc_handle_voice(card);
1067
}
1068
}
1069
1070
card->ticks++;
1071
}
1072
1073
1074
static void hfc_handle_voice(struct hfc_card *card)
1075
{
1076
struct dahdi_hfc *hfccard = card->ztdev;
1077
int frame_left, res;
1078
unsigned char buf[hfc_HDLC_BUF_LEN];
1079
unsigned int size = sizeof(buf) / sizeof(buf[0]);
1080
1081
1082
if (card->chans[B1].status != open_voice &&
1083
card->chans[B2].status != open_voice)
1084
return;
1085
1086
dahdi_transmit(&hfccard->span);
1087
1088
if (card->regs.fifo_en & hfc_FIFOEN_B1TX)
1089
hfc_zap_transmit(&card->chans[B1].tx);
1090
if (card->regs.fifo_en & hfc_FIFOEN_B2TX)
1091
hfc_zap_transmit(&card->chans[B2].tx);
1092
1093
/*
1094
* dahdi hdlc frame tx
1095
*/
1096
1097
if (atomic_read(&hfccard->hdlc_pending)) {
1098
hfc_check_l1_up(card);
1099
res = dahdi_hdlc_getbuf(hfccard->sigchan, buf, &size);
1100
if (size > 0) {
1101
hfccard->sigactive = 1;
1102
memcpy(card->chans[D].tx.ugly_framebuf +
1103
card->chans[D].tx.ugly_framebuf_size,
1104
buf, size);
1105
card->chans[D].tx.ugly_framebuf_size += size;
1106
if (res != 0) {
1107
hfc_fifo_put_frame(&card->chans[D].tx,
1108
card->chans[D].tx.ugly_framebuf,
1109
card->chans[D].tx.ugly_framebuf_size);
1110
++hfccard->frames_out;
1111
hfccard->sigactive = 0;
1112
card->chans[D].tx.ugly_framebuf_size
1113
= 0;
1114
atomic_dec(&hfccard->hdlc_pending);
1115
}
1116
}
1117
}
1118
/*
1119
* dahdi hdlc frame tx done
1120
*/
1121
1122
if (card->regs.fifo_en & hfc_FIFOEN_B1RX)
1123
hfc_zap_receive(&card->chans[B1].rx);
1124
else
1125
memset(&card->chans[B1].rx.zaptel_buffer, 0x7f,
1126
sizeof(card->chans[B1].rx.zaptel_buffer));
1127
1128
if (card->regs.fifo_en & hfc_FIFOEN_B2RX)
1129
hfc_zap_receive(&card->chans[B2].rx);
1130
else
1131
memset(&card->chans[B2].rx.zaptel_buffer, 0x7f,
1132
sizeof(card->chans[B1].rx.zaptel_buffer));
1133
1134
/*
1135
* Echo cancellation
1136
*/
1137
dahdi_ec_chunk(&hfccard->chans[DAHDI_B1],
1138
card->chans[B1].rx.zaptel_buffer,
1139
card->chans[B1].tx.zaptel_buffer);
1140
dahdi_ec_chunk(&hfccard->chans[DAHDI_B2],
1141
card->chans[B2].rx.zaptel_buffer,
1142
card->chans[B2].tx.zaptel_buffer);
1143
1144
/*
1145
* dahdi hdlc frame rx
1146
*/
1147
if (hfc_fifo_has_frames(&card->chans[D].rx))
1148
hfc_frame_arrived(&card->chans[D]);
1149
1150
if (card->chans[D].rx.ugly_framebuf_size) {
1151
frame_left = card->chans[D].rx.ugly_framebuf_size -
1152
card->chans[D].rx.ugly_framebuf_off ;
1153
if (frame_left > hfc_HDLC_BUF_LEN) {
1154
dahdi_hdlc_putbuf(hfccard->sigchan,
1155
card->chans[D].rx.ugly_framebuf +
1156
card->chans[D].rx.ugly_framebuf_off,
1157
hfc_HDLC_BUF_LEN);
1158
card->chans[D].rx.ugly_framebuf_off +=
1159
hfc_HDLC_BUF_LEN;
1160
} else {
1161
dahdi_hdlc_putbuf(hfccard->sigchan,
1162
card->chans[D].rx.ugly_framebuf +
1163
card->chans[D].rx.ugly_framebuf_off,
1164
frame_left);
1165
dahdi_hdlc_finish(hfccard->sigchan);
1166
card->chans[D].rx.ugly_framebuf_size = 0;
1167
card->chans[D].rx.ugly_framebuf_off = 0;
1168
}
1169
}
1170
/*
1171
* dahdi hdlc frame rx done
1172
*/
1173
1174
if (hfccard->span.flags & DAHDI_FLAG_RUNNING)
1175
dahdi_receive(&hfccard->span);
1176
1177
}
1178
1179
static void hfc_frame_arrived(struct hfc_chan_duplex *chan)
1180
{
1181
struct hfc_card *card = chan->card;
1182
int antiloop = 16;
1183
struct sk_buff *skb;
1184
1185
while (hfc_fifo_has_frames(&chan->rx) && --antiloop) {
1186
int frame_size = hfc_fifo_get_frame_size(&chan->rx);
1187
1188
if (frame_size < 3) {
1189
#ifdef DEBUG
1190
if (debug_level >= 2)
1191
printk(KERN_DEBUG hfc_DRIVER_PREFIX
1192
"card %d: "
1193
"chan %s: "
1194
"invalid frame received, "
1195
"just %d bytes\n",
1196
card->cardnum,
1197
chan->name,
1198
frame_size);
1199
#endif
1200
1201
hfc_fifo_drop_frame(&chan->rx);
1202
1203
1204
continue;
1205
} else if (frame_size == 3) {
1206
#ifdef DEBUG
1207
if (debug_level >= 2)
1208
printk(KERN_DEBUG hfc_DRIVER_PREFIX
1209
"card %d: "
1210
"chan %s: "
1211
"empty frame received\n",
1212
card->cardnum,
1213
chan->name);
1214
#endif
1215
1216
hfc_fifo_drop_frame(&chan->rx);
1217
1218
1219
continue;
1220
}
1221
1222
if (chan->open_by_zaptel &&
1223
card->chans[D].rx.ugly_framebuf_size) {
1224
1225
/*
1226
* We have to wait for Dahdi to transmit the
1227
* frame... wait for next time
1228
*/
1229
1230
break;
1231
}
1232
1233
skb = dev_alloc_skb(frame_size - 3);
1234
1235
if (!skb) {
1236
printk(KERN_ERR hfc_DRIVER_PREFIX
1237
"card %d: "
1238
"chan %s: "
1239
"cannot allocate skb: frame dropped\n",
1240
card->cardnum,
1241
chan->name);
1242
1243
hfc_fifo_drop_frame(&chan->rx);
1244
1245
1246
continue;
1247
}
1248
1249
1250
/*
1251
* HFC does the checksum
1252
*/
1253
#ifndef CHECKSUM_HW
1254
skb->ip_summed = CHECKSUM_COMPLETE;
1255
#else
1256
skb->ip_summed = CHECKSUM_HW;
1257
#endif
1258
1259
if (chan->open_by_zaptel) {
1260
card->chans[D].rx.ugly_framebuf_size = frame_size - 1;
1261
1262
if (hfc_fifo_get_frame(&card->chans[D].rx,
1263
card->chans[D].rx.ugly_framebuf,
1264
frame_size - 1) == -1) {
1265
dev_kfree_skb(skb);
1266
continue;
1267
}
1268
1269
memcpy(skb_put(skb, frame_size - 3),
1270
card->chans[D].rx.ugly_framebuf,
1271
frame_size - 3);
1272
} else {
1273
if (hfc_fifo_get_frame(&chan->rx,
1274
skb_put(skb, frame_size - 3),
1275
frame_size - 3) == -1) {
1276
dev_kfree_skb(skb);
1277
continue;
1278
}
1279
}
1280
}
1281
1282
if (!antiloop)
1283
printk(KERN_CRIT hfc_DRIVER_PREFIX
1284
"card %d: "
1285
"Infinite loop detected\n",
1286
card->cardnum);
1287
}
1288
1289
/******************************************
1290
* Module initialization and cleanup
1291
******************************************/
1292
1293
static int __devinit hfc_probe(struct pci_dev *pci_dev,
1294
const struct pci_device_id *ent)
1295
{
1296
static int cardnum;
1297
int err;
1298
int i;
1299
1300
struct hfc_card *card = NULL;
1301
struct dahdi_hfc *zthfc = NULL;
1302
card = kmalloc(sizeof(struct hfc_card), GFP_KERNEL);
1303
if (!card) {
1304
printk(KERN_CRIT hfc_DRIVER_PREFIX
1305
"unable to kmalloc!\n");
1306
err = -ENOMEM;
1307
goto err_alloc_hfccard;
1308
}
1309
1310
memset(card, 0x00, sizeof(struct hfc_card));
1311
card->cardnum = cardnum;
1312
card->pcidev = pci_dev;
1313
spin_lock_init(&card->lock);
1314
1315
pci_set_drvdata(pci_dev, card);
1316
1317
err = pci_enable_device(pci_dev);
1318
if (err)
1319
goto err_pci_enable_device;
1320
1321
err = pci_set_dma_mask(pci_dev, PCI_DMA_32BIT);
1322
if (err) {
1323
printk(KERN_ERR hfc_DRIVER_PREFIX
1324
"card %d: "
1325
"No suitable DMA configuration available.\n",
1326
card->cardnum);
1327
goto err_pci_set_dma_mask;
1328
}
1329
1330
pci_write_config_word(pci_dev, PCI_COMMAND, PCI_COMMAND_MEMORY);
1331
err = pci_request_regions(pci_dev, hfc_DRIVER_NAME);
1332
if (err) {
1333
printk(KERN_CRIT hfc_DRIVER_PREFIX
1334
"card %d: "
1335
"cannot request I/O memory region\n",
1336
card->cardnum);
1337
goto err_pci_request_regions;
1338
}
1339
1340
pci_set_master(pci_dev);
1341
1342
if (!pci_dev->irq) {
1343
printk(KERN_CRIT hfc_DRIVER_PREFIX
1344
"card %d: "
1345
"no irq!\n",
1346
card->cardnum);
1347
err = -ENODEV;
1348
goto err_noirq;
1349
}
1350
1351
card->io_bus_mem = pci_resource_start(pci_dev, 1);
1352
if (!card->io_bus_mem) {
1353
printk(KERN_CRIT hfc_DRIVER_PREFIX
1354
"card %d: "
1355
"no iomem!\n",
1356
card->cardnum);
1357
err = -ENODEV;
1358
goto err_noiobase;
1359
}
1360
1361
card->io_mem = ioremap(card->io_bus_mem, hfc_PCI_MEM_SIZE);
1362
if (!(card->io_mem)) {
1363
printk(KERN_CRIT hfc_DRIVER_PREFIX
1364
"card %d: "
1365
"cannot ioremap I/O memory\n",
1366
card->cardnum);
1367
err = -ENODEV;
1368
goto err_ioremap;
1369
}
1370
1371
/*
1372
* pci_alloc_consistent guarantees alignment
1373
* (Documentation/DMA-mapping.txt)
1374
*/
1375
card->fifo_mem = pci_alloc_consistent(pci_dev,
1376
hfc_FIFO_SIZE, &card->fifo_bus_mem);
1377
if (!card->fifo_mem) {
1378
printk(KERN_CRIT hfc_DRIVER_PREFIX
1379
"card %d: "
1380
"unable to allocate FIFO DMA memory!\n",
1381
card->cardnum);
1382
err = -ENOMEM;
1383
goto err_alloc_fifo;
1384
}
1385
1386
memset(card->fifo_mem, 0x00, hfc_FIFO_SIZE);
1387
1388
card->fifos = card->fifo_mem;
1389
1390
pci_write_config_dword(card->pcidev, hfc_PCI_MWBA, card->fifo_bus_mem);
1391
1392
err = request_irq(card->pcidev->irq, &hfc_interrupt,
1393
1394
#if (KERNEL_VERSION(2, 6, 23) < LINUX_VERSION_CODE)
1395
IRQF_SHARED, hfc_DRIVER_NAME, card);
1396
#else
1397
SA_SHIRQ, hfc_DRIVER_NAME, card);
1398
#endif
1399
1400
if (err) {
1401
printk(KERN_CRIT hfc_DRIVER_PREFIX
1402
"card %d: "
1403
"unable to register irq\n",
1404
card->cardnum);
1405
goto err_request_irq;
1406
}
1407
1408
card->nt_mode = FALSE;
1409
1410
if (modes & (1 << card->cardnum))
1411
card->nt_mode = TRUE;
1412
1413
for (i = 0; i < nt_modes_count; i++) {
1414
if (nt_modes[i] == card->cardnum)
1415
card->nt_mode = TRUE;
1416
}
1417
1418
/*
1419
* D Channel
1420
*/
1421
card->chans[D].card = card;
1422
card->chans[D].name = "D";
1423
card->chans[D].status = free;
1424
card->chans[D].number = D;
1425
spin_lock_init(&card->chans[D].lock);
1426
1427
card->chans[D].rx.chan = &card->chans[D];
1428
card->chans[D].rx.fifo_base = card->fifos + 0x4000;
1429
card->chans[D].rx.z_base = card->fifos + 0x4000;
1430
card->chans[D].rx.z1_base = card->fifos + 0x6080;
1431
card->chans[D].rx.z2_base = card->fifos + 0x6082;
1432
card->chans[D].rx.z_min = 0x0000;
1433
card->chans[D].rx.z_max = 0x01FF;
1434
card->chans[D].rx.f_min = 0x10;
1435
card->chans[D].rx.f_max = 0x1F;
1436
card->chans[D].rx.f1 = card->fifos + 0x60a0;
1437
card->chans[D].rx.f2 = card->fifos + 0x60a1;
1438
card->chans[D].rx.fifo_size = card->chans[D].rx.z_max
1439
- card->chans[D].rx.z_min + 1;
1440
card->chans[D].rx.f_num = card->chans[D].rx.f_max
1441
- card->chans[D].rx.f_min + 1;
1442
1443
card->chans[D].tx.chan = &card->chans[D];
1444
card->chans[D].tx.fifo_base = card->fifos + 0x0000;
1445
card->chans[D].tx.z_base = card->fifos + 0x0000;
1446
card->chans[D].tx.z1_base = card->fifos + 0x2080;
1447
card->chans[D].tx.z2_base = card->fifos + 0x2082;
1448
card->chans[D].tx.z_min = 0x0000;
1449
card->chans[D].tx.z_max = 0x01FF;
1450
card->chans[D].tx.f_min = 0x10;
1451
card->chans[D].tx.f_max = 0x1F;
1452
card->chans[D].tx.f1 = card->fifos + 0x20a0;
1453
card->chans[D].tx.f2 = card->fifos + 0x20a1;
1454
card->chans[D].tx.fifo_size = card->chans[D].tx.z_max -
1455
card->chans[D].tx.z_min + 1;
1456
card->chans[D].tx.f_num = card->chans[D].tx.f_max -
1457
card->chans[D].tx.f_min + 1;
1458
1459
/*
1460
* B1 Channel
1461
*/
1462
card->chans[B1].card = card;
1463
card->chans[B1].name = "B1";
1464
card->chans[B1].status = free;
1465
card->chans[B1].number = B1;
1466
card->chans[B1].protocol = 0;
1467
spin_lock_init(&card->chans[B1].lock);
1468
1469
card->chans[B1].rx.chan = &card->chans[B1];
1470
card->chans[B1].rx.fifo_base = card->fifos + 0x4200;
1471
card->chans[B1].rx.z_base = card->fifos + 0x4000;
1472
card->chans[B1].rx.z1_base = card->fifos + 0x6000;
1473
card->chans[B1].rx.z2_base = card->fifos + 0x6002;
1474
card->chans[B1].rx.z_min = 0x0200;
1475
card->chans[B1].rx.z_max = 0x1FFF;
1476
card->chans[B1].rx.f_min = 0x00;
1477
card->chans[B1].rx.f_max = 0x1F;
1478
card->chans[B1].rx.f1 = card->fifos + 0x6080;
1479
card->chans[B1].rx.f2 = card->fifos + 0x6081;
1480
card->chans[B1].rx.fifo_size = card->chans[B1].rx.z_max -
1481
card->chans[B1].rx.z_min + 1;
1482
card->chans[B1].rx.f_num = card->chans[B1].rx.f_max -
1483
card->chans[B1].rx.f_min + 1;
1484
1485
card->chans[B1].tx.chan = &card->chans[B1];
1486
card->chans[B1].tx.fifo_base = card->fifos + 0x0200;
1487
card->chans[B1].tx.z_base = card->fifos + 0x0000;
1488
card->chans[B1].tx.z1_base = card->fifos + 0x2000;
1489
card->chans[B1].tx.z2_base = card->fifos + 0x2002;
1490
card->chans[B1].tx.z_min = 0x0200;
1491
card->chans[B1].tx.z_max = 0x1FFF;
1492
card->chans[B1].tx.f_min = 0x00;
1493
card->chans[B1].tx.f_max = 0x1F;
1494
card->chans[B1].tx.f1 = card->fifos + 0x2080;
1495
card->chans[B1].tx.f2 = card->fifos + 0x2081;
1496
card->chans[B1].tx.fifo_size = card->chans[B1].tx.z_max -
1497
card->chans[B1].tx.z_min + 1;
1498
card->chans[B1].tx.f_num = card->chans[B1].tx.f_max -
1499
card->chans[B1].tx.f_min + 1;
1500
1501
/*
1502
* B2 Channel
1503
*/
1504
card->chans[B2].card = card;
1505
card->chans[B2].name = "B2";
1506
card->chans[B2].status = free;
1507
card->chans[B2].number = B2;
1508
card->chans[B2].protocol = 0;
1509
spin_lock_init(&card->chans[B2].lock);
1510
1511
card->chans[B2].rx.chan = &card->chans[B2];
1512
card->chans[B2].rx.fifo_base = card->fifos + 0x6200,
1513
card->chans[B2].rx.z_base = card->fifos + 0x6000;
1514
card->chans[B2].rx.z1_base = card->fifos + 0x6100;
1515
card->chans[B2].rx.z2_base = card->fifos + 0x6102;
1516
card->chans[B2].rx.z_min = 0x0200;
1517
card->chans[B2].rx.z_max = 0x1FFF;
1518
card->chans[B2].rx.f_min = 0x00;
1519
card->chans[B2].rx.f_max = 0x1F;
1520
card->chans[B2].rx.f1 = card->fifos + 0x6180;
1521
card->chans[B2].rx.f2 = card->fifos + 0x6181;
1522
card->chans[B2].rx.fifo_size = card->chans[B2].rx.z_max -
1523
card->chans[B2].rx.z_min + 1;
1524
card->chans[B2].rx.f_num = card->chans[B2].rx.f_max -
1525
card->chans[B2].rx.f_min + 1;
1526
1527
card->chans[B2].tx.chan = &card->chans[B2];
1528
card->chans[B2].tx.fifo_base = card->fifos + 0x2200;
1529
card->chans[B2].tx.z_base = card->fifos + 0x2000;
1530
card->chans[B2].tx.z1_base = card->fifos + 0x2100;
1531
card->chans[B2].tx.z2_base = card->fifos + 0x2102;
1532
card->chans[B2].tx.z_min = 0x0200;
1533
card->chans[B2].tx.z_max = 0x1FFF;
1534
card->chans[B2].tx.f_min = 0x00;
1535
card->chans[B2].tx.f_max = 0x1F;
1536
card->chans[B2].tx.f1 = card->fifos + 0x2180;
1537
card->chans[B2].tx.f2 = card->fifos + 0x2181;
1538
card->chans[B2].tx.fifo_size = card->chans[B2].tx.z_max -
1539
card->chans[B2].tx.z_min + 1;
1540
card->chans[B2].tx.f_num = card->chans[B2].tx.f_max -
1541
card->chans[B2].tx.f_min + 1;
1542
1543
/*
1544
* All done
1545
*/
1546
1547
zthfc = kmalloc(sizeof(struct dahdi_hfc), GFP_KERNEL);
1548
if (!zthfc) {
1549
printk(KERN_CRIT hfc_DRIVER_PREFIX
1550
"unable to kmalloc!\n");
1551
goto err_request_irq;
1552
}
1553
memset(zthfc, 0x0, sizeof(struct dahdi_hfc));
1554
1555
zthfc->card = card;
1556
hfc_zap_initialize(zthfc);
1557
card->ztdev = zthfc;
1558
1559
snprintf(card->proc_dir_name,
1560
sizeof(card->proc_dir_name),
1561
"%d", card->cardnum);
1562
card->proc_dir = proc_mkdir(card->proc_dir_name, hfc_proc_zaphfc_dir);
1563
SET_PROC_DIRENTRY_OWNER(card->proc_dir);
1564
1565
hfc_resetCard(card);
1566
1567
printk(KERN_INFO hfc_DRIVER_PREFIX
1568
"card %d configured for %s mode at mem %#lx (0x%p) IRQ %u\n",
1569
card->cardnum,
1570
card->nt_mode ? "NT" : "TE",
1571
card->io_bus_mem,
1572
card->io_mem,
1573
card->pcidev->irq);
1574
1575
cardnum++;
1576
1577
return 0;
1578
1579
err_request_irq:
1580
pci_free_consistent(pci_dev, hfc_FIFO_SIZE,
1581
card->fifo_mem, card->fifo_bus_mem);
1582
err_alloc_fifo:
1583
iounmap(card->io_mem);
1584
err_ioremap:
1585
err_noiobase:
1586
err_noirq:
1587
pci_release_regions(pci_dev);
1588
err_pci_request_regions:
1589
err_pci_set_dma_mask:
1590
err_pci_enable_device:
1591
kfree(card);
1592
err_alloc_hfccard:
1593
return err;
1594
}
1595
1596
static void __devexit hfc_remove(struct pci_dev *pci_dev)
1597
{
1598
struct hfc_card *card = pci_get_drvdata(pci_dev);
1599
1600
1601
printk(KERN_INFO hfc_DRIVER_PREFIX
1602
"card %d: "
1603
"shutting down card at %p.\n",
1604
card->cardnum,
1605
card->io_mem);
1606
1607
hfc_softreset(card);
1608
1609
dahdi_unregister(&card->ztdev->span);
1610
1611
1612
/*
1613
* disable memio and bustmaster
1614
*/
1615
pci_write_config_word(pci_dev, PCI_COMMAND, 0);
1616
1617
remove_proc_entry("bufs", card->proc_dir);
1618
remove_proc_entry("fifos", card->proc_dir);
1619
remove_proc_entry("info", card->proc_dir);
1620
remove_proc_entry(card->proc_dir_name, hfc_proc_zaphfc_dir);
1621
1622
free_irq(pci_dev->irq, card);
1623
1624
pci_free_consistent(pci_dev, hfc_FIFO_SIZE,
1625
card->fifo_mem, card->fifo_bus_mem);
1626
1627
iounmap(card->io_mem);
1628
1629
pci_release_regions(pci_dev);
1630
1631
pci_disable_device(pci_dev);
1632
1633
kfree(card);
1634
}
1635
1636
/******************************************
1637
* Module stuff
1638
******************************************/
1639
1640
static int __init hfc_init_module(void)
1641
{
1642
int ret;
1643
1644
printk(KERN_INFO hfc_DRIVER_PREFIX
1645
hfc_DRIVER_STRING " loading\n");
1646
1647
#if (KERNEL_VERSION(2, 6, 26) <= LINUX_VERSION_CODE)
1648
hfc_proc_zaphfc_dir = proc_mkdir(hfc_DRIVER_NAME, NULL);
1649
#else
1650
hfc_proc_zaphfc_dir = proc_mkdir(hfc_DRIVER_NAME, proc_root_driver);
1651
#endif
1652
1653
ret = dahdi_pci_module(&hfc_driver);
1654
return ret;
1655
}
1656
1657
module_init(hfc_init_module);
1658
1659
static void __exit hfc_module_exit(void)
1660
{
1661
pci_unregister_driver(&hfc_driver);
1662
1663
#if (KERNEL_VERSION(2, 6, 26) <= LINUX_VERSION_CODE)
1664
remove_proc_entry(hfc_DRIVER_NAME, NULL);
1665
#else
1666
remove_proc_entry(hfc_DRIVER_NAME, proc_root_driver);
1667
#endif
1668
1669
printk(KERN_INFO hfc_DRIVER_PREFIX
1670
hfc_DRIVER_STRING " unloaded\n");
1671
}
1672
1673
module_exit(hfc_module_exit);
1674
1675
#endif
1676
1677
MODULE_DESCRIPTION(hfc_DRIVER_DESCR);
1678
MODULE_AUTHOR("Jens Wilke <jw_vzaphfc@headissue.com>, "
1679
"Daniele (Vihai) Orlandi <daniele@orlandi.com>, "
1680
"Jose A. Deniz <odicha@hotmail.com>");
1681
MODULE_ALIAS("vzaphfc");
1682
#ifdef MODULE_LICENSE
1683
MODULE_LICENSE("GPL");
1684
#endif
1685
1686
1687
module_param(modes, int, 0444);
1688
1689
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 10)
1690
module_param_array(nt_modes, int, &nt_modes_count, 0444);
1691
#else
1692
module_param_array(nt_modes, int, nt_modes_count, 0444);
1693
#endif
1694
1695
module_param(force_l1_up, int, 0444);
1696
#ifdef DEBUG
1697
module_param(debug_level, int, 0444);
1698
#endif
1699
1700
MODULE_PARM_DESC(modes, "[Deprecated] bit-mask to configure NT mode");
1701
MODULE_PARM_DESC(nt_modes,
1702
"Comma-separated list of card IDs to configure in NT mode");
1703
MODULE_PARM_DESC(force_l1_up, "Don't allow L1 to go down");
1704
#ifdef DEBUG
1705
MODULE_PARM_DESC(debug_level, "Debug verbosity level");
1706
#endif
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