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/* rtl8139.c - etherboot driver for the Realtek 8139 chipset
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ported from the linux driver written by Donald Becker
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by Rainer Bawidamann (Rainer.Bawidamann@informatik.uni-ulm.de) 1999
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This software may be used and distributed according to the terms
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of the GNU Public License, incorporated herein by reference.
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changes to the original driver:
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- removed support for interrupts, switching to polling mode (yuck!)
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- removed support for the 8129 chip (external MII)
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/*********************************************************************/
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/* Revision History */
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/*********************************************************************/
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06 Apr 2001 ken_yap@users.sourceforge.net (Ken Yap)
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Following email from Hyun-Joon Cha, added a disable routine, otherwise
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NIC remains live and can crash the kernel later.
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4 Feb 2000 espenlaub@informatik.uni-ulm.de (Klaus Espenlaub)
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Shuffled things around, removed the leftovers from the 8129 support
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that was in the Linux driver and added a bit more 8139 definitions.
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Moved the 8K receive buffer to a fixed, available address outside the
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0x98000-0x9ffff range. This is a bit of a hack, but currently the only
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way to make room for the Etherboot features that need substantial amounts
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of code like the ANSI console support. Currently the buffer is just below
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0x10000, so this even conforms to the tagged boot image specification,
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which reserves the ranges 0x00000-0x10000 and 0x98000-0xA0000. My
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interpretation of this "reserved" is that Etherboot may do whatever it
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likes, as long as its environment is kept intact (like the BIOS
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variables). Hopefully fixed rtl_poll() once and for all. The symptoms
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were that if Etherboot was left at the boot menu for several minutes, the
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first eth_poll failed. Seems like I am the only person who does this.
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First of all I fixed the debugging code and then set out for a long bug
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hunting session. It took me about a week full time work - poking around
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various places in the driver, reading Don Becker's and Jeff Garzik's Linux
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driver and even the FreeBSD driver (what a piece of crap!) - and
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eventually spotted the nasty thing: the transmit routine was acknowledging
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each and every interrupt pending, including the RxOverrun and RxFIFIOver
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interrupts. This confused the RTL8139 thoroughly. It destroyed the
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Rx ring contents by dumping the 2K FIFO contents right where we wanted to
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get the next packet. Oh well, what fun.
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18 Jan 2000 mdc@thinguin.org (Marty Connor)
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Drastically simplified error handling. Basically, if any error
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in transmission or reception occurs, the card is reset.
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Also, pointed all transmit descriptors to the same buffer to
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save buffer space. This should decrease driver size and avoid
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corruption because of exceeding 32K during runtime.
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28 Jul 1999 (Matthias Meixner - meixner@rbg.informatik.tu-darmstadt.de)
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rtl_poll was quite broken: it used the RxOK interrupt flag instead
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of the RxBufferEmpty flag which often resulted in very bad
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transmission performace - below 1kBytes/s.
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#include "etherboot.h"
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#define RTL_TIMEOUT (1*TICKS_PER_SEC)
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/* PCI Tuning Parameters
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Threshold is bytes transferred to chip before transmission starts. */
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#define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */
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#define RX_FIFO_THRESH 4 /* Rx buffer level before first PCI xfer. */
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#define RX_DMA_BURST 4 /* Maximum PCI burst, '4' is 256 bytes */
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#define TX_DMA_BURST 4 /* Calculate as 16<<val. */
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#define NUM_TX_DESC 4 /* Number of Tx descriptor registers. */
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#define TX_BUF_SIZE ETH_FRAME_LEN /* FCS is added by the chip */
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#define RX_BUF_LEN_IDX 0 /* 0, 1, 2 is allowed - 8,16,32K rx buffer */
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#define RX_BUF_LEN (8192 << RX_BUF_LEN_IDX)
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/* Symbolic offsets to registers. */
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enum RTL8139_registers {
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MAC0=0, /* Ethernet hardware address. */
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MAR0=8, /* Multicast filter. */
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TxStatus0=0x10, /* Transmit status (four 32bit registers). */
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TxAddr0=0x20, /* Tx descriptors (also four 32bit). */
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RxBuf=0x30, RxEarlyCnt=0x34, RxEarlyStatus=0x36,
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ChipCmd=0x37, RxBufPtr=0x38, RxBufAddr=0x3A,
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IntrMask=0x3C, IntrStatus=0x3E,
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TxConfig=0x40, RxConfig=0x44,
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Timer=0x48, /* general-purpose counter. */
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RxMissed=0x4C, /* 24 bits valid, write clears. */
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Cfg9346=0x50, Config0=0x51, Config1=0x52,
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TimerIntrReg=0x54, /* intr if gp counter reaches this value */
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RevisionID=0x5E, /* revision of the RTL8139 chip */
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MII_BMCR=0x62, MII_BMSR=0x64, NWayAdvert=0x66, NWayLPAR=0x68,
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DisconnectCnt=0x6C, FalseCarrierCnt=0x6E,
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RxCnt=0x72, /* packet received counter */
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CSCR=0x74, /* chip status and configuration register */
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PhyParm1=0x78,TwisterParm=0x7c,PhyParm2=0x80, /* undocumented */
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/* from 0x84 onwards are a number of power management/wakeup frame
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* definitions we will probably never need to know about. */
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CmdReset=0x10, CmdRxEnb=0x08, CmdTxEnb=0x04, RxBufEmpty=0x01, };
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/* Interrupt register bits, using my own meaningful names. */
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enum IntrStatusBits {
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PCIErr=0x8000, PCSTimeout=0x4000, CableLenChange= 0x2000,
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RxFIFOOver=0x40, RxUnderrun=0x20, RxOverflow=0x10,
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TxErr=0x08, TxOK=0x04, RxErr=0x02, RxOK=0x01,
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TxHostOwns=0x2000, TxUnderrun=0x4000, TxStatOK=0x8000,
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TxOutOfWindow=0x20000000, TxAborted=0x40000000,
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TxCarrierLost=0x80000000,
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RxMulticast=0x8000, RxPhysical=0x4000, RxBroadcast=0x2000,
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RxBadSymbol=0x0020, RxRunt=0x0010, RxTooLong=0x0008, RxCRCErr=0x0004,
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RxBadAlign=0x0002, RxStatusOK=0x0001,
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enum MediaStatusBits {
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MSRTxFlowEnable=0x80, MSRRxFlowEnable=0x40, MSRSpeed10=0x08,
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MSRLinkFail=0x04, MSRRxPauseFlag=0x02, MSRTxPauseFlag=0x01,
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BMCRReset=0x8000, BMCRSpeed100=0x2000, BMCRNWayEnable=0x1000,
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BMCRRestartNWay=0x0200, BMCRDuplex=0x0100,
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CSCR_LinkOKBit=0x0400, CSCR_LinkChangeBit=0x0800,
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CSCR_LinkStatusBits=0x0f000, CSCR_LinkDownOffCmd=0x003c0,
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CSCR_LinkDownCmd=0x0f3c0,
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/* Bits in RxConfig. */
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AcceptErr=0x20, AcceptRunt=0x10, AcceptBroadcast=0x08,
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AcceptMulticast=0x04, AcceptMyPhys=0x02, AcceptAllPhys=0x01,
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static unsigned int cur_rx,cur_tx;
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/* The RTL8139 can only transmit from a contiguous, aligned memory block. */
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static unsigned char tx_buffer[TX_BUF_SIZE] __attribute__((aligned(4)));
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/* I know that this is a MEGA HACK, but the tagged boot image specification
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* states that we can do whatever we want below 0x10000 - so we do! */
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/* But we still give the user the choice of using an internal buffer
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just in case - Ken */
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#ifdef USE_LOWMEM_BUFFER
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#define rx_ring ((unsigned char *)(0x10000 - (RX_BUF_LEN + 16)))
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static unsigned char rx_ring[RX_BUF_LEN+16] __attribute__((aligned(4)));
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struct nic *rtl8139_probe(struct nic *nic, unsigned short *probeaddrs,
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struct pci_device *pci);
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static int read_eeprom(int location);
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static void rtl_reset(struct nic *nic);
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static void rtl_transmit(struct nic *nic, const char *destaddr,
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unsigned int type, unsigned int len, const char *data);
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static int rtl_poll(struct nic *nic);
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static void rtl_disable(struct nic*);
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struct nic *rtl8139_probe(struct nic *nic, unsigned short *probeaddrs,
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struct pci_device *pci)
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int speed10, fullduplex;
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/* There are enough "RTL8139" strings on the console already, so
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* be brief and concentrate on the interesting pieces of info... */
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/* Mask the bit that says "this is an io addr" */
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ioaddr = probeaddrs[0] & ~3;
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adjust_pci_device(pci);
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/* Bring the chip out of low-power mode. */
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outb(0x00, ioaddr + Config1);
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if (read_eeprom(0) != 0xffff) {
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unsigned short *ap = (unsigned short*)nic->node_addr;
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for (i = 0; i < 3; i++)
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*ap++ = read_eeprom(i + 7);
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unsigned char *ap = (unsigned char*)nic->node_addr;
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for (i = 0; i < ETH_ALEN; i++)
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*ap++ = inb(ioaddr + MAC0 + i);
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speed10 = inb(ioaddr + MediaStatus) & MSRSpeed10;
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fullduplex = inw(ioaddr + MII_BMCR) & BMCRDuplex;
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printf("ioaddr %#hX, addr %! %sMbps %s-duplex\n", ioaddr,
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nic->node_addr, speed10 ? "10" : "100",
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fullduplex ? "full" : "half");
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nic->reset = rtl_reset;
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nic->poll = rtl_poll;
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nic->transmit = rtl_transmit;
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nic->disable = rtl_disable;
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/* Serial EEPROM section. */
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/* EEPROM_Ctrl bits. */
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#define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */
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#define EE_CS 0x08 /* EEPROM chip select. */
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#define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */
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#define EE_WRITE_0 0x00
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#define EE_WRITE_1 0x02
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#define EE_DATA_READ 0x01 /* EEPROM chip data out. */
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#define EE_ENB (0x80 | EE_CS)
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Delay between EEPROM clock transitions.
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No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
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#define eeprom_delay() inl(ee_addr)
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/* The EEPROM commands include the alway-set leading bit. */
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#define EE_WRITE_CMD (5 << 6)
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#define EE_READ_CMD (6 << 6)
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#define EE_ERASE_CMD (7 << 6)
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static int read_eeprom(int location)
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unsigned int retval = 0;
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long ee_addr = ioaddr + Cfg9346;
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int read_cmd = location | EE_READ_CMD;
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outb(EE_ENB & ~EE_CS, ee_addr);
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outb(EE_ENB, ee_addr);
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/* Shift the read command bits out. */
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for (i = 10; i >= 0; i--) {
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int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
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outb(EE_ENB | dataval, ee_addr);
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outb(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
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outb(EE_ENB, ee_addr);
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for (i = 16; i > 0; i--) {
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outb(EE_ENB | EE_SHIFT_CLK, ee_addr);
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retval = (retval << 1) | ((inb(ee_addr) & EE_DATA_READ) ? 1 : 0);
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outb(EE_ENB, ee_addr);
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/* Terminate the EEPROM access. */
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outb(~EE_CS, ee_addr);
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static void rtl_reset(struct nic* nic)
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outb(CmdReset, ioaddr + ChipCmd);
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/* Give the chip 10ms to finish the reset. */
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load_timer2(10*TICKS_PER_MS);
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while ((inb(ioaddr + ChipCmd) & CmdReset) != 0 && timer2_running())
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for (i = 0; i < ETH_ALEN; i++)
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outb(nic->node_addr[i], ioaddr + MAC0 + i);
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/* Must enable Tx/Rx before setting transfer thresholds! */
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outb(CmdRxEnb | CmdTxEnb, ioaddr + ChipCmd);
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outl((RX_FIFO_THRESH<<13) | (RX_BUF_LEN_IDX<<11) | (RX_DMA_BURST<<8),
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ioaddr + RxConfig); /* accept no frames yet! */
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outl((TX_DMA_BURST<<8)|0x03000000, ioaddr + TxConfig);
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/* The Linux driver changes Config1 here to use a different LED pattern
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* for half duplex or full/autodetect duplex (for full/autodetect, the
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* outputs are TX/RX, Link10/100, FULL, while for half duplex it uses
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* TX/RX, Link100, Link10). This is messy, because it doesn't match
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* the inscription on the mounting bracket. It should not be changed
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* from the configuration EEPROM default, because the card manufacturer
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* should have set that to match the card. */
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printf("rx ring address is %X\n",(unsigned long)rx_ring);
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outl((unsigned long)rx_ring, ioaddr + RxBuf);
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/* Start the chip's Tx and Rx process. */
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outl(0, ioaddr + RxMissed);
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outb(AcceptBroadcast|AcceptMyPhys, ioaddr + RxConfig);
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/* If we add multicast support, the MAR0 register would have to be
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* initialized to 0xffffffffffffffff (two 32 bit accesses). Etherboot
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* only needs broadcast (for ARP/RARP/BOOTP/DHCP) and unicast. */
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outb(CmdRxEnb | CmdTxEnb, ioaddr + ChipCmd);
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/* Disable all known interrupts by setting the interrupt mask. */
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outw(0, ioaddr + IntrMask);
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static void rtl_transmit(struct nic *nic, const char *destaddr,
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unsigned int type, unsigned int len, const char *data)
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unsigned int status, to, nstype;
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unsigned long txstatus;
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memcpy(tx_buffer, destaddr, ETH_ALEN);
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memcpy(tx_buffer + ETH_ALEN, nic->node_addr, ETH_ALEN);
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nstype = htons(type);
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memcpy(tx_buffer + 2 * ETH_ALEN, (char*)&nstype, 2);
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memcpy(tx_buffer + ETH_HLEN, data, len);
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printf("sending %d bytes ethtype %hX\n", len, type);
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/* Note: RTL8139 doesn't auto-pad, send minimum payload (another 4
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* bytes are sent automatically for the FCS, totalling to 64 bytes). */
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while (len < ETH_ZLEN) {
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tx_buffer[len++] = '\0';
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outl((unsigned long)tx_buffer, ioaddr + TxAddr0 + cur_tx*4);
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outl(((TX_FIFO_THRESH<<11) & 0x003f0000) | len,
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ioaddr + TxStatus0 + cur_tx*4);
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to = currticks() + RTL_TIMEOUT;
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status = inw(ioaddr + IntrStatus);
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/* Only acknlowledge interrupt sources we can properly handle
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* here - the RxOverflow/RxFIFOOver MUST be handled in the
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* rtl_poll() function. */
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outw(status & (TxOK | TxErr | PCIErr), ioaddr + IntrStatus);
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if ((status & (TxOK | TxErr | PCIErr)) != 0) break;
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} while (currticks() < to);
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txstatus = inl(ioaddr+ TxStatus0 + cur_tx*4);
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cur_tx = (cur_tx + 1) % NUM_TX_DESC;
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printf("tx done (%d ticks), status %hX txstatus %X\n",
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to-currticks(), status, txstatus);
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printf("tx timeout/error (%d ticks), status %hX txstatus %X\n",
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currticks()-to, status, txstatus);
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static int rtl_poll(struct nic *nic)
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unsigned int ring_offs;
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unsigned int rx_size, rx_status;
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if (inb(ioaddr + ChipCmd) & RxBufEmpty) {
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status = inw(ioaddr + IntrStatus);
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/* See below for the rest of the interrupt acknowledges. */
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outw(status & ~(RxFIFOOver | RxOverflow | RxOK), ioaddr + IntrStatus);
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printf("rtl_poll: int %hX ", status);
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ring_offs = cur_rx % RX_BUF_LEN;
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rx_status = *(unsigned int*)(rx_ring + ring_offs);
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rx_size = rx_status >> 16;
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if ((rx_status & (RxBadSymbol|RxRunt|RxTooLong|RxCRCErr|RxBadAlign)) ||
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(rx_size < ETH_ZLEN) || (rx_size > ETH_FRAME_LEN + 4)) {
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printf("rx error %hX\n", rx_status);
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rtl_reset(nic); /* this clears all interrupts still pending */
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/* Received a good packet */
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nic->packetlen = rx_size - 4; /* no one cares about the FCS */
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if (ring_offs+4+rx_size-4 > RX_BUF_LEN) {
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int semi_count = RX_BUF_LEN - ring_offs - 4;
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memcpy(nic->packet, rx_ring + ring_offs + 4, semi_count);
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memcpy(nic->packet+semi_count, rx_ring, rx_size-4-semi_count);
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printf("rx packet %d+%d bytes", semi_count,rx_size-4-semi_count);
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memcpy(nic->packet, rx_ring + ring_offs + 4, nic->packetlen);
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printf("rx packet %d bytes", rx_size-4);
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printf(" at %X type %hhX%hhX rxstatus %hX\n",
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(unsigned long)(rx_ring+ring_offs+4),
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nic->packet[12], nic->packet[13], rx_status);
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cur_rx = (cur_rx + rx_size + 4 + 3) & ~3;
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outw(cur_rx - 16, ioaddr + RxBufPtr);
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/* See RTL8139 Programming Guide V0.1 for the official handling of
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* Rx overflow situations. The document itself contains basically no
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* usable information, except for a few exception handling rules. */
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outw(status & (RxFIFOOver | RxOverflow | RxOK), ioaddr + IntrStatus);
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static void rtl_disable(struct nic *nic)
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outb(CmdReset, ioaddr + ChipCmd);
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load_timer2(10*TICKS_PER_MS);
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while ((inb(ioaddr + ChipCmd) & CmdReset) != 0 && timer2_running())
added
removed
netboot/rtl8139.c
