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;*****************************************************************************
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;* x86inc.asm: x264asm abstraction layer
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;*****************************************************************************
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;* Copyright (C) 2005-2012 x264 project
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;* Authors: Loren Merritt <lorenm@u.washington.edu>
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;* Anton Mitrofanov <BugMaster@narod.ru>
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;* Jason Garrett-Glaser <darkshikari@gmail.com>
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;* Henrik Gramner <hengar-6@student.ltu.se>
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;* Permission to use, copy, modify, and/or distribute this software for any
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;* purpose with or without fee is hereby granted, provided that the above
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;* copyright notice and this permission notice appear in all copies.
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;* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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;* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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;* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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;* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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;* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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;* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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;* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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;*****************************************************************************
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; This is a header file for the x264ASM assembly language, which uses
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; NASM/YASM syntax combined with a large number of macros to provide easy
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; abstraction between different calling conventions (x86_32, win64, linux64).
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; It also has various other useful features to simplify writing the kind of
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; DSP functions that are most often used in x264.
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; Unlike the rest of x264, this file is available under an ISC license, as it
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; has significant usefulness outside of x264 and we want it to be available
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; to the largest audience possible. Of course, if you modify it for your own
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; purposes to add a new feature, we strongly encourage contributing a patch
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; as this feature might be useful for others as well. Send patches or ideas
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; to x264-devel@videolan.org .
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%include "vpx_config.asm"
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%define program_name vp9
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%ifidn __OUTPUT_FORMAT__,win32
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%elifidn __OUTPUT_FORMAT__,win64
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%elifidn __OUTPUT_FORMAT__,x64
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%ifidn __OUTPUT_FORMAT__,elf32
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%elifidn __OUTPUT_FORMAT__,elf64
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%elifidn __OUTPUT_FORMAT__,elf
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%elifidn __OUTPUT_FORMAT__,x64
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%elifidn __OUTPUT_FORMAT__,win64
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%define mangle(x) _ %+ x
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; FIXME: All of the 64bit asm functions that take a stride as an argument
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; via register, assume that the high dword of that register is filled with 0.
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; This is true in practice (since we never do any 64bit arithmetic on strides,
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; and x264's strides are all positive), but is not guaranteed by the ABI.
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; Name of the .rodata section.
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; Kludge: Something on OS X fails to align .rodata even given an align attribute,
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; so use a different read-only section.
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%macro SECTION_RODATA 0-1 16
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%ifidn __OUTPUT_FORMAT__,macho64
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SECTION .text align=%1
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%elifidn __OUTPUT_FORMAT__,macho
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SECTION .text align=%1
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%elifidn __OUTPUT_FORMAT__,aout
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SECTION .rodata align=%1
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; aout does not support align=
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%macro SECTION_TEXT 0-1 16
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%ifidn __OUTPUT_FORMAT__,aout
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SECTION .text align=%1
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; PIC macros are copied from vpx_ports/x86_abi_support.asm. The "define PIC"
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; from original code is added in for 64bit.
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%ifidn __OUTPUT_FORMAT__,elf32
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%define ABI_IS_32BIT 1
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%elifidn __OUTPUT_FORMAT__,macho32
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%define ABI_IS_32BIT 1
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%elifidn __OUTPUT_FORMAT__,win32
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%define ABI_IS_32BIT 1
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%elifidn __OUTPUT_FORMAT__,aout
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%define ABI_IS_32BIT 1
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%define ABI_IS_32BIT 0
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%ifidn __OUTPUT_FORMAT__,elf32
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%define GET_GOT_SAVE_ARG 1
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%define WRT_PLT wrt ..plt
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extern _GLOBAL_OFFSET_TABLE_
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add %1, _GLOBAL_OFFSET_TABLE_ + $$ - %%sub_offset wrt ..gotpc
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%define GLOBAL(x) x + %1 wrt ..gotoff
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%define RESTORE_GOT pop %1
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%elifidn __OUTPUT_FORMAT__,macho32
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%define GET_GOT_SAVE_ARG 1
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%define GLOBAL(x) x + %1 - %%get_got
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%define RESTORE_GOT pop %1
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%define GLOBAL(x) rel x
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%define WRT_PLT wrt ..plt
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%elifidn __OUTPUT_FORMAT__,macho64
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; Done with PIC macros
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; Always use long nops (reduces 0x90 spam in disassembly on x86_32)
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; Macros to eliminate most code duplication between x86_32 and x86_64:
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; Currently this works only for leaf functions which load all their arguments
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; into registers at the start, and make no other use of the stack. Luckily that
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; covers most of x264's asm.
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; %1 = number of arguments. loads them from stack if needed.
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; %2 = number of registers used. pushes callee-saved regs if needed.
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; %3 = number of xmm registers used. pushes callee-saved xmm regs if needed.
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; %4 = list of names to define to registers
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; PROLOGUE can also be invoked by adding the same options to cglobal
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; cglobal foo, 2,3,0, dst, src, tmp
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; declares a function (foo), taking two args (dst and src) and one local variable (tmp)
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; TODO Some functions can use some args directly from the stack. If they're the
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; last args then you can just not declare them, but if they're in the middle
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; we need more flexible macro.
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; Pops anything that was pushed by PROLOGUE, and returns.
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; Same, but if it doesn't pop anything it becomes a 2-byte ret, for athlons
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; which are slow when a normal ret follows a branch.
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; rN and rNq are the native-size register holding function argument N
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; rNd, rNw, rNb are dword, word, and byte size
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; rNm is the original location of arg N (a register or on the stack), dword
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; rNmp is native size
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%macro DECLARE_REG 5-6
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%elif ARCH_X86_64 ; memory
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%define r%1m [rsp + stack_offset + %6]
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%define r%1mp qword r %+ %1m
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%define r%1m [esp + stack_offset + %6]
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%define r%1mp dword r %+ %1m
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%macro DECLARE_REG_SIZE 2
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DECLARE_REG_SIZE ax, al
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DECLARE_REG_SIZE bx, bl
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DECLARE_REG_SIZE cx, cl
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DECLARE_REG_SIZE dx, dl
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DECLARE_REG_SIZE si, sil
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DECLARE_REG_SIZE di, dil
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DECLARE_REG_SIZE bp, bpl
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; t# defines for when per-arch register allocation is more complex than just function arguments
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%macro DECLARE_REG_TMP 1-*
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CAT_XDEFINE t, %%i, r%1
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%macro DECLARE_REG_TMP_SIZE 0-*
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%define t%1q t%1 %+ q
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%define t%1d t%1 %+ d
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%define t%1w t%1 %+ w
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%define t%1b t%1 %+ b
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DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14
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%assign stack_offset stack_offset+gprsize
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%assign stack_offset stack_offset-gprsize
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%macro PUSH_IF_USED 1-*
315
%macro POP_IF_USED 1-*
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%macro LOAD_IF_USED 1-*
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mov r%1, r %+ %1 %+ mp
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%assign stack_offset stack_offset+(%2)
343
%assign stack_offset stack_offset-(%2)
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%macro movsxdifnidn 2
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%macro DEFINE_ARGS 0-*
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CAT_UNDEF arg_name %+ %%i, q
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CAT_UNDEF arg_name %+ %%i, d
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CAT_UNDEF arg_name %+ %%i, w
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CAT_UNDEF arg_name %+ %%i, b
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CAT_UNDEF arg_name %+ %%i, m
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CAT_UNDEF arg_name %+ %%i, mp
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CAT_UNDEF arg_name, %%i
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%xdefine %%stack_offset stack_offset
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%undef stack_offset ; so that the current value of stack_offset doesn't get baked in by xdefine
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%xdefine %1q r %+ %%i %+ q
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%xdefine %1d r %+ %%i %+ d
386
%xdefine %1w r %+ %%i %+ w
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%xdefine %1b r %+ %%i %+ b
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%xdefine %1m r %+ %%i %+ m
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%xdefine %1mp r %+ %%i %+ mp
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CAT_XDEFINE arg_name, %%i, %1
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%xdefine stack_offset %%stack_offset
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%assign n_arg_names %0
398
%if WIN64 ; Windows x64 ;=================================================
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DECLARE_REG 0, rcx, ecx, cx, cl
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DECLARE_REG 1, rdx, edx, dx, dl
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DECLARE_REG 2, R8, R8D, R8W, R8B
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DECLARE_REG 3, R9, R9D, R9W, R9B
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DECLARE_REG 4, R10, R10D, R10W, R10B, 40
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DECLARE_REG 5, R11, R11D, R11W, R11B, 48
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DECLARE_REG 6, rax, eax, ax, al, 56
407
DECLARE_REG 7, rdi, edi, di, dil, 64
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DECLARE_REG 8, rsi, esi, si, sil, 72
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DECLARE_REG 9, rbx, ebx, bx, bl, 80
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DECLARE_REG 10, rbp, ebp, bp, bpl, 88
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DECLARE_REG 11, R12, R12D, R12W, R12B, 96
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DECLARE_REG 12, R13, R13D, R13W, R13B, 104
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DECLARE_REG 13, R14, R14D, R14W, R14B, 112
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DECLARE_REG 14, R15, R15D, R15W, R15B, 120
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%macro PROLOGUE 2-4+ 0 ; #args, #regs, #xmm_regs, arg_names...
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ASSERT regs_used >= num_args
420
ASSERT regs_used <= 15
421
PUSH_IF_USED 7, 8, 9, 10, 11, 12, 13, 14
423
%assign xmm_regs_used 0
427
LOAD_IF_USED 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
431
%macro WIN64_SPILL_XMM 1
432
%assign xmm_regs_used %1
433
ASSERT xmm_regs_used <= 16
434
%if xmm_regs_used > 6
435
SUB rsp, (xmm_regs_used-6)*16+16
436
%assign %%i xmm_regs_used
437
%rep (xmm_regs_used-6)
439
movdqa [rsp + (%%i-6)*16+(~stack_offset&8)], xmm %+ %%i
444
%macro WIN64_RESTORE_XMM_INTERNAL 1
445
%if xmm_regs_used > 6
446
%assign %%i xmm_regs_used
447
%rep (xmm_regs_used-6)
449
movdqa xmm %+ %%i, [%1 + (%%i-6)*16+(~stack_offset&8)]
451
add %1, (xmm_regs_used-6)*16+16
455
%macro WIN64_RESTORE_XMM 1
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WIN64_RESTORE_XMM_INTERNAL %1
457
%assign stack_offset stack_offset-(xmm_regs_used-6)*16+16
458
%assign xmm_regs_used 0
462
WIN64_RESTORE_XMM_INTERNAL rsp
463
POP_IF_USED 14, 13, 12, 11, 10, 9, 8, 7
468
%if regs_used > 7 || xmm_regs_used > 6
475
%elif ARCH_X86_64 ; *nix x64 ;=============================================
477
DECLARE_REG 0, rdi, edi, di, dil
478
DECLARE_REG 1, rsi, esi, si, sil
479
DECLARE_REG 2, rdx, edx, dx, dl
480
DECLARE_REG 3, rcx, ecx, cx, cl
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DECLARE_REG 4, R8, R8D, R8W, R8B
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DECLARE_REG 5, R9, R9D, R9W, R9B
483
DECLARE_REG 6, rax, eax, ax, al, 8
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DECLARE_REG 7, R10, R10D, R10W, R10B, 16
485
DECLARE_REG 8, R11, R11D, R11W, R11B, 24
486
DECLARE_REG 9, rbx, ebx, bx, bl, 32
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DECLARE_REG 10, rbp, ebp, bp, bpl, 40
488
DECLARE_REG 11, R12, R12D, R12W, R12B, 48
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DECLARE_REG 12, R13, R13D, R13W, R13B, 56
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DECLARE_REG 13, R14, R14D, R14W, R14B, 64
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DECLARE_REG 14, R15, R15D, R15W, R15B, 72
493
%macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names...
496
ASSERT regs_used >= num_args
497
ASSERT regs_used <= 15
498
PUSH_IF_USED 9, 10, 11, 12, 13, 14
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LOAD_IF_USED 6, 7, 8, 9, 10, 11, 12, 13, 14
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POP_IF_USED 14, 13, 12, 11, 10, 9
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%else ; X86_32 ;==============================================================
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DECLARE_REG 0, eax, eax, ax, al, 4
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DECLARE_REG 1, ecx, ecx, cx, cl, 8
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DECLARE_REG 2, edx, edx, dx, dl, 12
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DECLARE_REG 3, ebx, ebx, bx, bl, 16
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DECLARE_REG 4, esi, esi, si, null, 20
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DECLARE_REG 5, edi, edi, di, null, 24
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DECLARE_REG 6, ebp, ebp, bp, null, 28
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%macro DECLARE_ARG 1-*
529
%define r%1m [esp + stack_offset + 4*%1 + 4]
530
%define r%1mp dword r%1m
535
DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14
537
%macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names...
543
ASSERT regs_used >= num_args
544
PUSH_IF_USED 3, 4, 5, 6
545
LOAD_IF_USED 0, 1, 2, 3, 4, 5, 6
550
POP_IF_USED 6, 5, 4, 3
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%endif ;======================================================================
565
%macro WIN64_SPILL_XMM 1
567
%macro WIN64_RESTORE_XMM 1
571
;=============================================================================
572
; arch-independent part
573
;=============================================================================
575
%assign function_align 16
578
; Applies any symbol mangling needed for C linkage, and sets up a define such that
579
; subsequent uses of the function name automatically refer to the mangled version.
580
; Appends cpuflags to the function name if cpuflags has been specified.
581
%macro cglobal 1-2+ ; name, [PROLOGUE args]
583
cglobal_internal %1 %+ SUFFIX
585
cglobal_internal %1 %+ SUFFIX, %2
588
%macro cglobal_internal 1-2+
590
%xdefine %1 mangle(program_name %+ _ %+ %1)
591
%xdefine %1.skip_prologue %1 %+ .skip_prologue
592
CAT_XDEFINE cglobaled_, %1, 1
594
%xdefine current_function %1
595
%ifidn __OUTPUT_FORMAT__,elf
596
global %1:function hidden
597
%elifidn __OUTPUT_FORMAT__,elf32
598
global %1:function hidden
599
%elifidn __OUTPUT_FORMAT__,elf64
600
global %1:function hidden
601
%elifidn __OUTPUT_FORMAT__,macho32
602
global %1:private_extern
603
%elifidn __OUTPUT_FORMAT__,macho64
604
global %1:private_extern
610
RESET_MM_PERMUTATION ; not really needed, but makes disassembly somewhat nicer
611
%assign stack_offset 0
618
%xdefine %1 mangle(program_name %+ _ %+ %1)
619
CAT_XDEFINE cglobaled_, %1, 1
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; like cextern, but without the prefix
624
%macro cextern_naked 1
625
%xdefine %1 mangle(%1)
626
CAT_XDEFINE cglobaled_, %1, 1
631
%xdefine %1 mangle(program_name %+ _ %+ %1)
636
; This is needed for ELF, otherwise the GNU linker assumes the stack is
637
; executable by default.
638
%ifidn __OUTPUT_FORMAT__,elf
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SECTION .note.GNU-stack noalloc noexec nowrite progbits
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%elifidn __OUTPUT_FORMAT__,elf32
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SECTION .note.GNU-stack noalloc noexec nowrite progbits
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%elifidn __OUTPUT_FORMAT__,elf64
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SECTION .note.GNU-stack noalloc noexec nowrite progbits
648
%assign cpuflags_mmx (1<<0)
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%assign cpuflags_mmx2 (1<<1) | cpuflags_mmx
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%assign cpuflags_3dnow (1<<2) | cpuflags_mmx
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%assign cpuflags_3dnow2 (1<<3) | cpuflags_3dnow
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%assign cpuflags_sse (1<<4) | cpuflags_mmx2
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%assign cpuflags_sse2 (1<<5) | cpuflags_sse
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%assign cpuflags_sse2slow (1<<6) | cpuflags_sse2
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%assign cpuflags_sse3 (1<<7) | cpuflags_sse2
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%assign cpuflags_ssse3 (1<<8) | cpuflags_sse3
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%assign cpuflags_sse4 (1<<9) | cpuflags_ssse3
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%assign cpuflags_sse42 (1<<10)| cpuflags_sse4
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%assign cpuflags_avx (1<<11)| cpuflags_sse42
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%assign cpuflags_xop (1<<12)| cpuflags_avx
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%assign cpuflags_fma4 (1<<13)| cpuflags_avx
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%assign cpuflags_cache32 (1<<16)
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%assign cpuflags_cache64 (1<<17)
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%assign cpuflags_slowctz (1<<18)
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%assign cpuflags_lzcnt (1<<19)
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%assign cpuflags_misalign (1<<20)
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%assign cpuflags_aligned (1<<21) ; not a cpu feature, but a function variant
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%assign cpuflags_atom (1<<22)
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%define cpuflag(x) ((cpuflags & (cpuflags_ %+ x)) == (cpuflags_ %+ x))
672
%define notcpuflag(x) ((cpuflags & (cpuflags_ %+ x)) != (cpuflags_ %+ x))
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; Takes up to 2 cpuflags from the above list.
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; All subsequent functions (up to the next INIT_CPUFLAGS) is built for the specified cpu.
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; You shouldn't need to invoke this macro directly, it's a subroutine for INIT_MMX &co.
677
%macro INIT_CPUFLAGS 0-2
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%assign cpuflags cpuflags_%1
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%xdefine cpuname %1_%2
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%assign cpuflags cpuflags | cpuflags_%2
685
%xdefine SUFFIX _ %+ cpuname
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%assign avx_enabled 1
689
%if mmsize == 16 && notcpuflag(sse2)
692
%define movnta movntps
717
%assign avx_enabled 0
718
%define RESET_MM_PERMUTATION INIT_MMX %1
724
%define movnta movntq
727
CAT_XDEFINE m, %%i, mm %+ %%i
728
CAT_XDEFINE nmm, %%i, %%i
740
%assign avx_enabled 0
741
%define RESET_MM_PERMUTATION INIT_XMM %1
745
%define num_mmregs 16
750
%define movnta movntdq
753
CAT_XDEFINE m, %%i, xmm %+ %%i
754
CAT_XDEFINE nxmm, %%i, %%i
760
; FIXME: INIT_AVX can be replaced by INIT_XMM avx
763
%assign avx_enabled 1
764
%define PALIGNR PALIGNR_SSSE3
765
%define RESET_MM_PERMUTATION INIT_AVX
769
%assign avx_enabled 1
770
%define RESET_MM_PERMUTATION INIT_YMM %1
774
%define num_mmregs 16
779
%define movnta vmovntps
782
CAT_XDEFINE m, %%i, ymm %+ %%i
783
CAT_XDEFINE nymm, %%i, %%i
791
; I often want to use macros that permute their arguments. e.g. there's no
792
; efficient way to implement butterfly or transpose or dct without swapping some
795
; I would like to not have to manually keep track of the permutations:
796
; If I insert a permutation in the middle of a function, it should automatically
797
; change everything that follows. For more complex macros I may also have multiple
798
; implementations, e.g. the SSE2 and SSSE3 versions may have different permutations.
800
; Hence these macros. Insert a PERMUTE or some SWAPs at the end of a macro that
801
; permutes its arguments. It's equivalent to exchanging the contents of the
802
; registers, except that this way you exchange the register names instead, so it
803
; doesn't cost any cycles.
805
%macro PERMUTE 2-* ; takes a list of pairs to swap
820
%macro SWAP 2-* ; swaps a single chain (sometimes more concise than pairs)
826
CAT_XDEFINE n, m%1, %1
827
CAT_XDEFINE n, m%2, %2
829
; If we were called as "SWAP m0,m1" rather than "SWAP 0,1" infer the original numbers here.
830
; Be careful using this mode in nested macros though, as in some cases there may be
831
; other copies of m# that have already been dereferenced and don't get updated correctly.
832
%xdefine %%n1 n %+ %1
833
%xdefine %%n2 n %+ %2
834
%xdefine tmp m %+ %%n1
835
CAT_XDEFINE m, %%n1, m %+ %%n2
836
CAT_XDEFINE m, %%n2, tmp
837
CAT_XDEFINE n, m %+ %%n1, %%n1
838
CAT_XDEFINE n, m %+ %%n2, %%n2
845
; If SAVE_MM_PERMUTATION is placed at the end of a function, then any later
846
; calls to that function will automatically load the permutation, so values can
847
; be returned in mmregs.
848
%macro SAVE_MM_PERMUTATION 0-1
852
%xdefine %%f current_function %+ _m
856
CAT_XDEFINE %%f, %%i, m %+ %%i
861
%macro LOAD_MM_PERMUTATION 1 ; name to load from
865
CAT_XDEFINE m, %%i, %1_m %+ %%i
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CAT_XDEFINE n, m %+ %%i, %%i
872
; Append cpuflags to the callee's name iff the appended name is known and the plain name isn't
874
call_internal %1, %1 %+ SUFFIX
876
%macro call_internal 2
884
LOAD_MM_PERMUTATION %%i
887
; Substitutions that reduce instruction size but are functionally equivalent
912
;=============================================================================
913
; AVX abstraction layer
914
;=============================================================================
919
CAT_XDEFINE sizeofmm, i, 8
921
CAT_XDEFINE sizeofxmm, i, 16
922
CAT_XDEFINE sizeofymm, i, 32
928
;%2 == 1 if float, 0 if int
929
;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 2- or 3-operand (xmm, xmm, xmm)
930
;%4 == number of operands given
932
%macro RUN_AVX_INSTR 6-7+
934
%define %%size sizeof%5
936
%define %%size mmsize
946
%define %%regmov movq
948
%define %%regmov movaps
950
%define %%regmov movdqa
955
%if avx_enabled && sizeof%5==16
972
; 3arg AVX ops with a memory arg can only have it in src2,
973
; whereas SSE emulation of 3arg prefers to have it in src1 (i.e. the mov).
974
; So, if the op is symmetric and the wrong one is memory, swap them.
975
%macro RUN_AVX_INSTR1 8
986
%if %%swap && %3 == 0 && %8 == 1
987
RUN_AVX_INSTR %1, %2, %3, %4, %5, %7, %6
989
RUN_AVX_INSTR %1, %2, %3, %4, %5, %6, %7
994
;%2 == 1 if float, 0 if int
995
;%3 == 1 if 4-operand (xmm, xmm, xmm, imm), 0 if 3-operand (xmm, xmm, xmm)
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;%4 == 1 if symmetric (i.e. doesn't matter which src arg is which), 0 if not
998
%macro %1 2-9 fnord, fnord, fnord, %1, %2, %3, %4
1000
RUN_AVX_INSTR %6, %7, %8, 2, %1, %2
1002
RUN_AVX_INSTR1 %6, %7, %8, 3, %1, %2, %3, %9
1004
RUN_AVX_INSTR %6, %7, %8, 4, %1, %2, %3, %4
1006
RUN_AVX_INSTR %6, %7, %8, 5, %1, %2, %3, %4, %5
1011
AVX_INSTR addpd, 1, 0, 1
1012
AVX_INSTR addps, 1, 0, 1
1013
AVX_INSTR addsd, 1, 0, 1
1014
AVX_INSTR addss, 1, 0, 1
1015
AVX_INSTR addsubpd, 1, 0, 0
1016
AVX_INSTR addsubps, 1, 0, 0
1017
AVX_INSTR andpd, 1, 0, 1
1018
AVX_INSTR andps, 1, 0, 1
1019
AVX_INSTR andnpd, 1, 0, 0
1020
AVX_INSTR andnps, 1, 0, 0
1021
AVX_INSTR blendpd, 1, 0, 0
1022
AVX_INSTR blendps, 1, 0, 0
1023
AVX_INSTR blendvpd, 1, 0, 0
1024
AVX_INSTR blendvps, 1, 0, 0
1025
AVX_INSTR cmppd, 1, 0, 0
1026
AVX_INSTR cmpps, 1, 0, 0
1027
AVX_INSTR cmpsd, 1, 0, 0
1028
AVX_INSTR cmpss, 1, 0, 0
1029
AVX_INSTR cvtdq2ps, 1, 0, 0
1030
AVX_INSTR cvtps2dq, 1, 0, 0
1031
AVX_INSTR divpd, 1, 0, 0
1032
AVX_INSTR divps, 1, 0, 0
1033
AVX_INSTR divsd, 1, 0, 0
1034
AVX_INSTR divss, 1, 0, 0
1035
AVX_INSTR dppd, 1, 1, 0
1036
AVX_INSTR dpps, 1, 1, 0
1037
AVX_INSTR haddpd, 1, 0, 0
1038
AVX_INSTR haddps, 1, 0, 0
1039
AVX_INSTR hsubpd, 1, 0, 0
1040
AVX_INSTR hsubps, 1, 0, 0
1041
AVX_INSTR maxpd, 1, 0, 1
1042
AVX_INSTR maxps, 1, 0, 1
1043
AVX_INSTR maxsd, 1, 0, 1
1044
AVX_INSTR maxss, 1, 0, 1
1045
AVX_INSTR minpd, 1, 0, 1
1046
AVX_INSTR minps, 1, 0, 1
1047
AVX_INSTR minsd, 1, 0, 1
1048
AVX_INSTR minss, 1, 0, 1
1049
AVX_INSTR movhlps, 1, 0, 0
1050
AVX_INSTR movlhps, 1, 0, 0
1051
AVX_INSTR movsd, 1, 0, 0
1052
AVX_INSTR movss, 1, 0, 0
1053
AVX_INSTR mpsadbw, 0, 1, 0
1054
AVX_INSTR mulpd, 1, 0, 1
1055
AVX_INSTR mulps, 1, 0, 1
1056
AVX_INSTR mulsd, 1, 0, 1
1057
AVX_INSTR mulss, 1, 0, 1
1058
AVX_INSTR orpd, 1, 0, 1
1059
AVX_INSTR orps, 1, 0, 1
1060
AVX_INSTR packsswb, 0, 0, 0
1061
AVX_INSTR packssdw, 0, 0, 0
1062
AVX_INSTR packuswb, 0, 0, 0
1063
AVX_INSTR packusdw, 0, 0, 0
1064
AVX_INSTR paddb, 0, 0, 1
1065
AVX_INSTR paddw, 0, 0, 1
1066
AVX_INSTR paddd, 0, 0, 1
1067
AVX_INSTR paddq, 0, 0, 1
1068
AVX_INSTR paddsb, 0, 0, 1
1069
AVX_INSTR paddsw, 0, 0, 1
1070
AVX_INSTR paddusb, 0, 0, 1
1071
AVX_INSTR paddusw, 0, 0, 1
1072
AVX_INSTR palignr, 0, 1, 0
1073
AVX_INSTR pand, 0, 0, 1
1074
AVX_INSTR pandn, 0, 0, 0
1075
AVX_INSTR pavgb, 0, 0, 1
1076
AVX_INSTR pavgw, 0, 0, 1
1077
AVX_INSTR pblendvb, 0, 0, 0
1078
AVX_INSTR pblendw, 0, 1, 0
1079
AVX_INSTR pcmpestri, 0, 0, 0
1080
AVX_INSTR pcmpestrm, 0, 0, 0
1081
AVX_INSTR pcmpistri, 0, 0, 0
1082
AVX_INSTR pcmpistrm, 0, 0, 0
1083
AVX_INSTR pcmpeqb, 0, 0, 1
1084
AVX_INSTR pcmpeqw, 0, 0, 1
1085
AVX_INSTR pcmpeqd, 0, 0, 1
1086
AVX_INSTR pcmpeqq, 0, 0, 1
1087
AVX_INSTR pcmpgtb, 0, 0, 0
1088
AVX_INSTR pcmpgtw, 0, 0, 0
1089
AVX_INSTR pcmpgtd, 0, 0, 0
1090
AVX_INSTR pcmpgtq, 0, 0, 0
1091
AVX_INSTR phaddw, 0, 0, 0
1092
AVX_INSTR phaddd, 0, 0, 0
1093
AVX_INSTR phaddsw, 0, 0, 0
1094
AVX_INSTR phsubw, 0, 0, 0
1095
AVX_INSTR phsubd, 0, 0, 0
1096
AVX_INSTR phsubsw, 0, 0, 0
1097
AVX_INSTR pmaddwd, 0, 0, 1
1098
AVX_INSTR pmaddubsw, 0, 0, 0
1099
AVX_INSTR pmaxsb, 0, 0, 1
1100
AVX_INSTR pmaxsw, 0, 0, 1
1101
AVX_INSTR pmaxsd, 0, 0, 1
1102
AVX_INSTR pmaxub, 0, 0, 1
1103
AVX_INSTR pmaxuw, 0, 0, 1
1104
AVX_INSTR pmaxud, 0, 0, 1
1105
AVX_INSTR pminsb, 0, 0, 1
1106
AVX_INSTR pminsw, 0, 0, 1
1107
AVX_INSTR pminsd, 0, 0, 1
1108
AVX_INSTR pminub, 0, 0, 1
1109
AVX_INSTR pminuw, 0, 0, 1
1110
AVX_INSTR pminud, 0, 0, 1
1111
AVX_INSTR pmulhuw, 0, 0, 1
1112
AVX_INSTR pmulhrsw, 0, 0, 1
1113
AVX_INSTR pmulhw, 0, 0, 1
1114
AVX_INSTR pmullw, 0, 0, 1
1115
AVX_INSTR pmulld, 0, 0, 1
1116
AVX_INSTR pmuludq, 0, 0, 1
1117
AVX_INSTR pmuldq, 0, 0, 1
1118
AVX_INSTR por, 0, 0, 1
1119
AVX_INSTR psadbw, 0, 0, 1
1120
AVX_INSTR pshufb, 0, 0, 0
1121
AVX_INSTR psignb, 0, 0, 0
1122
AVX_INSTR psignw, 0, 0, 0
1123
AVX_INSTR psignd, 0, 0, 0
1124
AVX_INSTR psllw, 0, 0, 0
1125
AVX_INSTR pslld, 0, 0, 0
1126
AVX_INSTR psllq, 0, 0, 0
1127
AVX_INSTR pslldq, 0, 0, 0
1128
AVX_INSTR psraw, 0, 0, 0
1129
AVX_INSTR psrad, 0, 0, 0
1130
AVX_INSTR psrlw, 0, 0, 0
1131
AVX_INSTR psrld, 0, 0, 0
1132
AVX_INSTR psrlq, 0, 0, 0
1133
AVX_INSTR psrldq, 0, 0, 0
1134
AVX_INSTR psubb, 0, 0, 0
1135
AVX_INSTR psubw, 0, 0, 0
1136
AVX_INSTR psubd, 0, 0, 0
1137
AVX_INSTR psubq, 0, 0, 0
1138
AVX_INSTR psubsb, 0, 0, 0
1139
AVX_INSTR psubsw, 0, 0, 0
1140
AVX_INSTR psubusb, 0, 0, 0
1141
AVX_INSTR psubusw, 0, 0, 0
1142
AVX_INSTR punpckhbw, 0, 0, 0
1143
AVX_INSTR punpckhwd, 0, 0, 0
1144
AVX_INSTR punpckhdq, 0, 0, 0
1145
AVX_INSTR punpckhqdq, 0, 0, 0
1146
AVX_INSTR punpcklbw, 0, 0, 0
1147
AVX_INSTR punpcklwd, 0, 0, 0
1148
AVX_INSTR punpckldq, 0, 0, 0
1149
AVX_INSTR punpcklqdq, 0, 0, 0
1150
AVX_INSTR pxor, 0, 0, 1
1151
AVX_INSTR shufps, 1, 1, 0
1152
AVX_INSTR subpd, 1, 0, 0
1153
AVX_INSTR subps, 1, 0, 0
1154
AVX_INSTR subsd, 1, 0, 0
1155
AVX_INSTR subss, 1, 0, 0
1156
AVX_INSTR unpckhpd, 1, 0, 0
1157
AVX_INSTR unpckhps, 1, 0, 0
1158
AVX_INSTR unpcklpd, 1, 0, 0
1159
AVX_INSTR unpcklps, 1, 0, 0
1160
AVX_INSTR xorpd, 1, 0, 1
1161
AVX_INSTR xorps, 1, 0, 1
1163
; 3DNow instructions, for sharing code between AVX, SSE and 3DN
1164
AVX_INSTR pfadd, 1, 0, 1
1165
AVX_INSTR pfsub, 1, 0, 0
1166
AVX_INSTR pfmul, 1, 0, 1
1168
; base-4 constants for shuffles
1171
%assign j ((i>>6)&3)*1000 + ((i>>4)&3)*100 + ((i>>2)&3)*10 + (i&3)
1173
CAT_XDEFINE q000, j, i
1175
CAT_XDEFINE q00, j, i
1177
CAT_XDEFINE q0, j, i
1187
%macro %1 4-7 %1, %2, %3
1197
FMA_INSTR pmacsdd, pmulld, paddd
1198
FMA_INSTR pmacsww, pmullw, paddw
1199
FMA_INSTR pmadcswd, pmaddwd, paddd
added
removed
ext/libvpx/upstream/third_party/x86inc/x86inc.asm
