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Viewing changes to ubuntu/i915/i915_drv.c

  • Committer: Package Import Robot
  • Author(s): Paolo Pisati, Paolo Pisati
  • Date: 2013-07-11 18:35:20 UTC
  • Revision ID: package-import@ubuntu.com-20130711183520-htnf1x4y5r11hndr
Tags: 3.5.0-229.42
https://launchpad.net/bugs/1199276
* Release Tracking Bug
  - LP: #1199276

[ Paolo Pisati ]

* [Config] CONFIG_ATH9K_LEGACY_RATE_CONTROL is not set

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Lines of Context:
ubuntu/i915/i915_drv.c
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static const struct pci_device_id pciidlist[] = {               /* aka */
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        INTEL_VGA_DEVICE(0x0402, &intel_haswell_d_info), /* GT1 desktop */
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        INTEL_VGA_DEVICE(0x0412, &intel_haswell_d_info), /* GT2 desktop */
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        INTEL_VGA_DEVICE(0x0422, &intel_haswell_d_info), /* GT2 desktop */
 
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        INTEL_VGA_DEVICE(0x0422, &intel_haswell_d_info), /* GT3 desktop */
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        INTEL_VGA_DEVICE(0x040a, &intel_haswell_d_info), /* GT1 server */
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        INTEL_VGA_DEVICE(0x041a, &intel_haswell_d_info), /* GT2 server */
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        INTEL_VGA_DEVICE(0x042a, &intel_haswell_d_info), /* GT2 server */
 
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        INTEL_VGA_DEVICE(0x042a, &intel_haswell_d_info), /* GT3 server */
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        INTEL_VGA_DEVICE(0x0406, &intel_haswell_m_info), /* GT1 mobile */
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        INTEL_VGA_DEVICE(0x0416, &intel_haswell_m_info), /* GT2 mobile */
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        INTEL_VGA_DEVICE(0x0426, &intel_haswell_m_info), /* GT2 mobile */
 
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        INTEL_VGA_DEVICE(0x040B, &intel_haswell_d_info), /* GT1 reserved */
 
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        INTEL_VGA_DEVICE(0x041B, &intel_haswell_d_info), /* GT2 reserved */
 
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        INTEL_VGA_DEVICE(0x042B, &intel_haswell_d_info), /* GT3 reserved */
 
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        INTEL_VGA_DEVICE(0x040E, &intel_haswell_d_info), /* GT1 reserved */
 
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        INTEL_VGA_DEVICE(0x041E, &intel_haswell_d_info), /* GT2 reserved */
 
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        INTEL_VGA_DEVICE(0x042E, &intel_haswell_d_info), /* GT3 reserved */
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        INTEL_VGA_DEVICE(0x0C02, &intel_haswell_d_info), /* SDV GT1 desktop */
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        INTEL_VGA_DEVICE(0x0C12, &intel_haswell_d_info), /* SDV GT2 desktop */
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        INTEL_VGA_DEVICE(0x0C22, &intel_haswell_d_info), /* SDV GT2 desktop */
 
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        INTEL_VGA_DEVICE(0x0C22, &intel_haswell_d_info), /* SDV GT3 desktop */
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        INTEL_VGA_DEVICE(0x0C0A, &intel_haswell_d_info), /* SDV GT1 server */
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        INTEL_VGA_DEVICE(0x0C1A, &intel_haswell_d_info), /* SDV GT2 server */
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        INTEL_VGA_DEVICE(0x0C2A, &intel_haswell_d_info), /* SDV GT2 server */
 
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        INTEL_VGA_DEVICE(0x0C2A, &intel_haswell_d_info), /* SDV GT3 server */
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        INTEL_VGA_DEVICE(0x0C06, &intel_haswell_m_info), /* SDV GT1 mobile */
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        INTEL_VGA_DEVICE(0x0C16, &intel_haswell_m_info), /* SDV GT2 mobile */
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        INTEL_VGA_DEVICE(0x0C26, &intel_haswell_m_info), /* SDV GT2 mobile */
 
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        INTEL_VGA_DEVICE(0x0C26, &intel_haswell_m_info), /* SDV GT3 mobile */
 
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        INTEL_VGA_DEVICE(0x0C0B, &intel_haswell_d_info), /* SDV GT1 reserved */
 
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        INTEL_VGA_DEVICE(0x0C1B, &intel_haswell_d_info), /* SDV GT2 reserved */
 
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        INTEL_VGA_DEVICE(0x0C2B, &intel_haswell_d_info), /* SDV GT3 reserved */
 
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        INTEL_VGA_DEVICE(0x0C0E, &intel_haswell_d_info), /* SDV GT1 reserved */
 
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        INTEL_VGA_DEVICE(0x0C1E, &intel_haswell_d_info), /* SDV GT2 reserved */
 
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        INTEL_VGA_DEVICE(0x0C2E, &intel_haswell_d_info), /* SDV GT3 reserved */
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        INTEL_VGA_DEVICE(0x0A02, &intel_haswell_d_info), /* ULT GT1 desktop */
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        INTEL_VGA_DEVICE(0x0A12, &intel_haswell_d_info), /* ULT GT2 desktop */
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        INTEL_VGA_DEVICE(0x0A22, &intel_haswell_d_info), /* ULT GT2 desktop */
 
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        INTEL_VGA_DEVICE(0x0A22, &intel_haswell_d_info), /* ULT GT3 desktop */
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        INTEL_VGA_DEVICE(0x0A0A, &intel_haswell_d_info), /* ULT GT1 server */
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        INTEL_VGA_DEVICE(0x0A1A, &intel_haswell_d_info), /* ULT GT2 server */
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        INTEL_VGA_DEVICE(0x0A2A, &intel_haswell_d_info), /* ULT GT2 server */
 
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        INTEL_VGA_DEVICE(0x0A2A, &intel_haswell_d_info), /* ULT GT3 server */
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        INTEL_VGA_DEVICE(0x0A06, &intel_haswell_m_info), /* ULT GT1 mobile */
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        INTEL_VGA_DEVICE(0x0A16, &intel_haswell_m_info), /* ULT GT2 mobile */
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        INTEL_VGA_DEVICE(0x0A26, &intel_haswell_m_info), /* ULT GT2 mobile */
 
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        INTEL_VGA_DEVICE(0x0A26, &intel_haswell_m_info), /* ULT GT3 mobile */
 
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        INTEL_VGA_DEVICE(0x0A0B, &intel_haswell_d_info), /* ULT GT1 reserved */
 
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        INTEL_VGA_DEVICE(0x0A1B, &intel_haswell_d_info), /* ULT GT2 reserved */
 
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        INTEL_VGA_DEVICE(0x0A2B, &intel_haswell_d_info), /* ULT GT3 reserved */
 
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        INTEL_VGA_DEVICE(0x0A0E, &intel_haswell_m_info), /* ULT GT1 reserved */
 
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        INTEL_VGA_DEVICE(0x0A1E, &intel_haswell_m_info), /* ULT GT2 reserved */
 
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        INTEL_VGA_DEVICE(0x0A2E, &intel_haswell_m_info), /* ULT GT3 reserved */
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        INTEL_VGA_DEVICE(0x0D02, &intel_haswell_d_info), /* CRW GT1 desktop */
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        INTEL_VGA_DEVICE(0x0D12, &intel_haswell_d_info), /* CRW GT2 desktop */
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        INTEL_VGA_DEVICE(0x0D22, &intel_haswell_d_info), /* CRW GT2 desktop */
 
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        INTEL_VGA_DEVICE(0x0D22, &intel_haswell_d_info), /* CRW GT3 desktop */
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        INTEL_VGA_DEVICE(0x0D0A, &intel_haswell_d_info), /* CRW GT1 server */
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        INTEL_VGA_DEVICE(0x0D1A, &intel_haswell_d_info), /* CRW GT2 server */
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        INTEL_VGA_DEVICE(0x0D2A, &intel_haswell_d_info), /* CRW GT2 server */
 
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        INTEL_VGA_DEVICE(0x0D2A, &intel_haswell_d_info), /* CRW GT3 server */
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        INTEL_VGA_DEVICE(0x0D06, &intel_haswell_m_info), /* CRW GT1 mobile */
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        INTEL_VGA_DEVICE(0x0D16, &intel_haswell_m_info), /* CRW GT2 mobile */
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        INTEL_VGA_DEVICE(0x0D26, &intel_haswell_m_info), /* CRW GT2 mobile */
 
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        INTEL_VGA_DEVICE(0x0D26, &intel_haswell_m_info), /* CRW GT3 mobile */
 
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        INTEL_VGA_DEVICE(0x0D0B, &intel_haswell_d_info), /* CRW GT1 reserved */
 
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        INTEL_VGA_DEVICE(0x0D1B, &intel_haswell_d_info), /* CRW GT2 reserved */
 
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        INTEL_VGA_DEVICE(0x0D2B, &intel_haswell_d_info), /* CRW GT3 reserved */
 
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        INTEL_VGA_DEVICE(0x0D0E, &intel_haswell_d_info), /* CRW GT1 reserved */
 
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        INTEL_VGA_DEVICE(0x0D1E, &intel_haswell_d_info), /* CRW GT2 reserved */
 
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        INTEL_VGA_DEVICE(0x0D2E, &intel_haswell_d_info), /* CRW GT3 reserved */
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        {0, 0, 0}
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};
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