1
/******************************************************************************
2
* Copyright (c) 2007, 2011 IBM Corporation
4
* This program and the accompanying materials
5
* are made available under the terms of the BSD License
6
* which accompanies this distribution, and is available at
7
* http://www.opensource.org/licenses/bsd-license.php
10
* IBM Corporation - initial implementation
11
*****************************************************************************/
13
* Definitions for the e1000 Gigabit Ethernet Driver for SLOF
16
#include "netdriver_int.h"
21
//#define E1K_DEBUG // main debug switch, w/o it the other ones don't work
22
//#define E1K_SHOW_RCV
23
//#define E1K_SHOW_RCV_DATA
24
//#define E1K_SHOW_XMIT
25
//#define E1K_SHOW_XMIT_DATA
28
* pci register offsets
30
// PCI command register
31
#define PCI_COM_R ((uint16_t) 0x0004)
32
// PCI Cache Line Size register
33
#define PCI_CACHELS_R ((uint16_t) 0x000c)
35
#define PCI_BAR1_R ((uint16_t) 0x0010)
37
#define PCI_BAR2_R ((uint16_t) 0x0014)
39
#define PCI_SUBID_R ((uint16_t) 0x002e)
42
* e1000 register offsets
44
// Device Control register
45
#define CTRL ((uint16_t) 0x0000)
46
// Device Status register
47
#define STATUS ((uint16_t) 0x0008)
48
// Eeprom Read register
49
#define EERD ((uint16_t) 0x0014)
50
// Interrupt Mask Clear register
51
#define IMC ((uint16_t) 0x00d8)
52
// Receive Control register
53
#define RCTL ((uint16_t) 0x0100)
54
// Receive Descriptor Base Address Low register
55
#define RDBAL ((uint16_t) 0x2800)
56
// Receive Descriptor Base Address High register
57
#define RDBAH ((uint16_t) 0x2804)
58
// Receive Descriptor Length register
59
#define RDLEN ((uint16_t) 0x2808)
60
// Receive Descriptor Head register
61
#define RDH ((uint16_t) 0x2810)
62
// Receive Descriptor Tail register
63
#define RDT ((uint16_t) 0x2818)
64
// Receive Delay Timer register
65
#define RDTR ((uint16_t) 0x2820)
66
// Transmit Control register
67
#define TCTL ((uint16_t) 0x0400)
68
// Transmit Descriptor Base Address Low register
69
#define TDBAL ((uint16_t) 0x3800)
70
// Transmit Descriptor Base Address High register
71
#define TDBAH ((uint16_t) 0x3804)
72
// Transmit Descriptor Length register
73
#define TDLEN ((uint16_t) 0x3808)
74
// Transmit Descriptor Head register
75
#define TDH ((uint16_t) 0x3810)
76
// Transmit Descriptor Tail register
77
#define TDT ((uint16_t) 0x3818)
78
// Receive Address Low register
79
#define RAL0 ((uint16_t) 0x5400)
80
// Receive Address High register
81
#define RAH0 ((uint16_t) 0x5404)
87
#define rd08(a) (uint8_t) snk_kernel_interface->io_read((void*)(a),1)
88
#define rd16(a) (uint16_t) snk_kernel_interface->io_read((void*)(a),2)
89
#define rd32(a) (uint32_t) snk_kernel_interface->io_read((void*)(a),4)
90
#define wr08(a,v) snk_kernel_interface->io_write((void*)(a),(uint32_t)(v),1)
91
#define wr16(a,v) snk_kernel_interface->io_write((void*)(a),(uint32_t)(v),2)
92
#define wr32(a,v) snk_kernel_interface->io_write((void*)(a),(uint32_t)(v),4)
93
#define printk snk_kernel_interface->print
94
#define us_delay snk_kernel_interface->us_delay
95
#define ms_delay snk_kernel_interface->ms_delay
97
#define BIT08(bit) ((uint8_t) 0x1 << (bit))
98
#define BIT16(bit) ((uint16_t) 0x1 << (bit))
99
#define BIT32(bit) ((uint32_t) 0x1 << (bit))
106
extern snk_kernel_t *snk_kernel_interface;
114
* memory barrier function implementation
119
asm volatile("sync" ::: "memory");