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/* Optimized mempcpy implementation for POWER7.
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Copyright (C) 2010 Free Software Foundation, Inc.
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Contributed by Luis Machado <luisgpm@br.ibm.com>.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA
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/* __ptr_t [r3] __mempcpy (__ptr_t dst [r3], __ptr_t src [r4], size_t len [r5]);
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Returns 'dst' + 'len'. */
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EALIGN (BP_SYM (__mempcpy), 5, 0)
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ble cr1,L(copy_LT_32) /* If move < 32 bytes use short move
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andi. 11,3,7 /* Check alignment of DST. */
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clrldi 10,4,61 /* Check alignment of SRC. */
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cmpld cr6,10,11 /* SRC and DST alignments match? */
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bne cr6,L(copy_GE_32_unaligned)
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srdi 9,5,3 /* Number of full quadwords remaining. */
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beq L(copy_GE_32_aligned_cont)
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/* Get the SRC aligned to 8 bytes. */
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clrldi 10,12,61 /* Check alignment of SRC again. */
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srdi 9,31,3 /* Number of full doublewords remaining. */
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L(copy_GE_32_aligned_cont):
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/* Copy 1~3 doublewords so the main loop starts
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at a multiple of 32 bytes. */
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1: /* Copy 1 doubleword and set the counter. */
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/* Main aligned copy loop. Copies 32-bytes at a time. */
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/* Check for tail bytes. */
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/* At this point we have a tail of 0-7 bytes and we know that the
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destination is doubleword-aligned. */
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4: /* Copy 4 bytes. */
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2: /* Copy 2 bytes. */
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1: /* Copy 1 byte. */
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0: /* Return DST + LEN pointer. */
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/* Handle copies of 0~31 bytes. */
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/* At least 9 bytes to go. */
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beq L(copy_LT_32_aligned)
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/* Force 4-bytes alignment for SRC. */
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1: bf 31,L(end_4bytes_alignment)
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L(end_4bytes_alignment):
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L(copy_LT_32_aligned):
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/* At least 6 bytes to go, and SRC is word-aligned. */
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8: /* Copy 8 bytes. */
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4: /* Copy 4 bytes. */
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2: /* Copy 2-3 bytes. */
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1: /* Copy 1 byte. */
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0: /* Return DST + LEN pointer. */
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/* Handles copies of 0~8 bytes. */
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/* Though we could've used ld/std here, they are still
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slow for unaligned cases. */
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ld 3,-16(1) /* Return DST + LEN pointer. */
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4: /* Copies 4~7 bytes. */
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5: /* Copy 1 byte. */
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0: /* Return DST + LEN pointer. */
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/* Handle copies of 32+ bytes where DST is aligned (to quadword) but
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SRC is not. Use aligned quadword loads from SRC, shifted to realign
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the data, allowing for aligned DST stores. */
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L(copy_GE_32_unaligned):
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clrldi 0,0,60 /* Number of bytes until the 1st
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andi. 11,3,15 /* Check alignment of DST (against
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srdi 9,5,4 /* Number of full quadwords remaining. */
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beq L(copy_GE_32_unaligned_cont)
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/* SRC is not quadword aligned, get it aligned. */
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/* Vector instructions work best when proper alignment (16-bytes)
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is present. Move 0~15 bytes as needed to get DST quadword-aligned. */
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1: /* Copy 1 byte. */
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2: /* Copy 2 bytes. */
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4: /* Copy 4 bytes. */
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8: /* Copy 8 bytes. */
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clrldi 10,12,60 /* Check alignment of SRC. */
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srdi 9,31,4 /* Number of full quadwords remaining. */
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/* The proper alignment is present, it is OK to copy the bytes now. */
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L(copy_GE_32_unaligned_cont):
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/* Setup two indexes to speed up the indexed vector operations. */
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li 6,16 /* Index for 16-bytes offsets. */
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li 7,32 /* Index for 32-bytes offsets. */
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srdi 8,31,5 /* Setup the loop counter. */
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bf 31,L(setup_unaligned_loop)
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/* Copy another 16 bytes to align to 32-bytes due to the loop . */
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L(setup_unaligned_loop):
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ble cr6,L(end_unaligned_loop)
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/* Copy 32 bytes at a time using vector instructions. */
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/* Note: vr6/vr10 may contain data that was already copied,
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but in order to get proper alignment, we may have to copy
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some portions again. This is faster than having unaligned
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vector instructions though. */
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lvx 4,11,6 /* vr4 = r11+16. */
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vperm 6,3,4,5 /* Merge the correctly-aligned portions
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of vr3/vr4 into vr6. */
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lvx 3,11,7 /* vr3 = r11+32. */
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vperm 10,4,3,5 /* Merge the correctly-aligned portions
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of vr3/vr4 into vr10. */
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bdnz L(unaligned_loop)
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L(end_unaligned_loop):
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/* Check for tail bytes. */
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/* We have 1~15 tail bytes to copy, and DST is quadword aligned. */
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8: /* Copy 8 bytes. */
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4: /* Copy 4 bytes. */
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2: /* Copy 2~3 bytes. */
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1: /* Copy 1 byte. */
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0: /* Return DST + LEN pointer. */
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END_GEN_TB (BP_SYM (__mempcpy),TB_TOCLESS)
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libc_hidden_def (BP_SYM (__mempcpy))
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weak_alias (BP_SYM (__mempcpy), BP_SYM (mempcpy))
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libc_hidden_builtin_def (mempcpy)
added
removed
sysdeps/powerpc/powerpc64/power7/mempcpy.S
