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/**************************************************************************
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* Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
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* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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**************************************************************************/
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/* Provide additional functionality on top of bufmgr buffers:
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* - 2d semantics and blit operations
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* - refcounting of buffers for multiple images in a buffer.
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* - refcounting of buffer mappings.
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* - some logic for moving the buffers to the best memory pools for
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* Most of this is to make it easier to implement the fixed-layout
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* mipmap tree required by intel hardware in the face of GL's
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* programming interface where each image can be specifed in random
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* order and it isn't clear what layout the tree should have until the
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#include <sys/ioctl.h>
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#include "intel_context.h"
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#include "intel_regions.h"
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#include "intel_blit.h"
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#include "intel_buffer_objects.h"
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#include "intel_bufmgr.h"
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#include "intel_batchbuffer.h"
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#include "intel_chipset.h"
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#define FILE_DEBUG_FLAG DEBUG_REGION
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/* XXX: Thread safety?
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intel_region_map(struct intel_context *intel, struct intel_region *region)
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DBG("%s\n", __FUNCTION__);
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if (!region->map_refcount++) {
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intel_region_cow(intel, region);
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dri_bo_map(region->buffer, GL_TRUE);
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region->map = region->buffer->virtual;
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intel_region_unmap(struct intel_context *intel, struct intel_region *region)
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DBG("%s\n", __FUNCTION__);
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if (!--region->map_refcount) {
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dri_bo_unmap(region->buffer);
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static struct intel_region *
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intel_region_alloc_internal(struct intel_context *intel,
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GLuint width, GLuint height, GLuint pitch,
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struct intel_region *region;
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DBG("%s\n", __FUNCTION__);
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region = calloc(sizeof(*region), 1);
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region->width = width;
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region->height = height;
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region->pitch = pitch;
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region->refcount = 1;
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region->buffer = buffer;
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/* Default to no tiling */
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region->tiling = I915_TILING_NONE;
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region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE;
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struct intel_region *
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intel_region_alloc(struct intel_context *intel,
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GLuint cpp, GLuint width, GLuint height, GLuint pitch,
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GLboolean expect_accelerated_upload)
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if (expect_accelerated_upload) {
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buffer = drm_intel_bo_alloc_for_render(intel->bufmgr, "region",
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pitch * cpp * height, 64);
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buffer = drm_intel_bo_alloc(intel->bufmgr, "region",
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pitch * cpp * height, 64);
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return intel_region_alloc_internal(intel, cpp, width, height, pitch, buffer);
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struct intel_region *
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intel_region_alloc_for_handle(struct intel_context *intel,
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GLuint width, GLuint height, GLuint pitch,
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GLuint handle, const char *name)
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struct intel_region *region;
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buffer = intel_bo_gem_create_from_name(intel->bufmgr, name, handle);
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region = intel_region_alloc_internal(intel, cpp,
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width, height, pitch, buffer);
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ret = dri_bo_get_tiling(region->buffer, ®ion->tiling,
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®ion->bit_6_swizzle);
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fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
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handle, name, strerror(-ret));
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intel_region_release(®ion);
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intel_region_reference(struct intel_region **dst, struct intel_region *src)
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DBG("%s %d\n", __FUNCTION__, src->refcount);
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assert(*dst == NULL);
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intel_region_release(struct intel_region **region_handle)
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struct intel_region *region = *region_handle;
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DBG("%s %d\n", __FUNCTION__, region->refcount - 1);
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ASSERT(region->refcount > 0);
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if (region->refcount == 0) {
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assert(region->map_refcount == 0);
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region->pbo->region = NULL;
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dri_bo_unreference(region->buffer);
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if (region->classic_map != NULL) {
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drmUnmap(region->classic_map,
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region->pitch * region->cpp * region->height);
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*region_handle = NULL;
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* XXX Move this into core Mesa?
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_mesa_copy_rect(GLubyte * dst,
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GLuint src_pitch, GLuint src_x, GLuint src_y)
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dst += dst_y * dst_pitch;
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src += src_y * dst_pitch;
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if (width == dst_pitch && width == src_pitch)
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memcpy(dst, src, height * width);
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for (i = 0; i < height; i++) {
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memcpy(dst, src, width);
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/* Upload data to a rectangular sub-region. Lots of choices how to do this:
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* - memcpy by span to current destination
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* - upload data as new buffer and blit
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* Currently always memcpy.
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intel_region_data(struct intel_context *intel,
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struct intel_region *dst,
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GLuint dstx, GLuint dsty,
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const void *src, GLuint src_pitch,
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GLuint srcx, GLuint srcy, GLuint width, GLuint height)
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GLboolean locked = GL_FALSE;
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DBG("%s\n", __FUNCTION__);
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dsty == 0 && width == dst->pitch && height == dst->height)
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intel_region_release_pbo(intel, dst);
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intel_region_cow(intel, dst);
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if (!intel->locked) {
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LOCK_HARDWARE(intel);
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_mesa_copy_rect(intel_region_map(intel, dst) + dst_offset,
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dstx, dsty, width, height, src, src_pitch, srcx, srcy);
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intel_region_unmap(intel, dst);
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UNLOCK_HARDWARE(intel);
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/* Copy rectangular sub-regions. Need better logic about when to
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* push buffers into AGP - will currently do so whenever possible.
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intel_region_copy(struct intel_context *intel,
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struct intel_region *dst,
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GLuint dstx, GLuint dsty,
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struct intel_region *src,
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GLuint srcx, GLuint srcy, GLuint width, GLuint height)
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DBG("%s\n", __FUNCTION__);
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dsty == 0 && width == dst->pitch && height == dst->height)
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intel_region_release_pbo(intel, dst);
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intel_region_cow(intel, dst);
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assert(src->cpp == dst->cpp);
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intelEmitCopyBlit(intel,
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src->pitch, src->buffer, src_offset, src->tiling,
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dst->pitch, dst->buffer, dst_offset, dst->tiling,
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srcx, srcy, dstx, dsty, width, height,
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/* Fill a rectangular sub-region. Need better logic about when to
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* push buffers into AGP - will currently do so whenever possible.
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intel_region_fill(struct intel_context *intel,
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struct intel_region *dst,
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GLuint dstx, GLuint dsty,
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GLuint width, GLuint height, GLuint color)
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DBG("%s\n", __FUNCTION__);
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dsty == 0 && width == dst->pitch && height == dst->height)
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intel_region_release_pbo(intel, dst);
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intel_region_cow(intel, dst);
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intelEmitFillBlit(intel,
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dst->pitch, dst->buffer, dst_offset, dst->tiling,
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dstx, dsty, width, height, color);
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/* Attach to a pbo, discarding our data. Effectively zero-copy upload
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intel_region_attach_pbo(struct intel_context *intel,
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struct intel_region *region,
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struct intel_buffer_object *pbo)
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if (region->pbo == pbo)
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/* If there is already a pbo attached, break the cow tie now.
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* Don't call intel_region_release_pbo() as that would
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* unnecessarily allocate a new buffer we would have to immediately
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region->pbo->region = NULL;
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if (region->buffer) {
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dri_bo_unreference(region->buffer);
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region->buffer = NULL;
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region->pbo->region = region;
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dri_bo_reference(pbo->buffer);
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region->buffer = pbo->buffer;
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/* Break the COW tie to the pbo and allocate a new buffer.
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* The pbo gets to keep the data.
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intel_region_release_pbo(struct intel_context *intel,
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struct intel_region *region)
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assert(region->buffer == region->pbo->buffer);
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region->pbo->region = NULL;
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dri_bo_unreference(region->buffer);
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region->buffer = NULL;
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region->buffer = dri_bo_alloc(intel->bufmgr, "region",
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region->pitch * region->cpp * region->height,
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/* Break the COW tie to the pbo. Both the pbo and the region end up
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* with a copy of the data.
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intel_region_cow(struct intel_context *intel, struct intel_region *region)
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struct intel_buffer_object *pbo = region->pbo;
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GLboolean was_locked = intel->locked;
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intel_region_release_pbo(intel, region);
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assert(region->cpp * region->pitch * region->height == pbo->Base.Size);
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DBG("%s (%d bytes)\n", __FUNCTION__, pbo->Base.Size);
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/* Now blit from the texture buffer to the new buffer:
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was_locked = intel->locked;
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LOCK_HARDWARE(intel);
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intelEmitCopyBlit(intel,
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region->pitch, region->buffer, 0, region->tiling,
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region->pitch, pbo->buffer, 0, region->tiling,
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region->pitch, region->height,
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UNLOCK_HARDWARE(intel);
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intel_region_buffer(struct intel_context *intel,
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struct intel_region *region, GLuint flag)
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if (flag == INTEL_WRITE_PART)
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intel_region_cow(intel, region);
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else if (flag == INTEL_WRITE_FULL)
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intel_region_release_pbo(intel, region);
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return region->buffer;
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static struct intel_region *
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intel_recreate_static(struct intel_context *intel,
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struct intel_region *region,
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intelRegion *region_desc)
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intelScreenPrivate *intelScreen = intel->intelScreen;
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if (region == NULL) {
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region = calloc(sizeof(*region), 1);
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region->refcount = 1;
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if (intel->ctx.Visual.rgbBits == 24)
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region->cpp = intel->ctx.Visual.rgbBits / 8;
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region->pitch = intelScreen->pitch;
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region->height = intelScreen->height; /* needed? */
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if (region->buffer != NULL) {
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dri_bo_unreference(region->buffer);
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region->buffer = NULL;
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assert(region_desc->bo_handle != -1);
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region->buffer = intel_bo_gem_create_from_name(intel->bufmgr,
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region_desc->bo_handle);
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ret = dri_bo_get_tiling(region->buffer, ®ion->tiling,
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®ion->bit_6_swizzle);
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fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
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region_desc->bo_handle, name, strerror(-ret));
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intel_region_release(®ion);
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if (region->classic_map != NULL) {
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drmUnmap(region->classic_map,
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region->pitch * region->cpp * region->height);
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region->classic_map = NULL;
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ret = drmMap(intel->driFd, region_desc->handle,
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region->pitch * region->cpp * region->height,
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®ion->classic_map);
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fprintf(stderr, "Failed to drmMap %s buffer\n", name);
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region->buffer = intel_bo_fake_alloc_static(intel->bufmgr,
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region->pitch * region->cpp *
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region->classic_map);
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/* The sarea just gives us a boolean for whether it's tiled or not,
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* instead of which tiling mode it is. Guess.
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if (region_desc->tiled) {
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if (IS_965(intel->intelScreen->deviceID) &&
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region_desc == &intelScreen->depth)
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region->tiling = I915_TILING_Y;
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region->tiling = I915_TILING_X;
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region->tiling = I915_TILING_NONE;
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region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE;
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assert(region->buffer != NULL);
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* Create intel_region structs to describe the static front, back, and depth
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* buffers created by the xserver.
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* Although FBO's mean we now no longer use these as render targets in
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* all circumstances, they won't go away until the back and depth
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* buffers become private, and the front buffer will remain even then.
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* Note that these don't allocate video memory, just describe
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* allocations alread made by the X server.
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intel_recreate_static_regions(struct intel_context *intel)
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intelScreenPrivate *intelScreen = intel->intelScreen;
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intel->front_region =
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intel_recreate_static(intel, "front",
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&intelScreen->front);
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intel_recreate_static(intel, "back",
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/* Still assumes front.cpp == depth.cpp. We can kill this when we move to
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intel->depth_region =
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intel_recreate_static(intel, "depth",
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&intelScreen->depth);