15
15
#define DCACHE_ALIASING_POSSIBLE
18
#define HPAGE_SHIFT 22
18
#define HPAGE_SHIFT 23
19
#define REAL_HPAGE_SHIFT 22
21
#define REAL_HPAGE_SIZE (_AC(1,UL) << REAL_HPAGE_SHIFT)
20
23
#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
21
24
#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
53
56
/* These are used to make use of C type-checking.. */
54
57
typedef struct { unsigned long pte; } pte_t;
55
58
typedef struct { unsigned long iopte; } iopte_t;
56
typedef struct { unsigned int pmd; } pmd_t;
57
typedef struct { unsigned int pgd; } pgd_t;
59
typedef struct { unsigned long pmd; } pmd_t;
60
typedef struct { unsigned long pgd; } pgd_t;
58
61
typedef struct { unsigned long pgprot; } pgprot_t;
60
63
#define pte_val(x) ((x).pte)
73
76
/* .. while these make it easier on the compiler */
74
77
typedef unsigned long pte_t;
75
78
typedef unsigned long iopte_t;
76
typedef unsigned int pmd_t;
77
typedef unsigned int pgd_t;
79
typedef unsigned long pmd_t;
80
typedef unsigned long pgd_t;
78
81
typedef unsigned long pgprot_t;
80
83
#define pte_val(x) (x)
94
97
typedef pte_t *pgtable_t;
99
/* These two values define the virtual address space range in which we
100
* must forbid 64-bit user processes from making mappings. It used to
101
* represent precisely the virtual address space hole present in most
102
* early sparc64 chips including UltraSPARC-I. But now it also is
103
* further constrained by the limits of our page tables, which is
104
* 43-bits of virtual address.
106
#define SPARC64_VA_HOLE_TOP _AC(0xfffffc0000000000,UL)
107
#define SPARC64_VA_HOLE_BOTTOM _AC(0x0000040000000000,UL)
109
/* The next two defines specify the actual exclusion region we
110
* enforce, wherein we use a 4GB red zone on each side of the VA hole.
112
#define VA_EXCLUDE_START (SPARC64_VA_HOLE_BOTTOM - (1UL << 32UL))
113
#define VA_EXCLUDE_END (SPARC64_VA_HOLE_TOP + (1UL << 32UL))
96
115
#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \
97
(_AC(0x0000000070000000,UL)) : \
98
(_AC(0xfffff80000000000,UL) + (1UL << 32UL)))
116
_AC(0x0000000070000000,UL) : \
100
119
#include <asm-generic/memory_model.h>
121
#define PAGE_OFFSET_BY_BITS(X) (-(_AC(1,UL) << (X)))
122
extern unsigned long PAGE_OFFSET;
102
124
#endif /* !(__ASSEMBLY__) */
104
/* We used to stick this into a hard-coded global register (%g4)
105
* but that does not make sense anymore.
107
#define PAGE_OFFSET _AC(0xFFFFF80000000000,UL)
126
/* The maximum number of physical memory address bits we support, this
127
* is used to size various tables used to manage kernel TLB misses and
128
* also the sparsemem code.
130
#define MAX_PHYS_ADDRESS_BITS 47
132
/* These two shift counts are used when indexing sparc64_valid_addr_bitmap
133
* and kpte_linear_bitmap.
136
#define ILOG2_256MB 28
109
138
#ifndef __ASSEMBLY__
added
removed
arch/sparc/include/asm/page_64.h
