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  • Committer: Package Import Robot
  • Author(s): Ben Hutchings
  • Date: 2014-02-02 16:57:49 UTC
  • mfrom: (1.1.10) (0.1.21 sid)
  • Revision ID: package-import@ubuntu.com-20140202165749-tw94o9t1t0a8txk6
Tags: 3.13-1~exp2
Merge changes from sid up to 3.12.6-3

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#include <acpi/acpi_numa.h>
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#include <asm/acpi.h>
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static inline acpi_handle acpi_device_handle(struct acpi_device *adev)
 
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{
 
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        return adev ? adev->handle : NULL;
 
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}
 
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#define ACPI_COMPANION(dev)             ((dev)->acpi_node.companion)
 
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#define ACPI_COMPANION_SET(dev, adev)   ACPI_COMPANION(dev) = (adev)
 
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#define ACPI_HANDLE(dev)                acpi_device_handle(ACPI_COMPANION(dev))
 
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static inline const char *acpi_dev_name(struct acpi_device *adev)
 
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{
 
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        return dev_name(&adev->dev);
 
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}
 
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enum acpi_irq_model_id {
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        ACPI_IRQ_MODEL_PIC = 0,
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        ACPI_IRQ_MODEL_IOAPIC,
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#ifdef CONFIG_ACPI_HOTPLUG_CPU
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/* Arch dependent functions for cpu hotplug support */
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int acpi_map_lsapic(acpi_handle handle, int *pcpu);
 
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int acpi_map_lsapic(acpi_handle handle, int physid, int *pcpu);
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int acpi_unmap_lsapic(int cpu);
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#endif /* CONFIG_ACPI_HOTPLUG_CPU */
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#endif /* CONFIG_PM_SLEEP */
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struct acpi_osc_context {
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        char *uuid_str; /* uuid string */
 
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        char *uuid_str;                 /* UUID string */
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        int rev;
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        struct acpi_buffer cap; /* arg2/arg3 */
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        struct acpi_buffer ret; /* free by caller if success */
 
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        struct acpi_buffer cap;         /* list of DWORD capabilities */
 
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        struct acpi_buffer ret;         /* free by caller if success */
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};
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#define OSC_QUERY_TYPE                  0
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#define OSC_SUPPORT_TYPE                1
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#define OSC_CONTROL_TYPE                2
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/* _OSC DW0 Definition */
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#define OSC_QUERY_ENABLE                1
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#define OSC_REQUEST_ERROR               2
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#define OSC_INVALID_UUID_ERROR          4
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#define OSC_INVALID_REVISION_ERROR      8
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#define OSC_CAPABILITIES_MASK_ERROR     16
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acpi_status acpi_str_to_uuid(char *str, u8 *uuid);
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acpi_status acpi_run_osc(acpi_handle handle, struct acpi_osc_context *context);
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/* platform-wide _OSC bits */
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#define OSC_SB_PAD_SUPPORT              1
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#define OSC_SB_PPC_OST_SUPPORT          2
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#define OSC_SB_PR3_SUPPORT              4
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#define OSC_SB_HOTPLUG_OST_SUPPORT      8
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#define OSC_SB_APEI_SUPPORT             16
 
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/* Indexes into _OSC Capabilities Buffer (DWORDs 2 & 3 are device-specific) */
 
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#define OSC_QUERY_DWORD                         0       /* DWORD 1 */
 
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#define OSC_SUPPORT_DWORD                       1       /* DWORD 2 */
 
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#define OSC_CONTROL_DWORD                       2       /* DWORD 3 */
 
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/* _OSC Capabilities DWORD 1: Query/Control and Error Returns (generic) */
 
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#define OSC_QUERY_ENABLE                        0x00000001  /* input */
 
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#define OSC_REQUEST_ERROR                       0x00000002  /* return */
 
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#define OSC_INVALID_UUID_ERROR                  0x00000004  /* return */
 
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#define OSC_INVALID_REVISION_ERROR              0x00000008  /* return */
 
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#define OSC_CAPABILITIES_MASK_ERROR             0x00000010  /* return */
 
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/* Platform-Wide Capabilities _OSC: Capabilities DWORD 2: Support Field */
 
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#define OSC_SB_PAD_SUPPORT                      0x00000001
 
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#define OSC_SB_PPC_OST_SUPPORT                  0x00000002
 
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#define OSC_SB_PR3_SUPPORT                      0x00000004
 
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#define OSC_SB_HOTPLUG_OST_SUPPORT              0x00000008
 
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#define OSC_SB_APEI_SUPPORT                     0x00000010
 
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#define OSC_SB_CPC_SUPPORT                      0x00000020
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extern bool osc_sb_apei_support_acked;
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/* PCI defined _OSC bits */
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/* _OSC DW1 Definition (OS Support Fields) */
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#define OSC_EXT_PCI_CONFIG_SUPPORT              1
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#define OSC_ACTIVE_STATE_PWR_SUPPORT            2
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#define OSC_CLOCK_PWR_CAPABILITY_SUPPORT        4
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#define OSC_PCI_SEGMENT_GROUPS_SUPPORT          8
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#define OSC_MSI_SUPPORT                         16
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#define OSC_PCI_SUPPORT_MASKS                   0x1f
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/* _OSC DW1 Definition (OS Control Fields) */
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#define OSC_PCI_EXPRESS_NATIVE_HP_CONTROL       1
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#define OSC_SHPC_NATIVE_HP_CONTROL              2
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#define OSC_PCI_EXPRESS_PME_CONTROL             4
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#define OSC_PCI_EXPRESS_AER_CONTROL             8
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#define OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL   16
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#define OSC_PCI_CONTROL_MASKS   (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL |    \
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                                OSC_SHPC_NATIVE_HP_CONTROL |            \
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                                OSC_PCI_EXPRESS_PME_CONTROL |           \
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                                OSC_PCI_EXPRESS_AER_CONTROL |           \
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                                OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL)
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#define OSC_PCI_NATIVE_HOTPLUG  (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL |    \
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                                OSC_SHPC_NATIVE_HP_CONTROL)
 
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/* PCI Host Bridge _OSC: Capabilities DWORD 2: Support Field */
 
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#define OSC_PCI_EXT_CONFIG_SUPPORT              0x00000001
 
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#define OSC_PCI_ASPM_SUPPORT                    0x00000002
 
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#define OSC_PCI_CLOCK_PM_SUPPORT                0x00000004
 
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#define OSC_PCI_SEGMENT_GROUPS_SUPPORT          0x00000008
 
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#define OSC_PCI_MSI_SUPPORT                     0x00000010
 
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#define OSC_PCI_SUPPORT_MASKS                   0x0000001f
 
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/* PCI Host Bridge _OSC: Capabilities DWORD 3: Control Field */
 
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#define OSC_PCI_EXPRESS_NATIVE_HP_CONTROL       0x00000001
 
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#define OSC_PCI_SHPC_NATIVE_HP_CONTROL          0x00000002
 
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#define OSC_PCI_EXPRESS_PME_CONTROL             0x00000004
 
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#define OSC_PCI_EXPRESS_AER_CONTROL             0x00000008
 
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#define OSC_PCI_EXPRESS_CAPABILITY_CONTROL      0x00000010
 
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#define OSC_PCI_CONTROL_MASKS                   0x0000001f
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extern acpi_status acpi_pci_osc_control_set(acpi_handle handle,
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                                             u32 *mask, u32 req);
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#define acpi_disabled 1
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#define ACPI_COMPANION(dev)             (NULL)
 
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#define ACPI_COMPANION_SET(dev, adev)   do { } while (0)
 
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#define ACPI_HANDLE(dev)                (NULL)
 
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static inline const char *acpi_dev_name(struct acpi_device *adev)
 
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{
 
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        return NULL;
 
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}
 
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static inline void acpi_early_init(void) { }
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static inline int early_acpi_boot_init(void)