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/* Copyright (c) 2007, Google Inc.
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following disclaimer
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* in the documentation and/or other materials provided with the
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* * Neither the name of Google Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* Author: Joi Sigurdsson
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* Implementation of MiniDisassembler.
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#include "mini_disassembler.h"
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MiniDisassembler::MiniDisassembler(bool operand_default_is_32_bits,
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bool address_default_is_32_bits)
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: operand_default_is_32_bits_(operand_default_is_32_bits),
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address_default_is_32_bits_(address_default_is_32_bits) {
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MiniDisassembler::MiniDisassembler()
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: operand_default_is_32_bits_(true),
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address_default_is_32_bits_(true) {
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InstructionType MiniDisassembler::Disassemble(
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unsigned int& instruction_bytes) {
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// Clean up any state from previous invocations.
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// Start by processing any prefixes.
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byte* current_byte = start_byte;
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unsigned int size = 0;
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InstructionType instruction_type = ProcessPrefixes(current_byte, size);
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if (IT_UNKNOWN == instruction_type)
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return instruction_type;
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// Invariant: We have stripped all prefixes, and the operand_is_32_bits_
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// and address_is_32_bits_ flags are correctly set.
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instruction_type = ProcessOpcode(current_byte, 0, size);
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// Check for error processing instruction
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if ((IT_UNKNOWN == instruction_type_) || (IT_UNUSED == instruction_type_)) {
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// Invariant: operand_bytes_ indicates the total size of operands
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// specified by the opcode and/or ModR/M byte and/or SIB byte.
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// pCurrentByte points to the first byte after the ModR/M byte, or after
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// the SIB byte if it is present (i.e. the first byte of any operands
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// encoded in the instruction).
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// We get the total length of any prefixes, the opcode, and the ModR/M and
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// SIB bytes if present, by taking the difference of the original starting
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// address and the current byte (which points to the first byte of the
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// operands if present, or to the first byte of the next instruction if
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// they are not). Adding the count of bytes in the operands encoded in
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// the instruction gives us the full length of the instruction in bytes.
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instruction_bytes += operand_bytes_ + (current_byte - start_byte);
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// Return the instruction type, which was set by ProcessOpcode().
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return instruction_type_;
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void MiniDisassembler::Initialize() {
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operand_is_32_bits_ = operand_default_is_32_bits_;
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address_is_32_bits_ = address_default_is_32_bits_;
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should_decode_modrm_ = false;
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instruction_type_ = IT_UNKNOWN;
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got_f2_prefix_ = false;
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got_f3_prefix_ = false;
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got_66_prefix_ = false;
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InstructionType MiniDisassembler::ProcessPrefixes(byte* start_byte,
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unsigned int& size) {
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InstructionType instruction_type = IT_GENERIC;
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const Opcode& opcode = s_ia32_opcode_map_[0].table_[*start_byte];
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switch (opcode.type_) {
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case IT_PREFIX_ADDRESS:
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address_is_32_bits_ = !address_default_is_32_bits_;
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goto nochangeoperand;
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case IT_PREFIX_OPERAND:
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operand_is_32_bits_ = !operand_default_is_32_bits_;
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if (0xF2 == (*start_byte))
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got_f2_prefix_ = true;
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else if (0xF3 == (*start_byte))
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got_f3_prefix_ = true;
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else if (0x66 == (*start_byte))
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got_66_prefix_ = true;
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instruction_type = opcode.type_;
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// we got a prefix, so add one and check next byte
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ProcessPrefixes(start_byte + 1, size);
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break; // not a prefix byte
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return instruction_type;
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InstructionType MiniDisassembler::ProcessOpcode(byte* start_byte,
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unsigned int table_index,
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unsigned int& size) {
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const OpcodeTable& table = s_ia32_opcode_map_[table_index]; // Get our table
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byte current_byte = (*start_byte) >> table.shift_;
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current_byte = current_byte & table.mask_; // Mask out the bits we will use
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// Check whether the byte we have is inside the table we have.
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if (current_byte < table.min_lim_ || current_byte > table.max_lim_) {
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instruction_type_ = IT_UNKNOWN;
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return instruction_type_;
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const Opcode& opcode = table.table_[current_byte];
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if (IT_UNUSED == opcode.type_) {
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// This instruction is not used by the IA-32 ISA, so we indicate
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// this to the user. Probably means that we were pointed to
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// a byte in memory that was not the start of an instruction.
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instruction_type_ = IT_UNUSED;
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return instruction_type_;
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} else if (IT_REFERENCE == opcode.type_) {
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// We are looking at an opcode that has more bytes (or is continued
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// in the ModR/M byte). Recursively find the opcode definition in
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// the table for the opcode's next byte.
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ProcessOpcode(start_byte + 1, opcode.table_index_, size);
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return instruction_type_;
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const SpecificOpcode* specific_opcode = (SpecificOpcode*)&opcode;
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if (opcode.is_prefix_dependent_) {
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if (got_f2_prefix_ && opcode.opcode_if_f2_prefix_.mnemonic_ != 0) {
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specific_opcode = &opcode.opcode_if_f2_prefix_;
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} else if (got_f3_prefix_ && opcode.opcode_if_f3_prefix_.mnemonic_ != 0) {
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specific_opcode = &opcode.opcode_if_f3_prefix_;
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} else if (got_66_prefix_ && opcode.opcode_if_66_prefix_.mnemonic_ != 0) {
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specific_opcode = &opcode.opcode_if_66_prefix_;
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// Inv: The opcode type is known.
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instruction_type_ = specific_opcode->type_;
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// Let's process the operand types to see if we have any immediate
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// operands, and/or a ModR/M byte.
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ProcessOperand(specific_opcode->flag_dest_);
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ProcessOperand(specific_opcode->flag_source_);
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ProcessOperand(specific_opcode->flag_aux_);
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// Inv: We have processed the opcode and incremented operand_bytes_
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// by the number of bytes of any operands specified by the opcode
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// that are stored in the instruction (not registers etc.). Now
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// we need to return the total number of bytes for the opcode and
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// for the ModR/M or SIB bytes if they are present.
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if (table.mask_ != 0xff) {
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// we're looking at a ModR/M byte so we're not going to
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// count that into the opcode size
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ProcessModrm(start_byte, size);
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// need to count the ModR/M byte even if it's just being
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// used for opcode extension
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// The ModR/M byte is the next byte.
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ProcessModrm(start_byte + 1, size);
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bool MiniDisassembler::ProcessOperand(int flag_operand) {
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bool succeeded = true;
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if (AM_NOT_USED == flag_operand)
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// Decide what to do based on the addressing mode.
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switch (flag_operand & AM_MASK) {
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// No ModR/M byte indicated by these addressing modes, and no
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// additional (e.g. immediate) parameters.
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case AM_A: // Direct address
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case AM_F: // EFLAGS register
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case AM_X: // Memory addressed by the DS:SI register pair
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case AM_Y: // Memory addressed by the ES:DI register pair
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case AM_IMPLICIT: // Parameter is implicit, occupies no space in
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// There is a ModR/M byte but it does not necessarily need
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case AM_C: // reg field of ModR/M selects a control register
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case AM_D: // reg field of ModR/M selects a debug register
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case AM_G: // reg field of ModR/M selects a general register
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case AM_P: // reg field of ModR/M selects an MMX register
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case AM_R: // mod field of ModR/M may refer only to a general register
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case AM_S: // reg field of ModR/M selects a segment register
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case AM_T: // reg field of ModR/M selects a test register
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case AM_V: // reg field of ModR/M selects a 128-bit XMM register
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// In these addressing modes, there is a ModR/M byte and it needs to be
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// decoded. No other (e.g. immediate) params than indicated in ModR/M.
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case AM_E: // Operand is either a general-purpose register or memory,
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// specified by ModR/M byte
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case AM_M: // ModR/M byte will refer only to memory
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case AM_Q: // Operand is either an MMX register or memory (complex
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// evaluation), specified by ModR/M byte
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case AM_W: // Operand is either a 128-bit XMM register or memory (complex
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// eval), specified by ModR/M byte
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should_decode_modrm_ = true;
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// These addressing modes specify an immediate or an offset value
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// directly, so we need to look at the operand type to see how many
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case AM_I: // Immediate data.
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case AM_J: // Jump to offset.
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case AM_O: // Operand is at offset.
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switch (flag_operand & OT_MASK) {
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case OT_B: // Byte regardless of operand-size attribute.
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operand_bytes_ += OS_BYTE;
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case OT_C: // Byte or word, depending on operand-size attribute.
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if (operand_is_32_bits_)
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operand_bytes_ += OS_WORD;
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operand_bytes_ += OS_BYTE;
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case OT_D: // Doubleword, regardless of operand-size attribute.
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operand_bytes_ += OS_DOUBLE_WORD;
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case OT_DQ: // Double-quadword, regardless of operand-size attribute.
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operand_bytes_ += OS_DOUBLE_QUAD_WORD;
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case OT_P: // 32-bit or 48-bit pointer, depending on operand-size
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if (operand_is_32_bits_)
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operand_bytes_ += OS_48_BIT_POINTER;
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operand_bytes_ += OS_32_BIT_POINTER;
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case OT_PS: // 128-bit packed single-precision floating-point data.
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operand_bytes_ += OS_128_BIT_PACKED_SINGLE_PRECISION_FLOATING;
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case OT_Q: // Quadword, regardless of operand-size attribute.
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operand_bytes_ += OS_QUAD_WORD;
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case OT_S: // 6-byte pseudo-descriptor.
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operand_bytes_ += OS_PSEUDO_DESCRIPTOR;
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case OT_SD: // Scalar Double-Precision Floating-Point Value
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case OT_PD: // Unaligned packed double-precision floating point value
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operand_bytes_ += OS_DOUBLE_PRECISION_FLOATING;
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// Scalar element of a 128-bit packed single-precision
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// We simply return enItUnknown since we don't have to support
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case OT_V: // Word or doubleword, depending on operand-size attribute.
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if (operand_is_32_bits_)
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operand_bytes_ += OS_DOUBLE_WORD;
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operand_bytes_ += OS_WORD;
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case OT_W: // Word, regardless of operand-size attribute.
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operand_bytes_ += OS_WORD;
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// Can safely ignore these.
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case OT_A: // Two one-word operands in memory or two double-word
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// operands in memory
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case OT_PI: // Quadword MMX technology register (e.g. mm0)
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case OT_SI: // Doubleword integer register (e.g., eax)
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bool MiniDisassembler::ProcessModrm(byte* start_byte,
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unsigned int& size) {
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// If we don't need to decode, we just return the size of the ModR/M
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// byte (there is never a SIB byte in this case).
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if (!should_decode_modrm_) {
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// We never care about the reg field, only the combination of the mod
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// and r/m fields, so let's start by packing those fields together into
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byte modrm = (*start_byte);
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byte mod = modrm & 0xC0; // mask out top two bits to get mod field
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modrm = modrm & 0x07; // mask out bottom 3 bits to get r/m field
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mod = mod >> 3; // shift the mod field to the right place
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modrm = mod | modrm; // combine the r/m and mod fields as discussed
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mod = mod >> 3; // shift the mod field to bits 2..0
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// Invariant: modrm contains the mod field in bits 4..3 and the r/m field
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// in bits 2..0, and mod contains the mod field in bits 2..0
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const ModrmEntry* modrm_entry = 0;
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if (address_is_32_bits_)
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modrm_entry = &s_ia32_modrm_map_[modrm];
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modrm_entry = &s_ia16_modrm_map_[modrm];
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// Invariant: modrm_entry points to information that we need to decode
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// Add to the count of operand bytes, if the ModR/M byte indicates
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// that some operands are encoded in the instruction.
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if (modrm_entry->is_encoded_in_instruction_)
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operand_bytes_ += modrm_entry->operand_size_;
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// Process the SIB byte if necessary, and return the count
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// of ModR/M and SIB bytes.
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if (modrm_entry->use_sib_byte_) {
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return ProcessSib(start_byte + 1, mod, size);
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bool MiniDisassembler::ProcessSib(byte* start_byte,
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unsigned int& size) {
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// get the mod field from the 2..0 bits of the SIB byte
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byte sib_base = (*start_byte) & 0x07;
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if (0x05 == sib_base) {
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case 0x00: // mod == 00
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case 0x02: // mod == 10
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operand_bytes_ += OS_DOUBLE_WORD;
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case 0x01: // mod == 01
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operand_bytes_ += OS_BYTE;
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case 0x03: // mod == 11
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// According to the IA-32 docs, there does not seem to be a disp
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// value for this value of mod
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}; // namespace sidestep
added
removed
src/windows/mini_disassembler.cc
