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/* Copyright (c) 2007, Google Inc.
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following disclaimer
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* in the documentation and/or other materials provided with the
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* * Neither the name of Google Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* Author: Joi Sigurdsson
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* Several simple types used by the disassembler and some of the patching
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#ifndef GOOGLE_PERFTOOLS_MINI_DISASSEMBLER_TYPES_H_
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#define GOOGLE_PERFTOOLS_MINI_DISASSEMBLER_TYPES_H_
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// Categories of instructions that we care about
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enum InstructionType {
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// This opcode is not used
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// This disassembler does not recognize this opcode (error)
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// This is not an instruction but a reference to another table
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// This byte is a prefix byte that we can ignore
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// This is a prefix byte that switches to the nondefault address size
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// This is a prefix byte that switches to the nondefault operand size
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// A jump or call instruction
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// A return instruction
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// Any other type of instruction (in this case we don't care what it is)
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// Lists IA-32 operand sizes in multiples of 8 bits
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OS_DOUBLE_QUAD_WORD = 16,
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OS_32_BIT_POINTER = 32/8,
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OS_48_BIT_POINTER = 48/8,
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OS_SINGLE_PRECISION_FLOATING = 32/8,
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OS_DOUBLE_PRECISION_FLOATING = 64/8,
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OS_DOUBLE_EXTENDED_PRECISION_FLOATING = 80/8,
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OS_128_BIT_PACKED_SINGLE_PRECISION_FLOATING = 128/8,
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OS_PSEUDO_DESCRIPTOR = 6
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// Operand addressing methods from the IA-32 manual. The enAmMask value
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// is a mask for the rest. The other enumeration values are named for the
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// names given to the addressing methods in the manual, e.g. enAm_D is for
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// the D addressing method.
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// The reason we use a full 4 bytes and a mask, is that we need to combine
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// these flags with the enOperandType to store the details
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// on the operand in a single integer.
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enum AddressingMethod {
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AM_NOT_USED = 0, // This operand is not used for this instruction
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AM_MASK = 0x00FF0000, // Mask for the rest of the values in this enumeration
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AM_A = 0x00010000, // A addressing type
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AM_C = 0x00020000, // C addressing type
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AM_D = 0x00030000, // D addressing type
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AM_E = 0x00040000, // E addressing type
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AM_F = 0x00050000, // F addressing type
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AM_G = 0x00060000, // G addressing type
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AM_I = 0x00070000, // I addressing type
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AM_J = 0x00080000, // J addressing type
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AM_M = 0x00090000, // M addressing type
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AM_O = 0x000A0000, // O addressing type
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AM_P = 0x000B0000, // P addressing type
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AM_Q = 0x000C0000, // Q addressing type
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AM_R = 0x000D0000, // R addressing type
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AM_S = 0x000E0000, // S addressing type
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AM_T = 0x000F0000, // T addressing type
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AM_V = 0x00100000, // V addressing type
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AM_W = 0x00110000, // W addressing type
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AM_X = 0x00120000, // X addressing type
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AM_Y = 0x00130000, // Y addressing type
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AM_REGISTER = 0x00140000, // Specific register is always used as this op
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AM_IMPLICIT = 0x00150000, // An implicit, fixed value is used
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// Operand types from the IA-32 manual. The enOtMask value is
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// a mask for the rest. The rest of the values are named for the
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// names given to these operand types in the manual, e.g. enOt_ps
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// is for the ps operand type in the manual.
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// The reason we use a full 4 bytes and a mask, is that we need
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// to combine these flags with the enAddressingMethod to store the details
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// on the operand in a single integer.
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OT_MASK = 0xFF000000,
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OT_PS = 0x08000000, // actually unsupported for (we don't know its size)
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OT_SD = 0x0F000000, // scalar double-precision floating-point value
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OT_PD = 0x10000000, // double-precision floating point
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// dummy "operand type" for address mode M - which doesn't specify
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OT_ADDRESS_MODE_M = 0x80000000
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// Everything that's in an Opcode (see below) except the three
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// alternative opcode structs for different prefixes.
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struct SpecificOpcode {
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// Index to continuation table, or 0 if this is the last
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// byte in the opcode.
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InstructionType type_;
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// Description of the type of the dest, src and aux operands,
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// put together from an enOperandType flag and an enAddressingMethod
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// We indicate the mnemonic for debugging purposes
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const char* mnemonic_;
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// The information we keep in our tables about each of the different
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// valid instructions recognized by the IA-32 architecture.
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// Index to continuation table, or 0 if this is the last
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// byte in the opcode.
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InstructionType type_;
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// Description of the type of the dest, src and aux operands,
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// put together from an enOperandType flag and an enAddressingMethod
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// We indicate the mnemonic for debugging purposes
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const char* mnemonic_;
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// Alternative opcode info if certain prefixes are specified.
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// In most cases, all of these are zeroed-out. Only used if
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// bPrefixDependent is true.
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bool is_prefix_dependent_;
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SpecificOpcode opcode_if_f2_prefix_;
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SpecificOpcode opcode_if_f3_prefix_;
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SpecificOpcode opcode_if_66_prefix_;
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// Information about each table entry.
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// Table of instruction entries
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const Opcode* table_;
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// How many bytes left to shift ModR/M byte <b>before</b> applying mask
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unsigned char shift_;
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// Mask to apply to byte being looked at before comparing to table
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// Minimum/maximum indexes in table.
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unsigned char min_lim_;
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unsigned char max_lim_;
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// Information about each entry in table used to decode ModR/M byte.
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// Is the operand encoded as bytes in the instruction (rather than
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// if it's e.g. a register in which case it's just encoded in the
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bool is_encoded_in_instruction_;
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// Is there a SIB byte? In this case we always need to decode it.
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// What is the size of the operand (only important if it's encoded
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// in the instruction)?
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OperandSize operand_size_;
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}; // namespace sidestep
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#endif // GOOGLE_PERFTOOLS_MINI_DISASSEMBLER_TYPES_H_