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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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* author teawater <c7code-uc@yahoo.com.cn> <teawater@gmail.com>
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//koodailar add for mingw 2005.12.18 ----------------------------------------
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#include "arch/arm/common/armdefs.h"
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// end ----------------------------------------------------------------------
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#include "arm2x86_self.h"
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//--------------------------------------------------------------------------------------------------
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tea_ldc (ARMul_State * state, uint32_t insn, uint32_t address)
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ARMword cp_num = (insn >> 8) & 0xf;
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if (!CP_ACCESS_ALLOWED (state, cp_num)) {
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state->trap = TRAP_INSN_UNDEF;
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cpab = (state->LDC[cp_num]) (state, ARMul_FIRST, insn, 0);
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while (cpab == ARMul_BUSY) {
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//XXX teawater:howto deal with it ?
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//ARMul_Icycles(state, 1, 0);
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if (arm2x86_exception (state)) {
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cpab = (state->LDC[cp_num]) (state, ARMul_INTERRUPT,
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cpab = (state->LDC[cp_num]) (state, ARMul_BUSY, insn, 0);
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if (cpab == ARMul_CANT) {
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state->trap = TRAP_INSN_UNDEF;
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cpab = (state->LDC[cp_num]) (state, ARMul_TRANSFER, insn, 0);
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//XXX teawater:howto deal with BUSUSEDINCPCN ?
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data = ARMul_ReadWord (state, address);
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if (state->abortSig != LOW) {
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state->trap = TRAP_DATA_ABORT;
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cpab = (state->LDC[cp_num]) (state, ARMul_DATA, insn, data);
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} while (cpab == ARMul_INC);
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tea_stc (ARMul_State * state, uint32_t insn, uint32_t address)
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ARMword cp_num = (insn >> 8) & 0xf;
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if (!CP_ACCESS_ALLOWED (state, cp_num)) {
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state->trap = TRAP_INSN_UNDEF;
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cpab = (state->STC[cp_num]) (state, ARMul_FIRST, insn, &data);
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while (cpab == ARMul_BUSY) {
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//XXX teawater:howto deal with it ?
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//ARMul_Icycles(state, 1, 0);
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if (arm2x86_exception (state)) {
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cpab = (state->STC[cp_num]) (state, ARMul_INTERRUPT,
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cpab = (state->STC[cp_num]) (state, ARMul_BUSY, insn, &data);
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if (cpab == ARMul_CANT) {
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state->trap = TRAP_INSN_UNDEF;
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//XXX teawater:howto deal with BUSUSEDINCPCN ?
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cpab = (state->STC[cp_num]) (state, ARMul_DATA, insn, &data);
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ARMul_WriteWord (state, address, data);
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if (state->abortSig != LOW) {
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state->trap = TRAP_DATA_ABORT;
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} while (cpab == ARMul_INC);
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tea_mrc (ARMul_State * state, uint32_t insn, uint32_t cp_num)
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if (!CP_ACCESS_ALLOWED (state, cp_num)) {
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state->trap = TRAP_INSN_UNDEF;
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cpab = (state->MRC[cp_num]) (state, ARMul_FIRST, insn, &result);
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while (cpab == ARMul_BUSY) {
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//XXX teawater:howto deal with it ?
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//ARMul_Icycles(state, 1, 0);
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if (arm2x86_exception (state)) {
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cpab = (state->MRC[cp_num]) (state, ARMul_INTERRUPT,
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cpab = (state->MRC[cp_num]) (state, ARMul_BUSY, insn,
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if (cpab == ARMul_CANT) {
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state->trap = TRAP_INSN_UNDEF;
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//XXX teawater:howto deal with BUSUSEDINCPCN and so on ?
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rd = (insn >> 12) & 0xf;
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st->Reg[15] = (result & (~3)) + 4;
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state->trap = TRAP_SET_R15;
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state->Reg[rd] = result;
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tea_mcr (ARMul_State * state, uint32_t insn, uint32_t cp_num)
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if (!CP_ACCESS_ALLOWED (state, cp_num)) {
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state->trap = TRAP_INSN_UNDEF;
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source = state->Reg[(insn >> 12) & 0xf];
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cpab = (state->MCR[cp_num]) (state, ARMul_FIRST, insn, source);
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while (cpab == ARMul_BUSY) {
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//XXX teawater:howto deal with it ?
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//ARMul_Icycles(state, 1, 0);
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if (arm2x86_exception (state)) {
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cpab = (state->MCR[cp_num]) (state, ARMul_INTERRUPT,
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cpab = (state->MCR[cp_num]) (state, ARMul_BUSY, insn, source);
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if (cpab == ARMul_CANT) {
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state->trap = TRAP_INSN_UNDEF;
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//XXX teawater:howto deal with BUSUSEDINCPCN and so on ?
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tea_cdp (ARMul_State * state, uint32_t insn, uint32_t cp_num)
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if (!CP_ACCESS_ALLOWED (state, cp_num)) {
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state->trap = TRAP_INSN_UNDEF;
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cpab = (state->CDP[cp_num]) (state, ARMul_FIRST, insn);
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while (cpab == ARMul_BUSY) {
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//XXX teawater:howto deal with it ?
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//ARMul_Icycles(state, 1, 0);
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if (arm2x86_exception (state)) {
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cpab = (state->CDP[cp_num]) (state, ARMul_INTERRUPT,
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cpab = (state->CDP[cp_num]) (state, ARMul_BUSY, insn);
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if (cpab == ARMul_CANT) {
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state->trap = TRAP_INSN_UNDEF;
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//XXX teawater:howto deal with BUSUSEDINCPCN and so on ?
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//teawater add for xscale(arm v5) 2005.09.12------------------------------------
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get_op_mar_T0_T1 (int *len)
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unsigned int begin = 0, end = 0;
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OP_BEGIN ("get_op_mar_T0_T1");
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st->Accumulator = (ARMdword) T0 + (((ARMdword) T1) << 32);
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OP_END ("get_op_mar_T0_T1");
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return ((uint8_t *) begin);
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get_op_mra_T0_T1 (int *len)
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unsigned int begin = 0, end = 0;
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OP_BEGIN ("get_op_mra_T0_T1");
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T0 = (uint32_t) (st->Accumulator & 0xffffffff);
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T1 = ((uint32_t) (st->Accumulator >> 32)) & 0xff;
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OP_END ("get_op_mra_T0_T1");
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return ((uint8_t *) begin);
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get_op_mia_T0_T1 (int *len)
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unsigned int begin = 0, end = 0;
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OP_BEGIN ("get_op_mia_T0_T1");
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st->Accumulator += (ARMdword) T0 + (((ARMdword) T1) << 32);
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OP_END ("get_op_mia_T0_T1");
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return ((uint8_t *) begin);
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get_op_miaph_T0_T1 (int *len)
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unsigned int begin = 0, end = 0;
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OP_BEGIN ("get_op_miaph_T0_T1");
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T2 = (uint32_t) ((int32_t) ((int16_t) (T0 >> 16)) *
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(int32_t) ((int16_t) (T1 >> 16)));
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if (T2 & 0x80000000) {
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st->Accumulator += 0xffffffff00000000;
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st->Accumulator += (ARMdword) T2;
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T2 = (uint32_t) ((int32_t) ((int16_t) (T0 & 0xffff)) *
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(int32_t) ((int16_t) (T1 & 0xffff)));
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if (T2 & 0x80000000) {
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st->Accumulator += 0xffffffff00000000;
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st->Accumulator += (ARMdword) T2;
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OP_END ("get_op_miaph_T0_T1");
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return ((uint8_t *) begin);
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get_op_miaxy_T0_T1 (int *len)
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unsigned int begin = 0, end = 0;
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OP_BEGIN ("get_op_miaxy_T0_T1");
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T2 = (uint32_t) ((int32_t) T0 * (int32_t) T1);
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if (T2 & 0x80000000) {
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st->Accumulator += 0xffffffff00000000;
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st->Accumulator += (ARMdword) T2;
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OP_END ("get_op_miaxy_T0_T1");
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return ((uint8_t *) begin);
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op_table_t op_mar_T0_T1;
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op_table_t op_mra_T0_T1;
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op_table_t op_mia_T0_T1;
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op_table_t op_miaph_T0_T1;
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op_table_t op_miaxy_T0_T1;
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//AJ2D--------------------------------------------------------------------------
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//--------------------------------------------------------------------------------------------------
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get_op_ldc_T0_T1 (int *len)
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unsigned int begin = 0, end = 0;
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OP_BEGIN ("get_op_ldc_T0_T1");
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//tea_ldc(st, T0, T1);
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__asm__ __volatile__ ("subl $0x4, %esp");
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__asm__ __volatile__ ("push %" AREG_T1);
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__asm__ __volatile__ ("push %" AREG_T0);
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__asm__ __volatile__ ("push %" AREG_st);
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T2 = (uint32_t) tea_ldc;
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__asm__ __volatile__ ("call *%" AREG_T2);
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__asm__ __volatile__ ("addl $0x10, %esp");
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__asm__ __volatile__ ("ret");
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OP_END ("get_op_ldc_T0_T1");
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return ((uint8_t *) begin);
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get_op_stc_T0_T1 (int *len)
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unsigned int begin = 0, end = 0;
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OP_BEGIN ("get_op_stc_T0_T1");
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//tea_stc(st, T0, T1);
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__asm__ __volatile__ ("subl $0x4, %esp");
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__asm__ __volatile__ ("push %" AREG_T1);
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__asm__ __volatile__ ("push %" AREG_T0);
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__asm__ __volatile__ ("push %" AREG_st);
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T2 = (uint32_t) tea_stc;
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__asm__ __volatile__ ("call *%" AREG_T2);
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__asm__ __volatile__ ("addl $0x10, %esp");
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__asm__ __volatile__ ("ret");
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OP_END ("get_op_stc_T0_T1");
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return ((uint8_t *) begin);
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get_op_mrc_T0_T1 (int *len)
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unsigned int begin = 0, end = 0;
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OP_BEGIN ("get_op_mrc_T0_T1");
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//tea_mrc(st, T0, T1);
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__asm__ __volatile__ ("subl $0x4, %esp");
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__asm__ __volatile__ ("push %" AREG_T1);
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__asm__ __volatile__ ("push %" AREG_T0);
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__asm__ __volatile__ ("push %" AREG_st);
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T2 = (uint32_t) tea_mrc;
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__asm__ __volatile__ ("call *%" AREG_T2);
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__asm__ __volatile__ ("addl $0x10, %esp");
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__asm__ __volatile__ ("ret");
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OP_END ("get_op_mrc_T0_T1");
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return ((uint8_t *) begin);
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get_op_mcr_T0_T1 (int *len)
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unsigned int begin = 0, end = 0;
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OP_BEGIN ("get_op_mcr_T0_T1");
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//tea_mcr(st, T0, T1);
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__asm__ __volatile__ ("subl $0x4, %esp");
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__asm__ __volatile__ ("push %" AREG_T1);
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__asm__ __volatile__ ("push %" AREG_T0);
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__asm__ __volatile__ ("push %" AREG_st);
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T2 = (uint32_t) tea_mcr;
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__asm__ __volatile__ ("call *%" AREG_T2);
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__asm__ __volatile__ ("addl $0x10, %esp");
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__asm__ __volatile__ ("ret");
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OP_END ("get_op_mcr_T0_T1");
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return ((uint8_t *) begin);
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get_op_cdp_T0_T1 (int *len)
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unsigned int begin = 0, end = 0;
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OP_BEGIN ("get_op_cdp_T0_T1");
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//tea_cdp(st, T0, T1);
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__asm__ __volatile__ ("subl $0x4, %esp");
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__asm__ __volatile__ ("push %" AREG_T1);
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__asm__ __volatile__ ("push %" AREG_T0);
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__asm__ __volatile__ ("push %" AREG_st);
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T2 = (uint32_t) tea_cdp;
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__asm__ __volatile__ ("call *%" AREG_T2);
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__asm__ __volatile__ ("addl $0x10, %esp");
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__asm__ __volatile__ ("ret");
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OP_END ("get_op_cdp_T0_T1");
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return ((uint8_t *) begin);
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op_table_t op_ldc_T0_T1;
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op_table_t op_stc_T0_T1;
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op_table_t op_mrc_T0_T1;
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op_table_t op_mcr_T0_T1;
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op_table_t op_cdp_T0_T1;
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//--------------------------------------------------------------------------------------------------
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arm2x86_coproc_init ()
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op_ldc_T0_T1.op = get_op_ldc_T0_T1 (&op_ldc_T0_T1.len);
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if (op_ldc_T0_T1.len <= 0)
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op_stc_T0_T1.op = get_op_stc_T0_T1 (&op_stc_T0_T1.len);
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if (op_stc_T0_T1.len <= 0)
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op_mrc_T0_T1.op = get_op_mrc_T0_T1 (&op_mrc_T0_T1.len);
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if (op_mrc_T0_T1.len <= 0)
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op_mcr_T0_T1.op = get_op_mcr_T0_T1 (&op_mcr_T0_T1.len);
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if (op_mcr_T0_T1.len <= 0)
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op_cdp_T0_T1.op = get_op_cdp_T0_T1 (&op_cdp_T0_T1.len);
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if (op_cdp_T0_T1.len <= 0)
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//teawater add for xscale(arm v5) 2005.09.12------------------------------------
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op_mar_T0_T1.op = get_op_mar_T0_T1 (&op_mar_T0_T1.len);
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if (op_mar_T0_T1.len <= 0)
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op_mra_T0_T1.op = get_op_mra_T0_T1 (&op_mra_T0_T1.len);
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if (op_mra_T0_T1.len <= 0)
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op_mia_T0_T1.op = get_op_mia_T0_T1 (&op_mia_T0_T1.len);
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if (op_mia_T0_T1.len <= 0)
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op_miaph_T0_T1.op = get_op_miaph_T0_T1 (&op_miaph_T0_T1.len);
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if (op_miaph_T0_T1.len <= 0)
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op_miaxy_T0_T1.op = get_op_miaxy_T0_T1 (&op_miaxy_T0_T1.len);
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if (op_miaxy_T0_T1.len <= 0)
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//AJ2D--------------------------------------------------------------------------