« back to all changes in this revision
Viewing changes to arch/arm/dbct/tb.c
- browse files at revision 1
- compare with another revision
- download diff
- download tarball
- view history from revision 1
- Committer: Bazaar Package Importer
- Author(s): Yu Guanghui
- Date: 2006-08-09 16:30:44 UTC
- Revision ID: james.westby@ubuntu.com-20060809163044-6efqjm0t2stau23w
Tags: upstream-1.2.0rc8
Import upstream version 1.2.0rc8
- files added:
- arch
- arch/arm
- arch/arm/common
- arch/arm/common/mmu
- arch/arm/dbct
- arch/arm/mach
- arch/bfin
- arch/bfin/common
- arch/bfin/common/opcode
- arch/bfin/dbct
- arch/bfin/mach
- arch/coldfire
- arch/coldfire/common
- arch/coldfire/i_5206
- arch/coldfire/tracer
- binary
- dbct
- dbct/host
- dbct/include
- dbct/oplet
- device
- device/flash
- device/lcd
- device/net
- utils
- utils/conf
- utils/conf/configs
- utils/conf/scripts
- utils/conf/scripts/lxdialog
- utils/config
- utils/debugger
- utils/main
- utils/share
- utils/stub
- utils/tools
- utils/tools/auto_test
- utils/tools/dev-cpp_support
added
removed
arch/arm/dbct/tb.c
1
/*
2
This program is free software; you can redistribute it and/or modify
3
it under the terms of the GNU General Public License as published by
4
the Free Software Foundation; either version 2, or (at your option)
5
any later version.
6
7
This program is distributed in the hope that it will be useful,
8
but WITHOUT ANY WARRANTY; without even the implied warranty of
9
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10
GNU General Public License for more details.
11
12
You should have received a copy of the GNU General Public License along
13
with this program; if not, write to the Free Software Foundation, Inc.,
14
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
15
16
/*
17
* author teawater <c7code-uc@yahoo.com.cn> <teawater@gmail.com>
18
*/
19
//koodailar add for mingw 2005.12.18 ----------------------------------------
20
#ifdef __MINGW32__
21
#include "arch/arm/common/armdefs.h"
22
#else
23
#include "armdefs.h"
24
#endif
25
// end ----------------------------------------------------------------------
26
//teawater 2005-09-12 for gcc-3.3.x compiling, comment below line
27
//#include "arm2x86_self.h"
28
29
extern mem_bank_t *bank_ptr (ARMword addr);
30
31
/*ywc 2005-04-22, in armmem.c*/
32
extern mem_bank_t *insn_bank_ptr (ARMword addr);
33
34
extern ARMul_State *state;
35
36
//teawater add for new tb manage function 2005.07.10----------------------------
37
//static uint32_t tb_tbt_size = 0;
38
//static uint32_t tb_tbp_size = (1024 * 1024 * 32);
39
#define TB_TBT_SIZE skyeye_config.tb_tbt_size
40
#define TB_TBP_SIZE skyeye_config.tb_tbp_size
41
42
static tb_t *tbt_table = NULL;
43
static int tbt_table_size = 0;
44
45
static uint8_t *tbp_begin = NULL;
46
static uint8_t *tbp_now = NULL;
47
static uint32_t tbp_now_size = 0;
48
static int tbp_dynamic = 0;
49
static LIST_HEAD (tbp_dynamic_list);
50
//AJ2D--------------------------------------------------------------------------
51
#ifdef __FreeBSD__
52
#define MAP_ANONYMOUS MAP_ANON
53
#endif
54
55
static __inline__ int
56
translate_word (ARMul_State * state, ARMword insn, uint8_t * tbp)
57
{
58
int toplen = 0, len = 0;
59
//teawater add for xscale(arm v5) 2005.09.26------------------------------------
60
ARMword cond, val, op1, shift, rm, rs, rn, rd, sh, y, x;
61
//AJ2D--------------------------------------------------------------------------
62
uint8_t *begin = tbp;
63
64
//init
65
begin = tbp;
66
state->trap = 0;
67
68
//teawater change for debug function 2005.07.09---------------------------------
69
//breakpoint
70
if (insn == 0xe7ffdefe) {
71
GEN_OP (tbp, len, op_begin);
72
gen_op_movl_trap_im_use_T2 (state, &tbp, &len,
73
TRAP_BREAKPOINT);
74
GEN_OP (tbp, len, op_return);
75
goto out;
76
}
77
//AJ2D--------------------------------------------------------------------------
78
79
//teawater add for xscale(arm v5) 2005.09.01------------------------------------
80
if ((insn & 0xfff000f0) == 0xe1200070) {
81
//BKPT
82
//GEN_OP(tbp, len, op_begin);
83
gen_op_movl_trap_im_use_T2 (state, &tbp, &len,
84
TRAP_INSN_ABORT);
85
GEN_OP (tbp, len, op_return);
86
goto out;
87
}
88
//AJ2D--------------------------------------------------------------------------
89
90
//return if debug || irq || fiq || condition
91
cond = (insn >> 28) & 0xff;
92
if (cond == AL || cond == NV) {
93
GEN_OP (tbp, len, op_begin);
94
//some insn need it
95
//if (cond == NV)
96
// goto translate_word_out;
97
}
98
else {
99
gen_op_movl_Tx_im (state, &tbp, &len, 0, cond);
100
GEN_OP (tbp, len, op_begin_test_T0);
101
toplen = len;
102
}
103
104
if (((insn & 0x0e000000) == 0 && (insn & 0x00000090) != 0x90)
105
|| ((insn & 0x0e000000) == (1 << 25))) {
106
ARMword set_cc, logic_cc, shiftop;
107
108
if (cond == NV)
109
goto translate_word_out;
110
111
op1 = (insn >> 21) & 0xf;
112
set_cc = (insn >> 20) & 1;
113
114
//teawater add for xscale(arm v5) 2005.09.01------------------------------------
115
if (!set_cc & (op1 >= 0x8 && op1 <= 0xb)) {
116
if (state->is_v5) {
117
sh = ((insn >> 4) & 0xf);
118
if (sh == 0x5) {
119
rm = (insn >> 0) & 0xf;
120
rd = (insn >> 12) & 0xf;
121
rn = (insn >> 16) & 0xf;
122
switch (op1) {
123
case 0x8:
124
//qadd
125
gen_op_movl_Tx_reg (state,
126
&tbp,
127
&len, 0,
128
rm);
129
gen_op_movl_Tx_reg (state,
130
&tbp,
131
&len, 1,
132
rd);
133
GEN_OP (tbp, len,
134
op_qaddl_T0_T1_sq);
135
break;
136
case 0x9:
137
//qsub
138
gen_op_movl_Tx_reg (state,
139
&tbp,
140
&len, 0,
141
rm);
142
gen_op_movl_Tx_reg (state,
143
&tbp,
144
&len, 1,
145
rd);
146
GEN_OP (tbp, len,
147
op_qsubl_T0_T1_sq);
148
break;
149
case 0xa:
150
//qdadd
151
gen_op_movl_Tx_reg (state,
152
&tbp,
153
&len, 0,
154
rn);
155
gen_op_movl_Tx_reg (state,
156
&tbp,
157
&len, 1,
158
rn);
159
GEN_OP (tbp, len,
160
op_qaddl_T0_T1_sq);
161
gen_op_movl_Tx_reg (state,
162
&tbp,
163
&len, 1,
164
rm);
165
GEN_OP (tbp, len,
166
op_qaddl_T0_T1_sq);
167
break;
168
case 0xb:
169
//qdsub
170
gen_op_movl_Tx_reg (state,
171
&tbp,
172
&len, 0,
173
rn);
174
gen_op_movl_Tx_reg (state,
175
&tbp,
176
&len, 1,
177
rn);
178
GEN_OP (tbp, len,
179
op_qaddl_T0_T1_sq);
180
GEN_OP (tbp, len,
181
op_movl_T1_T0);
182
gen_op_movl_Tx_reg (state,
183
&tbp,
184
&len, 0,
185
rm);
186
GEN_OP (tbp, len,
187
op_qsubl_T0_T1_sq);
188
break;
189
}
190
gen_op_movl_reg_Tx (state, &tbp, &len,
191
rd, 0);
192
GEN_OP (tbp, len, op_set_q);
193
goto translate_word_end;
194
}
195
else if ((sh & 0x9) == 0x8) {
196
rm = (insn >> 0) & 0xf;
197
rs = (insn >> 8) & 0xf;
198
rn = (insn >> 12) & 0xf; //rdlo
199
rd = (insn >> 16) & 0xf; //rdhi
200
y = (insn >> 6) & 0x1;
201
x = (insn >> 5) & 0x1;
202
gen_op_movl_Tx_reg (state, &tbp, &len,
203
0, rm);
204
gen_op_movl_Tx_reg (state, &tbp, &len,
205
1, rs);
206
if (op1 != 0x9) {
207
if (x) {
208
//t
209
GEN_OP (tbp, len,
210
op_hi_T0);
211
}
212
else {
213
//b
214
GEN_OP (tbp, len,
215
op_lo_T0);
216
}
217
GEN_OP (tbp, len,
218
op_signextend_halfword_T0);
219
}
220
if (y) {
221
//t
222
GEN_OP (tbp, len, op_hi_T1);
223
}
224
else {
225
//b
226
GEN_OP (tbp, len, op_lo_T1);
227
}
228
GEN_OP (tbp, len,
229
op_signextend_halfword_T1);
230
switch (op1) {
231
case 0x8:
232
//smlaxy
233
GEN_OP (tbp, len,
234
op_mul_T0_T1);
235
gen_op_movl_Tx_reg (state,
236
&tbp,
237
&len, 1,
238
rn);
239
GEN_OP (tbp, len,
240
op_addl_T0_T1_sq);
241
gen_op_movl_reg_Tx (state,
242
&tbp,
243
&len, rd,
244
0);
245
GEN_OP (tbp, len, op_set_q);
246
break;
247
case 0x9:
248
if (x) {
249
//smulwy
250
GEN_OP (tbp, len,
251
op_smulwy_T0_T1);
252
gen_op_movl_reg_Tx
253
(state, &tbp,
254
&len, rd, 0);
255
}
256
else {
257
//smlawy
258
//gen_op_movl_Tx_reg(state, &tbp, &len, 2, rn);
259
//GEN_OP(tbp, len, op_smlawy_T2_T1_T0);
260
GEN_OP (tbp, len,
261
op_smulwy_T0_T1);
262
gen_op_movl_Tx_reg
263
(state, &tbp,
264
&len, 1, rn);
265
GEN_OP (tbp, len,
266
op_addl_T0_T1_sq);
267
gen_op_movl_reg_Tx
268
(state, &tbp,
269
&len, rd, 0);
270
GEN_OP (tbp, len,
271
op_set_q);
272
}
273
break;
274
case 0xa:
275
//smlalxy
276
GEN_OP (tbp, len,
277
op_mul_T0_T1);
278
gen_op_movl_Tx_reg (state, &tbp, &len, 1, rn); //rdlo
279
gen_op_movl_Tx_reg (state, &tbp, &len, 2, rd); //rdhi
280
GEN_OP (tbp, len,
281
op_smlalxy_T2_T1_T0);
282
gen_op_movl_reg_Tx (state,
283
&tbp,
284
&len, 1,
285
rn);
286
gen_op_movl_reg_Tx (state,
287
&tbp,
288
&len, 2,
289
rd);
290
break;
291
case 0xb:
292
//smulxy
293
GEN_OP (tbp, len,
294
op_mul_T0_T1);
295
gen_op_movl_reg_Tx (state,
296
&tbp,
297
&len, rd,
298
0);
299
break;
300
}
301
goto translate_word_end;
302
}
303
else if (sh == 0x1 && op1 == 0xb) {
304
//clz
305
rm = insn & 0xf;
306
gen_op_movl_Tx_reg (state, &tbp, &len,
307
1, rm);
308
GEN_OP (tbp, len, op_clzl_T0_T1);
309
rd = (insn >> 12) & 0xf;
310
gen_op_movl_reg_Tx (state, &tbp, &len,
311
rd, 0);
312
goto translate_word_end;
313
}
314
}
315
316
if (op1 == 0x8 || op1 == 0xa) {
317
//mrs
318
gen_op_mrs (state, &tbp, &len, insn);
319
goto translate_word_end;
320
}
321
}
322
//AJ2D--------------------------------------------------------------------------
323
324
logic_cc = table_logic_cc[op1] & set_cc;
325
//in arm_arm A 5.1
326
if (insn & (1 << 25)) {
327
//immediate operand arm_arm A 5.1.3
328
val = insn & 0xff;
329
shift = (uint8_t) ((insn >> 8) & 0xf) * 2;
330
//ror
331
if (shift)
332
val = (val >> shift) | (val << (32 - shift));
333
//op=set val to t1
334
gen_op_movl_Tx_im (state, &tbp, &len, 1, val);
335
336
if (logic_cc && shift) {
337
//val = ((insn & 0xff) >> (shift - 1)) & 1;
338
//op=set val[31] to C
339
if (val >> 31) {
340
GEN_OP (tbp, len, op_logic_1_sc);
341
}
342
else {
343
GEN_OP (tbp, len, op_logic_0_sc);
344
}
345
}
346
}
347
else {
348
//register
349
rm = (insn) & 0xf;
350
//op=set rm(0-15) to t1
351
gen_op_movl_Tx_reg (state, &tbp, &len, 1, rm);
352
353
//teawater add check thumb 2005.07.21-------------------------------------------
354
if (op1 == 0x9 && !set_cc
355
&& ((insn >> 8) & 0xf) == 0xf) {
356
//bx or blx(2)
357
uint32_t tmp = (insn >> 4) & 0xf;
358
359
if (tmp == 0x1) {
360
//bx
361
GEN_OP (tbp, len, op_bx_T1);
362
}
363
else if (tmp == 0x2) {
364
//blx(2)
365
GEN_OP (tbp, len, op_blx_T1);
366
}
367
if (tmp == 0x1 || tmp == 0x2) {
368
state->trap = 1;
369
goto translate_word_end;
370
}
371
}
372
//AJ2D--------------------------------------------------------------------------
373
374
shiftop = (insn >> 5) & 3;
375
if (!(insn & (1 << 4))) {
376
//imm
377
shift = (uint8_t) (insn >> 7) & 0x1f;
378
if (shift != 0) {
379
//op=shift, & set CF if logic_cc
380
if (logic_cc) {
381
gen_op_shift_T1_im_sc (state,
382
&tbp,
383
&len,
384
shiftop,
385
shift);
386
}
387
gen_op_shift_T1_im (state, &tbp, &len,
388
shiftop, shift);
389
}
390
else {
391
GEN_OP (tbp, len, op_movl_T2_T1);
392
GEN_OP (tbp, len,
393
op_shift_T1_0[shiftop]);
394
if (logic_cc) {
395
GEN_OP (tbp, len,
396
op_shift_T2_0_sc
397
[shiftop]);
398
GEN_OP (tbp, len, op_set_cf);
399
}
400
}
401
}
402
else {
403
//reg
404
rs = (insn >> 8) & 0xf;
405
//op=set rs(0-15) to t0
406
gen_op_movl_Tx_reg (state, &tbp, &len, 0, rs);
407
//op=shift, & set CF if logic_cc
408
if (logic_cc) {
409
//op=shift & set CF
410
gen_op_shift_T1_T0_sc (state, &tbp,
411
&len, shiftop);
412
}
413
else {
414
//op=shift
415
gen_op_shift_T1_T0 (state, &tbp, &len,
416
shiftop);
417
}
418
}
419
}
420
421
if ((op1 == 0x9 || op1 == 0xb) && !set_cc) {
422
//msr T1, psr
423
gen_op_msr (state, &tbp, &len, insn);
424
goto translate_word_end;
425
}
426
427
//data processing instruction
428
if (op1 != 0x0f && op1 != 0x0d) { //!mov && !mvn
429
rn = (insn >> 16) & 0xf;
430
//op=set rn(0-15) to t0
431
gen_op_movl_Tx_reg (state, &tbp, &len, 0, rn);
432
}
433
rd = (insn >> 12) & 0xf;
434
arm2x86_get_dp_op[op1] (state, &tbp, &len, set_cc, rd);
435
arm2x86_get_dp_op_setcpsr[op1] (state, &tbp, &len, set_cc,
436
rd);
437
}
438
else {
439
//other instructions
440
op1 = (insn >> 24) & 0xf;
441
sh = (insn >> 5) & 3;
442
443
if (cond == NV) {
444
//teawater add for xscale(arm v5) 2005.09.15------------------------------------
445
if (state->is_v5) {
446
switch (op1) {
447
case 0x5:
448
case 0x7:
449
if (((insn >> 12) & 0xf) == 0xf) {
450
//pld Ignored
451
452
}
453
goto translate_word_out;
454
break;
455
//teawater add check thumb 2005.07.21-------------------------------------------
456
case 0xa:
457
case 0xb:
458
//blx(1)
459
gen_op_movl_trap_im_use_T2 (state,
460
&tbp,
461
&len,
462
TRAP_UNPREDICTABLE);
463
GEN_OP (tbp, len, op_return);
464
goto out;
465
break;
466
//AJ2D--------------------------------------------------------------------------
467
case 0xc:
468
case 0xd:
469
//ldc2 stc2
470
if (state->is_XScale
471
&& ((insn >> 8) & 0xf) == 0) {
472
//mar mra
473
goto translate_word_out;
474
}
475
break;
476
case 0xe:
477
//cdp2 mrc2 mcr2
478
if (state->is_XScale
479
&& (insn & (1 << 4))
480
&& (!(insn & (1 << 20)))
481
&& ((insn >> 8) & 0xf) == 0) {
482
//mia miaph miabb miabt miatb miatt
483
goto translate_word_out;
484
}
485
break;
486
default:
487
goto translate_word_out;
488
break;
489
}
490
}
491
//AJ2D--------------------------------------------------------------------------
492
else {
493
goto translate_word_out;
494
}
495
}
496
497
if (sh != 0 && (op1 == 0 || op1 == 1)) {
498
//ldrh strh ldrsh ldrsb
499
gen_op_ldrhstrh (state, &tbp, &len, insn, sh);
500
}
501
else {
502
arm2x86_get_other_op[op1] (state, insn, &tbp, &len);
503
}
504
}
505
506
translate_word_end:
507
if (state->trap) {
508
GEN_OP (tbp, len, op_return);
509
}
510
if (toplen && begin) {
511
//set jmp length of condition code
512
//begin[toplen-1] = (uint8_t)(len - toplen);
513
int *p_tmp = (int *) (begin + (toplen - sizeof (int)));
514
*p_tmp = len - toplen;
515
}
516
517
translate_word_out:
518
//r15 += 4
519
if (!state->trap || toplen) {
520
GEN_OP (tbp, len, op_addpc);
521
state->trap = 0;
522
}
523
//TEA_OUT(GEN_OP(tbp, len, op_return));
524
525
out:
526
if (len > TB_INSN_LEN_MAX) {
527
fprintf (stderr,
528
"SKYEYE: TB_INSN_LEN_MAX: insn %x len %d > TB_INSN_LEN_MAX %d.\n",
529
insn, len, TB_INSN_LEN_MAX);
530
skyeye_exit (-1);
531
}
532
/*#ifdef TEA_DEBUG
533
{
534
static int insn_max = 0;
535
if (len > insn_max) {
536
insn_max = len;
537
fprintf(stderr, "\nSKYEYE: insn_max = %d.\n", insn_max);
538
}
539
}
540
#endif //TEA_DEBUG*/
541
542
return (len);
543
}
544
545
//teawater add tb_insn_addr 2005.10.08------------------------------------------
546
/*
547
static uint8_t *
548
tb_translate(ARMul_State * state, ARMword *addr, ARMword *tb_begin_addr, uint8_t *tbp, ARMword *tran_addr, uint8_t **tbp_now)
549
*/
550
static uint8_t *
551
tb_translate(ARMul_State * state, ARMword *addr, ARMword *tb_begin_addr, tb_t *tbt)
552
{
553
int len;
554
uint8_t *ret = NULL;
555
// ARMword *tb_end_addr = tb_begin_addr + (TB_LEN - (*tran_addr - TB_ALIGN(*tran_addr))) / sizeof(ARMword);
556
ARMword *tb_end_addr = tb_begin_addr + (TB_LEN - (tbt->tran_addr - TB_ALIGN(tbt->tran_addr))) / sizeof(ARMword);
557
//teawater change for local tb branch directly jump 2005.10.10------------------
558
tb_branch_save_t *e;
559
struct list_head *list,*n;
560
//AJ2D--------------------------------------------------------------------------
561
562
//teawater change for local tb branch directly jump 2005.10.10------------------
563
INIT_LIST_HEAD(&tb_branch_save_list);
564
now_tbt = tbt;
565
tbt->ret_addr = 0;
566
//AJ2D--------------------------------------------------------------------------
567
for( ; tb_begin_addr < tb_end_addr; tb_begin_addr++) {
568
//set ret
569
if (addr == tb_begin_addr) {
570
ret = tbt->tbp_now;
571
}
572
//set insn_addr
573
tbt->insn_addr[(tbt->tran_addr - tbt->addr) / sizeof(uint8_t *)] = tbt->tbp_now;
574
575
//translate
576
len = translate_word(state, *tb_begin_addr, tbt->tbp_now);
577
tbt->tbp_now += len;
578
//teawater change for if trap translate stop 2005.07.23-------------------------
579
//*tran_addr += 4;
580
tbt->tran_addr += 4;
581
if (state->trap && ret && (tbt->tran_addr > tbt->ret_addr)) {
582
break;
583
}
584
//AJ2D--------------------------------------------------------------------------
585
}
586
//teawater change for if trap translate stop 2005.07.23-------------------------
587
//*tbp_now = tbp;
588
if (!state->trap) {
589
GEN_OP(tbt->tbp_now, len, op_return);
590
}
591
//AJ2D--------------------------------------------------------------------------
592
//teawater change for local tb branch directly jump 2005.10.10------------------
593
list_for_each_safe(list, n, &tb_branch_save_list) {
594
e = list_entry(list, tb_branch_save_t, list);
595
//memcpy((e->tbp - sizeof(ARMword)), &((uint32_t)tbt->insn_addr[(e->dst_addr - tbt->addr) / sizeof(uint8_t *)] - (uint32_t)e->tbp), sizeof(ARMword));
596
*((uint32_t *)(e->tbp - sizeof(ARMword))) = (uint32_t)tbt->insn_addr[(e->dst_addr - tbt->addr) / sizeof(uint8_t *)] - (uint32_t)e->tbp;
597
}
598
//AJ2D--------------------------------------------------------------------------
599
600
return(ret);
601
}
602
//AJ2D--------------------------------------------------------------------------
603
604
//teawater remove tb_translate_find 2005.10.21----------------------------------
605
/*static uint8_t *
606
tb_translate_find (ARMul_State * state, ARMword * addr,
607
ARMword * tb_begin_addr, uint8_t * tbp)
608
{
609
int len;
610
uint8_t *ret = NULL;
611
ARMword *tb_end_addr = tb_begin_addr + TB_LEN / sizeof (ARMword);
612
613
for (; tb_begin_addr < tb_end_addr; tb_begin_addr++) {
614
if (addr == tb_begin_addr) {
615
ret = tbp;
616
break;
617
}
618
len = translate_word (state, *tb_begin_addr, NULL);
619
tbp += len;
620
}
621
622
return (ret);
623
}*/
624
//AJ2D--------------------------------------------------------------------------
625
626
//teawater add tb_insn_addr 2005.10.06------------------------------------------
627
/*
628
static inline void
629
tb_insert_cache (tb_t * tbt, ARMword addr, uint8_t * ret)
630
{
631
tb_cache_t *e = malloc (sizeof (tb_cache_t));
632
633
if (e) {
634
uint32_t cache_num = addr & (TB_TBT_CACHE_MAX - 1);
635
636
if (!tbt->cache[cache_num].next)
637
INIT_LIST_HEAD (&tbt->cache[cache_num]);
638
e->addr = addr;
639
e->tp = ret;
640
list_add_tail (&e->list, &tbt->cache[cache_num]);
641
}
642
else {
643
TEA_OUT (fprintf
644
(stderr,
645
"SKYEYE: tb_find: Error allocating mem for cache.\n"));
646
}
647
}
648
649
static inline uint8_t *
650
tb_find_cache (tb_t * tbt, ARMword addr)
651
{
652
tb_cache_t *e;
653
struct list_head *list, *n;
654
uint32_t cache_num = addr & (TB_TBT_CACHE_MAX - 1);
655
656
if (tbt->cache[cache_num].next) {
657
list_for_each_safe (list, n, &tbt->cache[cache_num]) {
658
e = list_entry (list, tb_cache_t, list);
659
if (e->addr == addr) {
660
return (e->tp);
661
}
662
}
663
}
664
665
return (NULL);
666
}
667
668
static inline void
669
tb_clear_cache (tb_t * tbt)
670
{
671
tb_cache_t *e;
672
struct list_head *list, *n;
673
uint32_t cache_num;
674
675
for (cache_num = 0; cache_num < TB_TBT_CACHE_MAX; cache_num++) {
676
if (tbt->cache[cache_num].next) {
677
list_for_each_safe (list, n, &tbt->cache[cache_num]) {
678
e = list_entry (list, tb_cache_t, list);
679
list_del_init (&e->list);
680
free (e);
681
}
682
}
683
}
684
}
685
*/
686
//AJ2D--------------------------------------------------------------------------
687
688
static inline void
689
tb_get_tbp (tb_t * tbt)
690
{
691
tb_t *e;
692
struct list_head *list;
693
694
if (tbp_now_size) {
695
tbt->tbp = tbp_now;
696
tbp_now += TB_TBP_MAX;
697
tbp_now_size -= TB_TBP_MAX;
698
}
699
else {
700
//get the oldest tbt from tbp_dynamic_list's head
701
if (list_empty (&tbp_dynamic_list)) {
702
fprintf (stderr, "SKYEYE: mem_reset: some bug.\n");
703
skyeye_exit (-1);
704
}
705
e = list_entry (tbp_dynamic_list.next, tb_t, list);
706
tbt->tbp = e->tbp;
707
e->tbp = NULL;
708
//teawater add tb_insn_addr 2005.10.06------------------------------------------
709
/*if (e->ted) {
710
tb_clear_cache(e);
711
e->ted = 0;
712
}*/
713
e->ted = 0;
714
//AJ2D--------------------------------------------------------------------------
715
list_del_init (&e->list);
716
}
717
}
718
719
static inline mem_bank_t *
720
tb_get_mbp (ARMword addr, int *bank_num)
721
{
722
mem_bank_t *ret;
723
724
ret = insn_bank_ptr (addr);
725
if (ret) {
726
*bank_num = ret - state->mem_bank->mem_banks;
727
}
728
729
return (ret);
730
}
731
732
uint8_t *
733
tb_find (ARMul_State * state, ARMword ADDR)
734
{
735
uint8_t *ret = NULL;
736
ARMword addr, align_addr;
737
ARMword *real_begin_addr, *real_addr;
738
static ARMword save_align_addr = 0x1;
739
static tb_t *tbt;
740
static uint8_t *tbp;
741
static mem_bank_t *mbp;
742
static int bank_num = -1;
743
744
//get addr & align_addr
745
if (mmu_v2p_dbct (state, ADDR, &addr)) {
746
goto out;
747
}
748
align_addr = TB_ALIGN (addr);
749
if (align_addr == save_align_addr) {
750
goto get_ret;
751
}
752
753
//init
754
bank_num = -1;
755
save_align_addr = 0x1;
756
757
//get tbt
758
if (tbt_table_size) {
759
//dynamic tbt
760
tbt = &(tbt_table
761
[align_addr & (uint32_t) (tbt_table_size - 1)]);
762
if (tbt->addr != align_addr) {
763
if (tbt->ted) {
764
//teawater add tb_insn_addr 2005.10.06------------------------------------------
765
//tb_clear_cache(tbt);
766
//AJ2D--------------------------------------------------------------------------
767
tbt->ted = 0;
768
}
769
tbt->addr = align_addr;
770
}
771
772
//get tbt->tbp
773
if (!tbt->tbp) {
774
tb_get_tbp (tbt);
775
}
776
else {
777
if (tbp_dynamic) {
778
list_del_init (&tbt->list);
779
}
780
}
781
}
782
else {
783
//static tbt
784
mbp = tb_get_mbp (align_addr, &bank_num);
785
if (!mbp) {
786
goto out;
787
}
788
if (!state->mem.tbt[bank_num]) {
789
if (!tbp_dynamic) {
790
//koodailar add it for mignw 2005.12.18-----------------------------------------
791
#ifdef __MINGW32__
792
state->mem.tbp[bank_num] =
793
malloc (state->mem.rom_size[bank_num] /
794
sizeof (ARMword) *
795
TB_INSN_LEN_MAX +
796
state->mem.rom_size[bank_num] /
797
TB_LEN * op_return.len);
798
if (state->mem.tbp[bank_num] == NULL) {
799
fprintf (stderr,
800
"SKYEYE: mem_reset: Error allocating mem for bank number %d.\n",
801
bank_num);
802
skyeye_exit (-1);
803
}
804
#else
805
state->mem.tbp[bank_num] =
806
mmap (NULL,
807
state->mem.rom_size[bank_num] /
808
sizeof (ARMword) *
809
TB_INSN_LEN_MAX +
810
state->mem.rom_size[bank_num] /
811
TB_LEN * op_return.len,
812
PROT_READ | PROT_WRITE |
813
PROT_EXEC,
814
MAP_PRIVATE | MAP_ANONYMOUS, -1,
815
0);
816
if (state->mem.tbp[bank_num] == MAP_FAILED) {
817
fprintf (stderr,
818
"SKYEYE: mem_reset: Error allocating mem for bank number %d.\n",
819
bank_num);
820
skyeye_exit (-1);
821
}
822
#endif
823
//end koodailar ----------------------------------------------------------------
824
}
825
state->mem.tbt[bank_num] =
826
malloc (state->mem.rom_size[bank_num] /
827
TB_LEN * sizeof (tb_t));
828
if (!state->mem.tbt[bank_num]) {
829
fprintf (stderr,
830
"SKYEYE: mem_reset: Error allocating mem for bank number %d.\n",
831
bank_num);
832
skyeye_exit (-1);
833
}
834
memset (state->mem.tbt[bank_num], 0,
835
state->mem.rom_size[bank_num] / TB_LEN *
836
sizeof (tb_t));
837
}
838
tbt = &(state->mem.
839
tbt[bank_num][(align_addr - mbp->addr) / TB_LEN]);
840
//teawater add tb_insn_addr 2005.10.08------------------------------------------
841
tbt->addr = align_addr;
842
//AJ2D--------------------------------------------------------------------------
843
844
//get tbt->tbp
845
if (!tbt->tbp) {
846
if (tbp_dynamic) {
847
//dynamic tbp
848
tb_get_tbp (tbt);
849
}
850
else {
851
tbt->tbp =
852
&(state->mem.
853
tbp[bank_num][(align_addr -
854
mbp->addr) /
855
sizeof (ARMword) *
856
TB_INSN_LEN_MAX +
857
(align_addr -
858
mbp->addr) / TB_LEN *
859
op_return.len]);
860
}
861
}
862
else {
863
if (tbp_dynamic) {
864
list_del_init (&tbt->list);
865
}
866
}
867
}
868
869
//get tbp
870
tbp = tbt->tbp;
871
872
//set tb_now to check the current running block is written.
873
state->tb_now = (void *) tbt;
874
875
//set save_align_addr
876
save_align_addr = align_addr;
877
878
//add tbt to tbp_dynamic_list's tail to be the newest one
879
if (tbp_dynamic) {
880
list_add_tail (&tbt->list, &tbp_dynamic_list);
881
}
882
883
//find ret from tb
884
get_ret:
885
if (tbt->ted) {
886
//tbt has been translated
887
//teawater add last use addr 2005.10.10-----------------------------------------
888
if (tbt->last_addr == addr) {
889
return(tbt->last_tbp);
890
}
891
892
//addr is align
893
/*if (addr == align_addr) {
894
ret = tbp;
895
goto out;
896
}*/
897
//AJ2D--------------------------------------------------------------------------
898
899
if (addr >= tbt->tran_addr) {
900
//block need continue translate
901
if (bank_num == -1) {
902
mbp = tb_get_mbp (align_addr, &bank_num);
903
if (!mbp) {
904
goto out;
905
}
906
}
907
real_begin_addr =
908
&(state->mem.
909
rom[bank_num][(align_addr -
910
mbp->addr) /
911
sizeof (ARMword)]) +
912
(tbt->tran_addr -
913
align_addr) / sizeof (ARMword);
914
real_addr =
915
real_begin_addr + (addr -
916
tbt->tran_addr) /
917
sizeof (ARMword);
918
//teawater add tb_insn_addr 2005.10.08------------------------------------------
919
//ret = tb_translate(state, real_addr, real_begin_addr, tbt->tbp_now, &tbt->tran_addr, &tbt->tbp_now);
920
ret = tb_translate(state, real_addr, real_begin_addr, tbt);
921
//AJ2D--------------------------------------------------------------------------
922
}
923
else {
924
//teawater add tb_insn_addr 2005.10.08------------------------------------------
925
/*//find in cache
926
ret = tb_find_cache(tbt, addr);
927
if (ret) {
928
goto out;
929
}
930
931
if (bank_num == -1) {
932
mbp = tb_get_mbp(align_addr, &bank_num);
933
if(!mbp) {
934
goto out;
935
}
936
}
937
real_begin_addr = &(state->mem.rom[bank_num][(align_addr - mbp->addr) / sizeof(ARMword)]);
938
real_addr = real_begin_addr + (addr - align_addr) / sizeof(ARMword);
939
ret = tb_translate_find(state, real_addr, real_begin_addr, tbp);*/
940
941
//find in insn_addr
942
ret = tbt->insn_addr[(addr - align_addr) / sizeof(uint8_t *)];
943
//AJ2D--------------------------------------------------------------------------
944
}
945
}
946
else {
947
//tbt has not been translated
948
if (bank_num == -1) {
949
mbp = tb_get_mbp (align_addr, &bank_num);
950
if (!mbp) {
951
goto out;
952
}
953
}
954
real_begin_addr =
955
&(state->mem.
956
rom[bank_num][(align_addr -
957
mbp->addr) / sizeof (ARMword)]);
958
real_addr =
959
real_begin_addr + (addr -
960
align_addr) / sizeof (ARMword);
961
tbt->tran_addr = align_addr;
962
//teawater add tb_insn_addr 2005.10.08------------------------------------------
963
//ret = tb_translate(state, real_addr, real_begin_addr, tbp, &tbt->tran_addr, &tbt->tbp_now);
964
tbt->tbp_now = tbp;
965
ret = tb_translate(state, real_addr, real_begin_addr, tbt);
966
/*if (ret) {
967
tbt->ted = 1;
968
}*/
969
tbt->ted = 1;
970
//AJ2D--------------------------------------------------------------------------
971
}
972
973
//teawater add tb_insn_addr 2005.10.08------------------------------------------
974
/*if (ret) {
975
tb_insert_cache(tbt, addr, ret);
976
}*/
977
//AJ2D--------------------------------------------------------------------------
978
out:
979
//teawater add last use addr 2005.10.10-----------------------------------------
980
if (ret) {
981
tbt->last_addr = addr;
982
tbt->last_tbp = ret;
983
}
984
//AJ2D--------------------------------------------------------------------------
985
return (ret);
986
}
987
988
int
989
tb_setdirty (ARMul_State * state, ARMword addr, mem_bank_t * mbp)
990
{
991
ARMword align_addr = TB_ALIGN (addr);
992
static ARMword save_align_addr = 0x1;
993
static tb_t *tbt = NULL;
994
995
if (save_align_addr == align_addr) {
996
goto setdirty;
997
}
998
999
save_align_addr = 0x1;
1000
//get tbt
1001
if (tbt_table_size) {
1002
tbt = &(tbt_table
1003
[align_addr & (uint32_t) (tbt_table_size - 1)]);
1004
if (tbt->addr != align_addr) {
1005
return (0);
1006
}
1007
}
1008
else {
1009
int bank_num;
1010
1011
if (!mbp) {
1012
mbp = tb_get_mbp (align_addr, &bank_num);
1013
if (!mbp) {
1014
return (0);
1015
}
1016
}
1017
else {
1018
bank_num = mbp - state->mem_bank->mem_banks;
1019
}
1020
if (!state->mem.tbt[bank_num]) {
1021
return (0);
1022
}
1023
tbt = &(state->mem.
1024
tbt[bank_num][(align_addr - mbp->addr) / TB_LEN]);
1025
}
1026
save_align_addr = align_addr;
1027
1028
setdirty:
1029
if (tbt->ted) {
1030
//teawater add tb_insn_addr 2005.10.09------------------------------------------
1031
//tb_clear_cache(tbt);
1032
//AJ2D--------------------------------------------------------------------------
1033
tbt->ted = 0;
1034
switch (state->cpu->cpu_val & state->cpu->cpu_mask) {
1035
case SA1100:
1036
case SA1110:
1037
mmu_wb_drain_all (state, (&state->mmu.u.sa_mmu.wb_t));
1038
break;
1039
case 0x41009200:
1040
mmu_wb_drain_all (state,
1041
(&state->mmu.u.arm920t_mmu.wb_t));
1042
break;
1043
};
1044
}
1045
1046
return (0);
1047
}
1048
1049
int tb_insn_len_max = 0;
1050
1051
int
1052
tb_insn_len_max_init (ARMul_State * state)
1053
{
1054
int dp_len = 0, other_len = 0;
1055
1056
//return if debug || irq || fiq || condition
1057
if (op_begin.len >
1058
op_movl_Tx_im[0].len + sizeof (ARMword) + op_begin_test_T0.len) {
1059
tb_insn_len_max += op_begin.len;
1060
}
1061
else {
1062
tb_insn_len_max +=
1063
op_movl_Tx_im[0].len + sizeof (ARMword) +
1064
op_begin_test_T0.len;
1065
}
1066
1067
//end
1068
tb_insn_len_max += op_return.len;
1069
tb_insn_len_max += op_addpc.len;
1070
//TEA_OUT(tb_insn_len_max += op_return.len);
1071
1072
//dp_len
1073
{
1074
int dp_head_len = 0;
1075
int sm_head;
1076
int op_setcpsr_nzc_len = 0, op_setcpsr_nzc_setr15_len =
1077
0, op_setcpsr_nzc_notsetr15_len =
1078
0, op_setcpsr_nzc_setreg_len = 0;
1079
int op_setcpsr_nzcv_len = 0, op_setcpsr_nzcv_setr15_len =
1080
0, op_setcpsr_nzcv_notsetr15_len =
1081
0, op_setcpsr_nzcv_setreg_len = 0;
1082
int dp_tmp1;
1083
1084
//dp_head_len
1085
{
1086
int dp_head_imm_len = 0, dp_head_reg_len = 0;
1087
1088
//dp_head_imm_len
1089
dp_head_imm_len += op_movl_Tx_im[1].len;
1090
dp_head_imm_len += sizeof (ARMword);
1091
if (op_logic_1_sc.len > op_logic_0_sc.len) {
1092
dp_head_imm_len += op_logic_1_sc.len;
1093
}
1094
else {
1095
dp_head_imm_len += op_logic_0_sc.len;
1096
}
1097
1098
//dp_head_reg_len
1099
{
1100
int dp_head_reg_imm_len =
1101
0, dp_head_reg_reg_len = 0;
1102
1103
dp_head_reg_len +=
1104
op_movl_Tx_reg_array_maxlen[1];
1105
1106
//dp_head_reg_imm_len
1107
//shift != 0
1108
dp_head_reg_imm_len +=
1109
op_shift_T1_im_sc_maxlen;
1110
dp_head_reg_imm_len += op_set_cf.len;
1111
dp_head_reg_imm_len += op_shift_T1_im_maxlen;
1112
dp_head_reg_imm_len += sizeof (uint8_t);
1113
//shift == 0
1114
dp_tmp1 = op_movl_T2_T1.len;
1115
dp_tmp1 += op_shift_T1_0_maxlen;
1116
dp_tmp1 += op_shift_T2_0_sc_maxlen;
1117
dp_tmp1 += op_set_cf.len;
1118
//compare
1119
if (dp_tmp1 > dp_head_reg_imm_len)
1120
dp_head_reg_imm_len = dp_tmp1;
1121
1122
//dp_head_reg_reg_len
1123
if (op_shift_T1_T0_sc_maxlen + op_set_cf.len >
1124
op_shift_T1_T0_maxlen) {
1125
dp_head_reg_reg_len +=
1126
op_shift_T1_T0_sc_maxlen +
1127
op_set_cf.len;
1128
}
1129
else {
1130
dp_head_reg_reg_len +=
1131
op_shift_T1_T0_maxlen;
1132
}
1133
dp_head_reg_reg_len +=
1134
op_movl_Tx_reg_array_maxlen[0];
1135
1136
if (dp_head_reg_imm_len > dp_head_reg_reg_len) {
1137
dp_head_reg_len +=
1138
dp_head_reg_imm_len;
1139
}
1140
else {
1141
dp_head_reg_len +=
1142
dp_head_reg_reg_len;
1143
}
1144
}
1145
1146
if (dp_head_imm_len > dp_head_reg_len) {
1147
dp_head_len = dp_head_imm_len;
1148
}
1149
else {
1150
dp_head_len = dp_head_reg_len;
1151
}
1152
}
1153
1154
//op_setcpsr_nzc_len
1155
op_setcpsr_nzc_len += op_logic_T0_sn.len;
1156
//op_setcpsr_nzc_len += op_set_nf.len;
1157
op_setcpsr_nzc_len += op_logic_T0_sz.len;
1158
//op_setcpsr_nzc_len += op_set_zf.len;
1159
//op_setcpsr_nzc_len += op_set_cf.len;
1160
op_setcpsr_nzc_len += op_set_nzcf.len;
1161
1162
//op_setcpsr_nzcv_len
1163
op_setcpsr_nzcv_len += op_logic_T0_sn.len;
1164
//op_setcpsr_nzcv_len += op_set_nf.len;
1165
op_setcpsr_nzcv_len += op_logic_T0_sz.len;
1166
//op_setcpsr_nzcv_len += op_set_zf.len;
1167
//op_setcpsr_nzcv_len += op_set_cf.len;
1168
//op_setcpsr_nzcv_len += op_set_vf.len;
1169
op_setcpsr_nzcv_len += op_set_nzcvf.len;
1170
1171
//op_setcpsr_nzc_setreg
1172
op_setcpsr_nzc_notsetr15_len += op_setcpsr_nzc_len;
1173
op_setcpsr_nzc_notsetr15_len +=
1174
op_movl_reg_Tx_array_maxlen[0];
1175
op_setcpsr_nzc_setr15_len += op_movl_reg_Tx_array_maxlen[0];
1176
op_setcpsr_nzc_setr15_len +=
1177
op_movl_Tx_im[2].len + sizeof (ARMword) +
1178
op_movl_trap_T2.len;
1179
if (op_setcpsr_nzc_notsetr15_len > op_setcpsr_nzc_setr15_len) {
1180
op_setcpsr_nzc_setreg_len +=
1181
op_setcpsr_nzc_notsetr15_len;
1182
}
1183
else {
1184
op_setcpsr_nzc_setreg_len +=
1185
op_setcpsr_nzc_setr15_len;
1186
}
1187
1188
//op_setcpsr_nzcv_setreg
1189
op_setcpsr_nzcv_notsetr15_len += op_setcpsr_nzcv_len;
1190
op_setcpsr_nzcv_notsetr15_len +=
1191
op_movl_reg_Tx_array_maxlen[0];
1192
op_setcpsr_nzcv_setr15_len += op_movl_reg_Tx_array_maxlen[0];
1193
op_setcpsr_nzcv_setr15_len +=
1194
op_movl_Tx_im[2].len + sizeof (ARMword) +
1195
op_movl_trap_T2.len;
1196
if (op_setcpsr_nzcv_notsetr15_len >
1197
op_setcpsr_nzcv_setr15_len) {
1198
op_setcpsr_nzcv_setreg_len +=
1199
op_setcpsr_nzcv_notsetr15_len;
1200
}
1201
else {
1202
op_setcpsr_nzcv_setreg_len +=
1203
op_setcpsr_nzcv_setr15_len;
1204
}
1205
1206
//mrs
1207
if (op_mrs_T0_spsr.len > op_mrs_T0_cpsr.len) {
1208
dp_len += op_mrs_T0_spsr.len;
1209
}
1210
else {
1211
dp_len += op_mrs_T0_cpsr.len;
1212
}
1213
dp_len += op_movl_reg_Tx_array_maxlen[0];
1214
TEA_OUT (printf
1215
("mrs insn's max len is %d\n",
1216
dp_len + tb_insn_len_max));
1217
1218
//teawater add for xscale(arm v5) 2005.09.14------------------------------------]
1219
//clz
1220
dp_tmp1 = 0;
1221
dp_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1222
dp_tmp1 += op_clzl_T0_T1.len;
1223
dp_tmp1 += op_movl_reg_Tx_array_maxlen[0];
1224
if (dp_tmp1 > dp_len) {
1225
dp_len = dp_tmp1;
1226
}
1227
TEA_OUT (printf
1228
("clz insn's max len is %d\n",
1229
dp_tmp1 + tb_insn_len_max));
1230
//AJ2D--------------------------------------------------------------------------
1231
1232
//teawater add for xscale(arm v5) 2005.09.26------------------------------------
1233
//qadd
1234
dp_tmp1 = 0;
1235
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1236
dp_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1237
dp_tmp1 += op_qaddl_T0_T1_sq.len;
1238
dp_tmp1 += op_movl_reg_Tx_array_maxlen[0];
1239
dp_tmp1 += op_set_q.len;
1240
if (dp_tmp1 > dp_len) {
1241
dp_len = dp_tmp1;
1242
}
1243
TEA_OUT (printf
1244
("qadd insn's max len is %d\n",
1245
dp_tmp1 + tb_insn_len_max));
1246
1247
//qsub
1248
dp_tmp1 = 0;
1249
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1250
dp_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1251
dp_tmp1 += op_qsubl_T0_T1_sq.len;
1252
dp_tmp1 += op_movl_reg_Tx_array_maxlen[0];
1253
dp_tmp1 += op_set_q.len;
1254
if (dp_tmp1 > dp_len) {
1255
dp_len = dp_tmp1;
1256
}
1257
TEA_OUT (printf
1258
("qsub insn's max len is %d\n",
1259
dp_tmp1 + tb_insn_len_max));
1260
1261
//qdadd
1262
dp_tmp1 = 0;
1263
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1264
dp_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1265
dp_tmp1 += op_qaddl_T0_T1_sq.len;
1266
dp_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1267
dp_tmp1 += op_qaddl_T0_T1_sq.len;
1268
dp_tmp1 += op_movl_reg_Tx_array_maxlen[0];
1269
dp_tmp1 += op_set_q.len;
1270
if (dp_tmp1 > dp_len) {
1271
dp_len = dp_tmp1;
1272
}
1273
TEA_OUT (printf
1274
("qdadd insn's max len is %d\n",
1275
dp_tmp1 + tb_insn_len_max));
1276
1277
//qdsub
1278
dp_tmp1 = 0;
1279
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1280
dp_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1281
dp_tmp1 += op_qaddl_T0_T1_sq.len;
1282
dp_tmp1 += op_movl_T1_T0.len;
1283
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1284
dp_tmp1 += op_qsubl_T0_T1_sq.len;
1285
dp_tmp1 += op_movl_reg_Tx_array_maxlen[0];
1286
dp_tmp1 += op_set_q.len;
1287
if (dp_tmp1 > dp_len) {
1288
dp_len = dp_tmp1;
1289
}
1290
TEA_OUT (printf
1291
("qdsub insn's max len is %d\n",
1292
dp_tmp1 + tb_insn_len_max));
1293
1294
//sm_head
1295
sm_head = 0;
1296
sm_head += op_movl_Tx_reg_array_maxlen[0];
1297
sm_head += op_movl_Tx_reg_array_maxlen[1];
1298
if (op_hi_T0.len > op_lo_T0.len) {
1299
sm_head += op_hi_T0.len;
1300
}
1301
else {
1302
sm_head += op_lo_T0.len;
1303
}
1304
sm_head += op_signextend_halfword_T0.len;
1305
if (op_hi_T1.len > op_lo_T1.len) {
1306
sm_head += op_hi_T1.len;
1307
}
1308
else {
1309
sm_head += op_lo_T1.len;
1310
}
1311
sm_head += op_signextend_halfword_T1.len;
1312
1313
//smlaxy
1314
dp_tmp1 = sm_head;
1315
dp_tmp1 += op_mul_T0_T1.len;
1316
dp_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1317
dp_tmp1 += op_addl_T0_T1_sq.len;
1318
dp_tmp1 += op_movl_reg_Tx_array_maxlen[0];
1319
dp_tmp1 += op_set_q.len;
1320
if (dp_tmp1 > dp_len) {
1321
dp_len = dp_tmp1;
1322
}
1323
TEA_OUT (printf
1324
("smlaxy insn's max len is %d\n",
1325
dp_tmp1 + tb_insn_len_max));
1326
1327
//smulwy
1328
dp_tmp1 = sm_head;
1329
dp_tmp1 += op_smulwy_T0_T1.len;
1330
dp_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1331
if (dp_tmp1 > dp_len) {
1332
dp_len = dp_tmp1;
1333
}
1334
TEA_OUT (printf
1335
("smulwy insn's max len is %d\n",
1336
dp_tmp1 + tb_insn_len_max));
1337
1338
//smlawy
1339
dp_tmp1 = sm_head;
1340
dp_tmp1 += op_smulwy_T0_T1.len;
1341
dp_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1342
dp_tmp1 += op_addl_T0_T1_sq.len;
1343
dp_tmp1 += op_movl_reg_Tx_array_maxlen[0];
1344
dp_tmp1 += op_set_q.len;
1345
if (dp_tmp1 > dp_len) {
1346
dp_len = dp_tmp1;
1347
}
1348
TEA_OUT (printf
1349
("smlawy insn's max len is %d\n",
1350
dp_tmp1 + tb_insn_len_max));
1351
1352
//smlalxy
1353
dp_tmp1 = sm_head;
1354
dp_tmp1 += op_mul_T0_T1.len;
1355
dp_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1356
dp_tmp1 += op_movl_Tx_reg_array_maxlen[2];
1357
dp_tmp1 += op_smlalxy_T2_T1_T0.len;
1358
dp_tmp1 += op_movl_reg_Tx_array_maxlen[1];
1359
dp_tmp1 += op_movl_reg_Tx_array_maxlen[2];
1360
if (dp_tmp1 > dp_len) {
1361
dp_len = dp_tmp1;
1362
}
1363
TEA_OUT (printf
1364
("smlalxy insn's max len is %d\n",
1365
dp_tmp1 + tb_insn_len_max));
1366
1367
//smulxy
1368
dp_tmp1 = sm_head;
1369
dp_tmp1 += op_mul_T0_T1.len;
1370
dp_tmp1 += op_movl_reg_Tx_array_maxlen[0];
1371
if (dp_tmp1 > dp_len) {
1372
dp_len = dp_tmp1;
1373
}
1374
TEA_OUT (printf
1375
("smulxy insn's max len is %d\n",
1376
dp_tmp1 + tb_insn_len_max));
1377
//AJ2D--------------------------------------------------------------------------
1378
1379
//teawater add check thumb 2005.07.21-------------------------------------------
1380
//bx or blx(2)
1381
dp_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1382
if (op_bx_T1.len > op_blx_T1.len) {
1383
dp_tmp1 += op_bx_T1.len;
1384
}
1385
else {
1386
dp_tmp1 += op_blx_T1.len;
1387
}
1388
if (dp_tmp1 > dp_len) {
1389
dp_len = dp_tmp1;
1390
}
1391
TEA_OUT (printf
1392
("bx or blx(2) insn's max len is %d\n",
1393
dp_tmp1 + tb_insn_len_max));
1394
//AJ2D--------------------------------------------------------------------------
1395
1396
//msr
1397
dp_tmp1 = 0;
1398
dp_tmp1 += dp_head_len;
1399
dp_tmp1 += op_movl_Tx_im[0].len + sizeof (ARMword);
1400
if (op_msr_spsr_T0_T1.len > op_msr_cpsr_T0_T1.len) {
1401
dp_tmp1 += op_msr_spsr_T0_T1.len;
1402
}
1403
else {
1404
dp_tmp1 += op_msr_spsr_T0_T1.len;
1405
}
1406
if (dp_tmp1 > dp_len) {
1407
dp_len = dp_tmp1;
1408
}
1409
TEA_OUT (printf
1410
("msr insn's max len is %d\n",
1411
dp_tmp1 + tb_insn_len_max));
1412
1413
//and
1414
dp_tmp1 = 0;
1415
dp_tmp1 += dp_head_len;
1416
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1417
dp_tmp1 += op_andl_T0_T1.len;
1418
dp_tmp1 += op_setcpsr_nzc_setreg_len;
1419
if (dp_tmp1 > dp_len) {
1420
dp_len = dp_tmp1;
1421
}
1422
TEA_OUT (printf
1423
("and insn's max len is %d\n",
1424
dp_tmp1 + tb_insn_len_max));
1425
1426
//eor
1427
dp_tmp1 = 0;
1428
dp_tmp1 += dp_head_len;
1429
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1430
dp_tmp1 += op_eorl_T0_T1.len;
1431
dp_tmp1 += op_setcpsr_nzc_setreg_len;
1432
if (dp_tmp1 > dp_len) {
1433
dp_len = dp_tmp1;
1434
}
1435
TEA_OUT (printf
1436
("eor insn's max len is %d\n",
1437
dp_tmp1 + tb_insn_len_max));
1438
1439
//sub
1440
dp_tmp1 = 0;
1441
dp_tmp1 += dp_head_len;
1442
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1443
if (op_subl_T0_T1_scv.len + op_setcpsr_nzcv_notsetr15_len >
1444
op_subl_T0_T1.len + op_setcpsr_nzcv_setr15_len) {
1445
dp_tmp1 +=
1446
op_subl_T0_T1_scv.len +
1447
op_setcpsr_nzcv_notsetr15_len;
1448
}
1449
else {
1450
dp_tmp1 +=
1451
op_subl_T0_T1.len +
1452
op_setcpsr_nzcv_setr15_len;
1453
}
1454
if (dp_tmp1 > dp_len) {
1455
dp_len = dp_tmp1;
1456
}
1457
TEA_OUT (printf
1458
("sub insn's max len is %d\n",
1459
dp_tmp1 + tb_insn_len_max));
1460
1461
//rsb
1462
dp_tmp1 = 0;
1463
dp_tmp1 += dp_head_len;
1464
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1465
if (op_rsbl_T0_T1_scv.len + op_setcpsr_nzcv_notsetr15_len >
1466
op_rsbl_T0_T1.len + op_setcpsr_nzcv_setr15_len) {
1467
dp_tmp1 +=
1468
op_rsbl_T0_T1_scv.len +
1469
op_setcpsr_nzcv_notsetr15_len;
1470
}
1471
else {
1472
dp_tmp1 +=
1473
op_rsbl_T0_T1.len +
1474
op_setcpsr_nzcv_setr15_len;
1475
}
1476
if (dp_tmp1 > dp_len) {
1477
dp_len = dp_tmp1;
1478
}
1479
TEA_OUT (printf
1480
("rsb insn's max len is %d\n",
1481
dp_tmp1 + tb_insn_len_max));
1482
1483
//add
1484
dp_tmp1 = 0;
1485
dp_tmp1 += dp_head_len;
1486
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1487
if (op_addl_T0_T1_scv.len + op_setcpsr_nzcv_notsetr15_len >
1488
op_addl_T0_T1.len + op_setcpsr_nzcv_setr15_len) {
1489
dp_tmp1 +=
1490
op_addl_T0_T1_scv.len +
1491
op_setcpsr_nzcv_notsetr15_len;
1492
}
1493
else {
1494
dp_tmp1 +=
1495
op_addl_T0_T1.len +
1496
op_setcpsr_nzcv_setr15_len;
1497
}
1498
if (dp_tmp1 > dp_len) {
1499
dp_len = dp_tmp1;
1500
}
1501
TEA_OUT (printf
1502
("add insn's max len is %d\n",
1503
dp_tmp1 + tb_insn_len_max));
1504
1505
//adc
1506
dp_tmp1 = 0;
1507
dp_tmp1 += dp_head_len;
1508
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1509
if (op_adcl_T0_T1_scv.len + op_setcpsr_nzcv_notsetr15_len >
1510
op_adcl_T0_T1.len + op_setcpsr_nzcv_setr15_len) {
1511
dp_tmp1 +=
1512
op_adcl_T0_T1_scv.len +
1513
op_setcpsr_nzcv_notsetr15_len;
1514
}
1515
else {
1516
dp_tmp1 +=
1517
op_adcl_T0_T1.len +
1518
op_setcpsr_nzcv_setr15_len;
1519
}
1520
if (dp_tmp1 > dp_len) {
1521
dp_len = dp_tmp1;
1522
}
1523
TEA_OUT (printf
1524
("adc insn's max len is %d\n",
1525
dp_tmp1 + tb_insn_len_max));
1526
1527
//sbc
1528
dp_tmp1 = 0;
1529
dp_tmp1 += dp_head_len;
1530
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1531
if (op_sbcl_T0_T1_scv.len + op_setcpsr_nzcv_notsetr15_len >
1532
op_sbcl_T0_T1.len + op_setcpsr_nzcv_setr15_len) {
1533
dp_tmp1 +=
1534
op_sbcl_T0_T1_scv.len +
1535
op_setcpsr_nzcv_notsetr15_len;
1536
}
1537
else {
1538
dp_tmp1 +=
1539
op_sbcl_T0_T1.len +
1540
op_setcpsr_nzcv_setr15_len;
1541
}
1542
if (dp_tmp1 > dp_len) {
1543
dp_len = dp_tmp1;
1544
}
1545
TEA_OUT (printf
1546
("sbc insn's max len is %d\n",
1547
dp_tmp1 + tb_insn_len_max));
1548
1549
//rsc
1550
dp_tmp1 = 0;
1551
dp_tmp1 += dp_head_len;
1552
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1553
if (op_rscl_T0_T1_scv.len + op_setcpsr_nzcv_notsetr15_len >
1554
op_rscl_T0_T1.len + op_setcpsr_nzcv_setr15_len) {
1555
dp_tmp1 +=
1556
op_rscl_T0_T1_scv.len +
1557
op_setcpsr_nzcv_notsetr15_len;
1558
}
1559
else {
1560
dp_tmp1 +=
1561
op_rscl_T0_T1.len +
1562
op_setcpsr_nzcv_setr15_len;
1563
}
1564
if (dp_tmp1 > dp_len) {
1565
dp_len = dp_tmp1;
1566
}
1567
TEA_OUT (printf
1568
("rsc insn's max len is %d\n",
1569
dp_tmp1 + tb_insn_len_max));
1570
1571
//tst
1572
dp_tmp1 = 0;
1573
dp_tmp1 += dp_head_len;
1574
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1575
dp_tmp1 += op_andl_T0_T1.len;
1576
dp_tmp1 += op_setcpsr_nzc_len;
1577
if (dp_tmp1 > dp_len) {
1578
dp_len = dp_tmp1;
1579
}
1580
TEA_OUT (printf
1581
("tst insn's max len is %d\n",
1582
dp_tmp1 + tb_insn_len_max));
1583
1584
//teq
1585
dp_tmp1 = 0;
1586
dp_tmp1 += dp_head_len;
1587
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1588
dp_tmp1 += op_eorl_T0_T1.len;
1589
dp_tmp1 += op_setcpsr_nzc_len;
1590
if (dp_tmp1 > dp_len) {
1591
dp_len = dp_tmp1;
1592
}
1593
TEA_OUT (printf
1594
("teq insn's max len is %d\n",
1595
dp_tmp1 + tb_insn_len_max));
1596
1597
//cmp
1598
dp_tmp1 = 0;
1599
dp_tmp1 += dp_head_len;
1600
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1601
dp_tmp1 += op_subl_T0_T1_scv.len;
1602
dp_tmp1 += op_setcpsr_nzcv_len;
1603
if (dp_tmp1 > dp_len) {
1604
dp_len = dp_tmp1;
1605
}
1606
TEA_OUT (printf
1607
("cmp insn's max len is %d\n",
1608
dp_tmp1 + tb_insn_len_max));
1609
1610
//cmn
1611
dp_tmp1 = 0;
1612
dp_tmp1 += dp_head_len;
1613
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1614
dp_tmp1 += op_addl_T0_T1_scv.len;
1615
dp_tmp1 += op_setcpsr_nzcv_len;
1616
if (dp_tmp1 > dp_len) {
1617
dp_len = dp_tmp1;
1618
}
1619
TEA_OUT (printf
1620
("cmn insn's max len is %d\n",
1621
dp_tmp1 + tb_insn_len_max));
1622
1623
//orr
1624
dp_tmp1 = 0;
1625
dp_tmp1 += dp_head_len;
1626
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1627
dp_tmp1 += op_orrl_T0_T1.len;
1628
dp_tmp1 += op_setcpsr_nzc_setreg_len;
1629
if (dp_tmp1 > dp_len) {
1630
dp_len = dp_tmp1;
1631
}
1632
TEA_OUT (printf
1633
("orr insn's max len is %d\n",
1634
dp_tmp1 + tb_insn_len_max));
1635
1636
//mov
1637
dp_tmp1 = 0;
1638
dp_tmp1 += dp_head_len;
1639
dp_tmp1 += op_movl_T0_T1.len;
1640
dp_tmp1 += op_setcpsr_nzc_setreg_len;
1641
if (dp_tmp1 > dp_len) {
1642
dp_len = dp_tmp1;
1643
}
1644
TEA_OUT (printf
1645
("mov insn's max len is %d\n",
1646
dp_tmp1 + tb_insn_len_max));
1647
1648
//bic
1649
dp_tmp1 = 0;
1650
dp_tmp1 += dp_head_len;
1651
dp_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1652
dp_tmp1 += op_bicl_T0_T1.len;
1653
dp_tmp1 += op_setcpsr_nzc_setreg_len;
1654
if (dp_tmp1 > dp_len) {
1655
dp_len = dp_tmp1;
1656
}
1657
TEA_OUT (printf
1658
("bic insn's max len is %d\n",
1659
dp_tmp1 + tb_insn_len_max));
1660
1661
//mvn
1662
dp_tmp1 = 0;
1663
dp_tmp1 += dp_head_len;
1664
dp_tmp1 += op_notl_T0_T1.len;
1665
dp_tmp1 += op_setcpsr_nzc_setreg_len;
1666
if (dp_tmp1 > dp_len) {
1667
dp_len = dp_tmp1;
1668
}
1669
TEA_OUT (printf
1670
("mvn insn's max len is %d\n",
1671
dp_tmp1 + tb_insn_len_max));
1672
}
1673
1674
//other_len
1675
{
1676
int op_add_data_offset_len = 0, ldr_head_len =
1677
0, str_head_len = 0;
1678
int other_tmp1, other_tmp2;
1679
1680
//op_add_data_offset_len
1681
op_add_data_offset_len += op_movl_Tx_reg_array_maxlen[2];
1682
op_add_data_offset_len += op_shift_T2_im_maxlen;
1683
op_add_data_offset_len += sizeof (uint8_t);
1684
if (op_subl_T1_T2.len > op_addl_T1_T2.len) {
1685
op_add_data_offset_len += op_subl_T1_T2.len;
1686
}
1687
else {
1688
op_add_data_offset_len += op_addl_T1_T2.len;
1689
}
1690
if (op_addl_T1_im.len + sizeof (ARMword) >
1691
op_add_data_offset_len) {
1692
op_add_data_offset_len =
1693
op_addl_T1_im.len + sizeof (ARMword);
1694
}
1695
1696
//ldr_head_len str_head_len
1697
ldr_head_len += op_movl_Tx_reg_array_maxlen[1];
1698
ldr_head_len += op_add_data_offset_len;
1699
ldr_head_len += op_movl_reg_Tx_array_maxlen[1];
1700
//if (!state->is_XScale) {
1701
if (state->abort_model > 1) {
1702
ldr_head_len += op_test_dataabort_ret.len;
1703
}
1704
str_head_len = ldr_head_len;
1705
ldr_head_len += op_movl_reg_Tx_array_maxlen[0];
1706
//if (!state->is_XScale) {
1707
if (state->abort_model > 1) {
1708
ldr_head_len += op_test_dataabort.len;
1709
}
1710
str_head_len += op_movl_Tx_reg_array_maxlen[0];
1711
1712
//ldrh
1713
other_tmp1 = ldr_head_len;
1714
other_tmp1 += op_ldrh_T0_T1.len;
1715
if (other_tmp1 > other_len) {
1716
other_len = other_tmp1;
1717
}
1718
TEA_OUT (printf
1719
("ldrh insn's max len is %d\n",
1720
other_tmp1 + tb_insn_len_max));
1721
1722
//ldrsb
1723
other_tmp1 = ldr_head_len;
1724
other_tmp1 += op_ldrb_T0_T1.len;
1725
other_tmp1 += op_signextend_byte_T0.len;
1726
if (other_tmp1 > other_len) {
1727
other_len = other_tmp1;
1728
}
1729
TEA_OUT (printf
1730
("ldrsb insn's max len is %d\n",
1731
other_tmp1 + tb_insn_len_max));
1732
1733
//ldrsh
1734
other_tmp1 = ldr_head_len;
1735
other_tmp1 += op_ldrh_T0_T1.len;
1736
other_tmp1 += op_signextend_halfword_T0.len;
1737
if (other_tmp1 > other_len) {
1738
other_len = other_tmp1;
1739
}
1740
TEA_OUT (printf
1741
("ldrsh insn's max len is %d\n",
1742
other_tmp1 + tb_insn_len_max));
1743
1744
//ldrb
1745
other_tmp1 = ldr_head_len;
1746
other_tmp1 += op_ldrb_T0_T1.len;
1747
if (other_tmp1 > other_len) {
1748
other_len = other_tmp1;
1749
}
1750
TEA_OUT (printf
1751
("ldrb insn's max len is %d\n",
1752
other_tmp1 + tb_insn_len_max));
1753
1754
//ldr
1755
other_tmp1 = ldr_head_len;
1756
other_tmp1 += op_ldr_T0_T1.len;
1757
if (other_tmp1 > other_len) {
1758
other_len = other_tmp1;
1759
}
1760
TEA_OUT (printf
1761
("ldr insn's max len is %d\n",
1762
other_tmp1 + tb_insn_len_max));
1763
1764
//strh
1765
other_tmp1 = str_head_len;
1766
other_tmp1 += op_strh_T0_T1.len;
1767
if (other_tmp1 > other_len) {
1768
other_len = other_tmp1;
1769
}
1770
TEA_OUT (printf
1771
("strh insn's max len is %d\n",
1772
other_tmp1 + tb_insn_len_max));
1773
1774
//teawater add for xscale(arm v5) 2005.09.26------------------------------------
1775
//ldrd
1776
other_tmp1 = ldr_head_len;
1777
other_tmp1 += op_ldrd_T0_T2_T1.len;
1778
if (state->abort_model > 1) {
1779
other_tmp1 += op_test_dataabort_ret.len;
1780
}
1781
other_tmp1 += op_movl_reg_Tx_array_maxlen[0];
1782
other_tmp1 += op_movl_reg_Tx_array_maxlen[2];
1783
if (other_tmp1 > other_len) {
1784
other_len = other_tmp1;
1785
}
1786
TEA_OUT (printf
1787
("ldrd insn's max len is %d\n",
1788
other_tmp1 + tb_insn_len_max));
1789
1790
//strd
1791
other_tmp1 = ldr_head_len;
1792
other_tmp1 += op_movl_reg_Tx_array_maxlen[0];
1793
other_tmp1 += op_movl_reg_Tx_array_maxlen[2];
1794
other_tmp1 += op_strd_T0_T2_T1.len;
1795
if (other_tmp1 > other_len) {
1796
other_len = other_tmp1;
1797
}
1798
TEA_OUT (printf
1799
("strd insn's max len is %d\n",
1800
other_tmp1 + tb_insn_len_max));
1801
//AJ2D--------------------------------------------------------------------------
1802
1803
//strb
1804
other_tmp1 = str_head_len;
1805
other_tmp1 += op_strb_T0_T1.len;
1806
if (other_tmp1 > other_len) {
1807
other_len = other_tmp1;
1808
}
1809
TEA_OUT (printf
1810
("strb insn's max len is %d\n",
1811
other_tmp1 + tb_insn_len_max));
1812
1813
//str
1814
other_tmp1 = str_head_len;
1815
other_tmp1 += op_str_T0_T1.len;
1816
if (other_tmp1 > other_len) {
1817
other_len = other_tmp1;
1818
}
1819
TEA_OUT (printf
1820
("str insn's max len is %d\n",
1821
other_tmp1 + tb_insn_len_max));
1822
1823
//mul
1824
other_tmp1 = 0;
1825
other_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1826
other_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1827
other_tmp1 += op_mul_T0_T1.len;
1828
other_tmp1 += op_logic_T0_sn.len;
1829
other_tmp1 += op_set_nf.len;
1830
other_tmp1 += op_logic_T0_sz.len;
1831
other_tmp1 += op_set_zf.len;
1832
other_tmp1 += op_movl_reg_Tx_array_maxlen[0];
1833
TEA_OUT (printf
1834
("mul insn's max len is %d\n",
1835
other_tmp1 + tb_insn_len_max));
1836
1837
//mla
1838
other_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1839
other_tmp1 += op_addl_T0_T1.len;
1840
if (other_tmp1 > other_len) {
1841
other_len = other_tmp1;
1842
}
1843
TEA_OUT (printf
1844
("mla insn's max len is %d\n",
1845
other_tmp1 + tb_insn_len_max));
1846
1847
//mull
1848
other_tmp1 = 0;
1849
other_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1850
other_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1851
if (op_smull_T0_T1.len > op_umull_T0_T1.len) {
1852
other_tmp1 += op_smull_T0_T1.len;
1853
}
1854
else {
1855
other_tmp1 += op_umull_T0_T1.len;
1856
}
1857
other_tmp1 += op_movl_Tx_reg_array_maxlen[2];
1858
other_tmp1 += op_movl_eax_T2.len;
1859
other_tmp1 += op_movl_Tx_reg_array_maxlen[2];
1860
other_tmp1 += op_addq_T0_T1_eax_T2.len;
1861
other_tmp1 += op_logic_T0_sn.len;
1862
other_tmp1 += op_set_nf.len;
1863
other_tmp1 += op_logic_T0_sz.len;
1864
other_tmp1 += op_set_zf.len;
1865
other_tmp1 += op_movl_reg_Tx_array_maxlen[0];
1866
other_tmp1 += op_movl_reg_Tx_array_maxlen[1];
1867
if (other_tmp1 > other_len) {
1868
other_len = other_tmp1;
1869
}
1870
TEA_OUT (printf
1871
("mull insn's max len is %d\n",
1872
other_tmp1 + tb_insn_len_max));
1873
1874
//swp
1875
other_tmp1 = 0;
1876
other_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1877
other_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1878
if (op_ldrb_T2_T1.len + op_strb_T0_T1.len >
1879
op_ldr_T2_T1.len + op_str_T0_T1.len) {
1880
other_tmp1 += op_ldrb_T2_T1.len + op_strb_T0_T1.len;
1881
}
1882
else {
1883
other_tmp1 += op_ldr_T2_T1.len + op_str_T0_T1.len;
1884
}
1885
other_tmp1 += op_movl_reg_Tx_array_maxlen[2];
1886
if (other_tmp1 > other_len) {
1887
other_len = other_tmp1;
1888
}
1889
TEA_OUT (printf
1890
("swp insn's max len is %d\n",
1891
other_tmp1 + tb_insn_len_max));
1892
1893
//insn_undef
1894
other_tmp1 = 0;
1895
other_tmp1 +=
1896
op_movl_Tx_im[2].len + sizeof (ARMword) +
1897
op_movl_trap_T2.len;
1898
if (other_tmp1 > other_len) {
1899
other_len = other_tmp1;
1900
}
1901
TEA_OUT (printf
1902
("insn_undef insn's max len is %d\n",
1903
other_tmp1 + tb_insn_len_max));
1904
1905
//ldm stm
1906
other_tmp1 = 0;
1907
other_tmp1 += op_test_cpsr_ret_UNP.len;
1908
other_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1909
other_tmp1 +=
1910
op_movl_Tx_im[2].len + sizeof (ARMword) +
1911
op_movl_trap_T2.len;
1912
other_tmp1 += op_addl_T1_im.len + sizeof (ARMword);
1913
other_tmp1 += op_movl_Tx_im[0].len + sizeof (ARMword);
1914
other_tmp2 = op_ldm_user_T1_T0.len;
1915
if (op_ldm_T1_T0.len > other_tmp2) {
1916
other_tmp2 = op_ldm_T1_T0.len;
1917
}
1918
if (op_stm_user_T1_T0.len > other_tmp2) {
1919
other_tmp2 = op_stm_user_T1_T0.len;
1920
}
1921
if (op_stm_T1_T0.len > other_tmp2) {
1922
other_tmp2 = op_stm_T1_T0.len;
1923
}
1924
other_tmp1 += other_tmp2;
1925
//if (!state->is_XScale) {
1926
if (state->abort_model > 1) {
1927
ldr_head_len += op_test_dataabort.len;
1928
}
1929
other_tmp1 += op_addl_T1_im.len + sizeof (ARMword);
1930
other_tmp1 += op_movl_reg_Tx_array_maxlen[1];
1931
//if (!state->is_XScale) {
1932
if (state->abort_model > 1) {
1933
ldr_head_len += op_test_dataabort_ret.len;
1934
}
1935
if (other_tmp1 > other_len) {
1936
other_len = other_tmp1;
1937
}
1938
TEA_OUT (printf
1939
("ldm stm insn's max len is %d\n",
1940
other_tmp1 + tb_insn_len_max));
1941
1942
//b
1943
other_tmp1 = 0;
1944
other_tmp1 += op_b_offset.len + sizeof (ARMword);
1945
//teawater change for local tb branch directly jump 2005.10.21------------------
1946
other_tmp1 += op_local_b_offset.len;
1947
//AJ2D--------------------------------------------------------------------------
1948
if (other_tmp1 > other_len) {
1949
other_len = other_tmp1;
1950
}
1951
TEA_OUT (printf
1952
("b insn's max len is %d\n",
1953
other_tmp1 + tb_insn_len_max));
1954
1955
//bl
1956
other_tmp1 = 0;
1957
other_tmp1 += op_bl_offset.len + sizeof (ARMword);
1958
//teawater change for local tb branch directly jump 2005.10.21------------------
1959
other_tmp1 += op_local_b_offset.len;
1960
//AJ2D--------------------------------------------------------------------------
1961
if (other_tmp1 > other_len) {
1962
other_len = other_tmp1;
1963
}
1964
TEA_OUT (printf
1965
("bl insn's max len is %d\n",
1966
other_tmp1 + tb_insn_len_max));
1967
1968
//teawater add for xscale(arm v5) 2005.09.14------------------------------------
1969
//mar
1970
other_tmp1 = 0;
1971
other_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1972
other_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1973
other_tmp1 += op_mar_T0_T1.len;
1974
if (other_tmp1 > other_len) {
1975
other_len = other_tmp1;
1976
}
1977
TEA_OUT (printf
1978
("mar insn's max len is %d\n",
1979
other_tmp1 + tb_insn_len_max));
1980
1981
//mra
1982
other_tmp1 += op_mra_T0_T1.len;
1983
other_tmp1 = 0;
1984
other_tmp1 += op_movl_Tx_reg_array_maxlen[0];
1985
other_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1986
if (other_tmp1 > other_len) {
1987
other_len = other_tmp1;
1988
}
1989
TEA_OUT (printf
1990
("mra insn's max len is %d\n",
1991
other_tmp1 + tb_insn_len_max));
1992
//AJ2D--------------------------------------------------------------------------
1993
1994
//ldc stc
1995
other_tmp1 = 0;
1996
other_tmp1 += op_movl_Tx_reg_array_maxlen[1];
1997
other_tmp1 += op_addl_T1_im.len + sizeof (ARMword);
1998
other_tmp1 += op_movl_Tx_im[0].len + sizeof (ARMword);
1999
if (op_ldc_T0_T1.len > op_stc_T0_T1.len) {
2000
other_tmp1 += op_ldc_T0_T1.len;
2001
}
2002
else {
2003
other_tmp1 += op_stc_T0_T1.len;
2004
}
2005
other_tmp1 += op_movl_reg_Tx_array_maxlen[1];
2006
if (other_tmp1 > other_len) {
2007
other_len = other_tmp1;
2008
}
2009
TEA_OUT (printf
2010
("ldc stc insn's max len is %d\n",
2011
other_tmp1 + tb_insn_len_max));
2012
2013
//teawater add for xscale(arm v5) 2005.09.14------------------------------------
2014
//mia
2015
other_tmp1 = 0;
2016
other_tmp1 += op_movl_Tx_reg_array_maxlen[0];
2017
other_tmp1 += op_movl_Tx_reg_array_maxlen[1];
2018
other_tmp1 += op_smull_T0_T1.len;
2019
other_tmp1 += op_mia_T0_T1.len;
2020
if (other_tmp1 > other_len) {
2021
other_len = other_tmp1;
2022
}
2023
TEA_OUT (printf
2024
("mia insn's max len is %d\n",
2025
other_tmp1 + tb_insn_len_max));
2026
2027
//miaph
2028
other_tmp1 = 0;
2029
other_tmp1 += op_movl_Tx_reg_array_maxlen[0];
2030
other_tmp1 += op_movl_Tx_reg_array_maxlen[1];
2031
other_tmp1 += op_miaph_T0_T1.len;
2032
if (other_tmp1 > other_len) {
2033
other_len = other_tmp1;
2034
}
2035
TEA_OUT (printf
2036
("miaph insn's max len is %d\n",
2037
other_tmp1 + tb_insn_len_max));
2038
2039
//miabb
2040
other_tmp1 = 0;
2041
other_tmp1 += op_movl_Tx_reg_array_maxlen[0];
2042
other_tmp1 += op_movl_Tx_reg_array_maxlen[1];
2043
other_tmp1 += op_lo_T0.len;
2044
other_tmp1 += op_lo_T1.len;
2045
other_tmp1 += op_miaxy_T0_T1.len;
2046
if (other_tmp1 > other_len) {
2047
other_len = other_tmp1;
2048
}
2049
TEA_OUT (printf
2050
("miabb insn's max len is %d\n",
2051
other_tmp1 + tb_insn_len_max));
2052
2053
//miabt
2054
other_tmp1 = 0;
2055
other_tmp1 += op_movl_Tx_reg_array_maxlen[0];
2056
other_tmp1 += op_movl_Tx_reg_array_maxlen[1];
2057
other_tmp1 += op_lo_T0.len;
2058
other_tmp1 += op_hi_T1.len;
2059
other_tmp1 += op_miaxy_T0_T1.len;
2060
if (other_tmp1 > other_len) {
2061
other_len = other_tmp1;
2062
}
2063
TEA_OUT (printf
2064
("miabt insn's max len is %d\n",
2065
other_tmp1 + tb_insn_len_max));
2066
2067
//miatb
2068
other_tmp1 = 0;
2069
other_tmp1 += op_movl_Tx_reg_array_maxlen[0];
2070
other_tmp1 += op_movl_Tx_reg_array_maxlen[1];
2071
other_tmp1 += op_hi_T0.len;
2072
other_tmp1 += op_lo_T1.len;
2073
other_tmp1 += op_miaxy_T0_T1.len;
2074
if (other_tmp1 > other_len) {
2075
other_len = other_tmp1;
2076
}
2077
TEA_OUT (printf
2078
("miatb insn's max len is %d\n",
2079
other_tmp1 + tb_insn_len_max));
2080
2081
//miatt
2082
other_tmp1 = 0;
2083
other_tmp1 += op_movl_Tx_reg_array_maxlen[0];
2084
other_tmp1 += op_movl_Tx_reg_array_maxlen[1];
2085
other_tmp1 += op_hi_T0.len;
2086
other_tmp1 += op_hi_T1.len;
2087
other_tmp1 += op_miaxy_T0_T1.len;
2088
if (other_tmp1 > other_len) {
2089
other_len = other_tmp1;
2090
}
2091
TEA_OUT (printf
2092
("miatt insn's max len is %d\n",
2093
other_tmp1 + tb_insn_len_max));
2094
//AJ2D--------------------------------------------------------------------------
2095
2096
//mrc
2097
other_tmp1 = 0;
2098
other_tmp1 += op_movl_Tx_im[0].len + sizeof (ARMword);
2099
other_tmp1 += op_movl_Tx_im[1].len + sizeof (ARMword);
2100
other_tmp1 += op_mrc_T0_T1.len;
2101
if (other_tmp1 > other_len) {
2102
other_len = other_tmp1;
2103
}
2104
TEA_OUT (printf
2105
("mrc insn's max len is %d\n",
2106
other_tmp1 + tb_insn_len_max));
2107
2108
//mcr
2109
other_tmp1 = 0;
2110
other_tmp1 += op_movl_Tx_im[0].len + sizeof (ARMword);
2111
other_tmp1 += op_movl_Tx_im[1].len + sizeof (ARMword);
2112
other_tmp1 += op_mcr_T0_T1.len;
2113
if (other_tmp1 > other_len) {
2114
other_len = other_tmp1;
2115
}
2116
TEA_OUT (printf
2117
("mcr insn's max len is %d\n",
2118
other_tmp1 + tb_insn_len_max));
2119
2120
//cdp
2121
other_tmp1 = 0;
2122
other_tmp1 += op_movl_Tx_im[0].len + sizeof (ARMword);
2123
other_tmp1 += op_movl_Tx_im[1].len + sizeof (ARMword);
2124
other_tmp1 += op_cdp_T0_T1.len;
2125
if (other_tmp1 > other_len) {
2126
other_len = other_tmp1;
2127
}
2128
TEA_OUT (printf
2129
("cdp insn's max len is %d\n",
2130
other_tmp1 + tb_insn_len_max));
2131
2132
//swi
2133
other_tmp1 = 0;
2134
other_tmp1 +=
2135
op_movl_Tx_im[2].len + sizeof (ARMword) +
2136
op_movl_trap_T2.len;
2137
if (other_tmp1 > other_len) {
2138
other_len = other_tmp1;
2139
}
2140
TEA_OUT (printf
2141
("swi insn's max len is %d\n",
2142
other_tmp1 + tb_insn_len_max));
2143
}
2144
2145
if (dp_len > other_len) {
2146
tb_insn_len_max += dp_len;
2147
}
2148
else {
2149
tb_insn_len_max += other_len;
2150
}
2151
2152
TEA_OUT (printf ("tb_insn_len_max is %d\n", tb_insn_len_max));
2153
return (0);
2154
}
2155
2156
//teawater add for new tb manage function 2005.07.10----------------------------
2157
int
2158
tb_memory_init (ARMul_State * state)
2159
{
2160
int i;
2161
uint64_t tmp_u64;
2162
mem_bank_t *mbp;
2163
2164
//tbt
2165
if (TB_TBT_SIZE) {
2166
//get align tbt size
2167
TB_TBT_SIZE = ALIGN (TB_TBT_SIZE, sizeof (tb_cache_t));
2168
if (TB_TBT_SIZE < sizeof (tb_cache_t)) {
2169
fprintf (stderr,
2170
"SKYEYE: tb_memory_init: TB_TBT_SIZE %u is too little.\n",
2171
(unsigned int) TB_TBT_SIZE);
2172
return (-1);
2173
}
2174
2175
//get tbt max size
2176
tmp_u64 = 0;
2177
for (i = 0; i < state->mem_bank->current_num; i++) {
2178
tmp_u64 += state->mem_bank->mem_banks[i].len;
2179
}
2180
tmp_u64 = tmp_u64 / TB_LEN * sizeof (tb_cache_t);
2181
2182
if (TB_TBT_SIZE >= tmp_u64) {
2183
//if set size >= max size, use the simple function
2184
TB_TBT_SIZE = 0;
2185
}
2186
else {
2187
//get mem by TB_TBT_SIZE
2188
tbt_table = (tb_t *) malloc (TB_TBT_SIZE);
2189
if (!tbt_table) {
2190
fprintf (stderr,
2191
"SKYEYE: tb_memory_init: Error allocating mem.\n");
2192
return (-1);
2193
}
2194
memset (tbt_table, 0, TB_TBT_SIZE);
2195
tbt_table_size = TB_TBT_SIZE / sizeof (tb_cache_t);
2196
}
2197
}
2198
2199
//tbp
2200
if (TB_TBP_SIZE) {
2201
//get align tbp size
2202
TB_TBP_SIZE = ALIGN (TB_TBP_SIZE, TB_TBP_MAX);
2203
if (TB_TBP_SIZE < TB_TBP_MAX) {
2204
fprintf (stderr,
2205
"SKYEYE: tb_memory_init: TB_TBP_SIZE %u is too little.\n",
2206
(unsigned int) TB_TBP_SIZE);
2207
return (-1);
2208
}
2209
}
2210
if (TB_TBT_SIZE) {
2211
//get tbp max size
2212
tmp_u64 =
2213
tbt_table_size * TB_LEN / sizeof (ARMword) *
2214
TB_INSN_LEN_MAX + tbt_table_size * op_return.len;
2215
2216
if (TB_TBP_SIZE == 0 || TB_TBP_SIZE > tmp_u64) {
2217
TB_TBP_SIZE = tmp_u64;
2218
}
2219
else {
2220
tbp_dynamic = 1;
2221
}
2222
}
2223
else {
2224
if (TB_TBP_SIZE) {
2225
//get tbp max size
2226
tmp_u64 = 0;
2227
for (i = 0; i < state->mem_bank->current_num; i++) {
2228
tmp_u64 += state->mem_bank->mem_banks[i].len;
2229
}
2230
tmp_u64 =
2231
tmp_u64 / sizeof (ARMword) * TB_INSN_LEN_MAX +
2232
tmp_u64 / TB_LEN * op_return.len;
2233
2234
if (TB_TBP_SIZE >= tmp_u64) {
2235
//if set size >= max size, use the simple function
2236
TB_TBP_SIZE = 0;
2237
}
2238
else {
2239
tbp_dynamic = 1;
2240
}
2241
}
2242
}
2243
if (TB_TBP_SIZE) {
2244
//get mem by TB_TBP_SIZE
2245
//koodailar add it for mingw 2005.12.18-----------------------------------------
2246
#ifdef __MINGW32__
2247
tbp_begin =
2248
malloc(TB_TBP_SIZE);
2249
if (tbp_begin == NULL) {
2250
fprintf (stderr,
2251
"SKYEYE: tb_memory_init: Error allocating mem.\n");
2252
return (-1);
2253
}
2254
#else
2255
//get mem by TB_TBP_SIZE
2256
tbp_begin =
2257
mmap (NULL, TB_TBP_SIZE,
2258
PROT_READ | PROT_WRITE | PROT_EXEC,
2259
MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
2260
if (tbp_begin == MAP_FAILED) {
2261
fprintf (stderr,
2262
"SKYEYE: tb_memory_init: Error allocating mem.\n");
2263
return (-1);
2264
}
2265
#endif
2266
//end koodailar ----------------------------------------------------------------
2267
tbp_now_size = TB_TBP_SIZE;
2268
tbp_now = tbp_begin;
2269
}
2270
2271
if (TB_TBT_SIZE) {
2272
printf ("dbct translate block entry use memory 0x%08x bytes.\n", TB_TBT_SIZE);
2273
}
2274
if (TB_TBP_SIZE) {
2275
printf ("dbct translate block use memory 0x%08x bytes.\n",
2276
TB_TBP_SIZE);
2277
}
2278
2279
return (0);
2280
}
2281
2282
//AJ2D--------------------------------------------------------------------------
Loggerhead is a web-based interface for Breezy
Version: 2.0.1