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* wm8962.c -- WM8962 ALSA SoC Audio driver
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* Copyright 2010 Wolfson Microelectronics plc
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/gcd.h>
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#include <linux/gpio.h>
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#include <linux/i2c.h>
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#include <linux/input.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/slab.h>
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#include <linux/workqueue.h>
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#include <sound/core.h>
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#include <sound/jack.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include <sound/wm8962.h>
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#include <trace/events/asoc.h>
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#define WM8962_NUM_SUPPLIES 8
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static const char *wm8962_supply_names[WM8962_NUM_SUPPLIES] = {
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/* codec private data */
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struct snd_soc_codec *codec;
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int bclk; /* Desired BCLK */
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struct delayed_work mic_work;
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struct snd_soc_jack *jack;
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struct regulator_bulk_data supplies[WM8962_NUM_SUPPLIES];
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struct notifier_block disable_nb[WM8962_NUM_SUPPLIES];
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#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
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struct input_dev *beep;
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struct work_struct beep_work;
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struct gpio_chip gpio_chip;
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/* We can't use the same notifier block for more than one supply and
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* there's no way I can see to get from a callback to the caller
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* except container_of().
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#define WM8962_REGULATOR_EVENT(n) \
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static int wm8962_regulator_event_##n(struct notifier_block *nb, \
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unsigned long event, void *data) \
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struct wm8962_priv *wm8962 = container_of(nb, struct wm8962_priv, \
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if (event & REGULATOR_EVENT_DISABLE) { \
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wm8962->codec->cache_sync = 1; \
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WM8962_REGULATOR_EVENT(0)
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WM8962_REGULATOR_EVENT(1)
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WM8962_REGULATOR_EVENT(2)
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WM8962_REGULATOR_EVENT(3)
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WM8962_REGULATOR_EVENT(4)
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WM8962_REGULATOR_EVENT(5)
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WM8962_REGULATOR_EVENT(6)
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WM8962_REGULATOR_EVENT(7)
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static const u16 wm8962_reg[WM8962_MAX_REGISTER + 1] = {
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[0] = 0x009F, /* R0 - Left Input volume */
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[1] = 0x049F, /* R1 - Right Input volume */
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[2] = 0x0000, /* R2 - HPOUTL volume */
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[3] = 0x0000, /* R3 - HPOUTR volume */
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[4] = 0x0020, /* R4 - Clocking1 */
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[5] = 0x0018, /* R5 - ADC & DAC Control 1 */
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[6] = 0x2008, /* R6 - ADC & DAC Control 2 */
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[7] = 0x000A, /* R7 - Audio Interface 0 */
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[8] = 0x01E4, /* R8 - Clocking2 */
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[9] = 0x0300, /* R9 - Audio Interface 1 */
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[10] = 0x00C0, /* R10 - Left DAC volume */
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[11] = 0x00C0, /* R11 - Right DAC volume */
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[14] = 0x0040, /* R14 - Audio Interface 2 */
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[15] = 0x6243, /* R15 - Software Reset */
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[17] = 0x007B, /* R17 - ALC1 */
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[18] = 0x0000, /* R18 - ALC2 */
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[19] = 0x1C32, /* R19 - ALC3 */
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[20] = 0x3200, /* R20 - Noise Gate */
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[21] = 0x00C0, /* R21 - Left ADC volume */
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[22] = 0x00C0, /* R22 - Right ADC volume */
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[23] = 0x0160, /* R23 - Additional control(1) */
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[24] = 0x0000, /* R24 - Additional control(2) */
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[25] = 0x0000, /* R25 - Pwr Mgmt (1) */
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[26] = 0x0000, /* R26 - Pwr Mgmt (2) */
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[27] = 0x0010, /* R27 - Additional Control (3) */
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[28] = 0x0000, /* R28 - Anti-pop */
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[30] = 0x005E, /* R30 - Clocking 3 */
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[31] = 0x0000, /* R31 - Input mixer control (1) */
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[32] = 0x0145, /* R32 - Left input mixer volume */
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[33] = 0x0145, /* R33 - Right input mixer volume */
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[34] = 0x0009, /* R34 - Input mixer control (2) */
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[35] = 0x0003, /* R35 - Input bias control */
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[37] = 0x0008, /* R37 - Left input PGA control */
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[38] = 0x0008, /* R38 - Right input PGA control */
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[40] = 0x0000, /* R40 - SPKOUTL volume */
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[41] = 0x0000, /* R41 - SPKOUTR volume */
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[47] = 0x0000, /* R47 - Thermal Shutdown Status */
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[48] = 0x8027, /* R48 - Additional Control (4) */
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[49] = 0x0010, /* R49 - Class D Control 1 */
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[51] = 0x0003, /* R51 - Class D Control 2 */
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[56] = 0x0506, /* R56 - Clocking 4 */
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[57] = 0x0000, /* R57 - DAC DSP Mixing (1) */
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[58] = 0x0000, /* R58 - DAC DSP Mixing (2) */
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[60] = 0x0300, /* R60 - DC Servo 0 */
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[61] = 0x0300, /* R61 - DC Servo 1 */
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[64] = 0x0810, /* R64 - DC Servo 4 */
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[66] = 0x0000, /* R66 - DC Servo 6 */
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[68] = 0x001B, /* R68 - Analogue PGA Bias */
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[69] = 0x0000, /* R69 - Analogue HP 0 */
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[71] = 0x01FB, /* R71 - Analogue HP 2 */
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[72] = 0x0000, /* R72 - Charge Pump 1 */
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[82] = 0x0004, /* R82 - Charge Pump B */
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[87] = 0x0000, /* R87 - Write Sequencer Control 1 */
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[90] = 0x0000, /* R90 - Write Sequencer Control 2 */
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[93] = 0x0000, /* R93 - Write Sequencer Control 3 */
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[94] = 0x0000, /* R94 - Control Interface */
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[99] = 0x0000, /* R99 - Mixer Enables */
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[100] = 0x0000, /* R100 - Headphone Mixer (1) */
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[101] = 0x0000, /* R101 - Headphone Mixer (2) */
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[102] = 0x013F, /* R102 - Headphone Mixer (3) */
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[103] = 0x013F, /* R103 - Headphone Mixer (4) */
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[105] = 0x0000, /* R105 - Speaker Mixer (1) */
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[106] = 0x0000, /* R106 - Speaker Mixer (2) */
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[107] = 0x013F, /* R107 - Speaker Mixer (3) */
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[108] = 0x013F, /* R108 - Speaker Mixer (4) */
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[109] = 0x0003, /* R109 - Speaker Mixer (5) */
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[110] = 0x0002, /* R110 - Beep Generator (1) */
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[115] = 0x0006, /* R115 - Oscillator Trim (3) */
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[116] = 0x0026, /* R116 - Oscillator Trim (4) */
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[119] = 0x0000, /* R119 - Oscillator Trim (7) */
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[124] = 0x0011, /* R124 - Analogue Clocking1 */
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[125] = 0x004B, /* R125 - Analogue Clocking2 */
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[126] = 0x000D, /* R126 - Analogue Clocking3 */
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[127] = 0x0000, /* R127 - PLL Software Reset */
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[129] = 0x0000, /* R129 - PLL2 */
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[131] = 0x0000, /* R131 - PLL 4 */
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[136] = 0x0067, /* R136 - PLL 9 */
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[137] = 0x001C, /* R137 - PLL 10 */
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[138] = 0x0071, /* R138 - PLL 11 */
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[139] = 0x00C7, /* R139 - PLL 12 */
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[140] = 0x0067, /* R140 - PLL 13 */
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[141] = 0x0048, /* R141 - PLL 14 */
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[142] = 0x0022, /* R142 - PLL 15 */
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[143] = 0x0097, /* R143 - PLL 16 */
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[155] = 0x000C, /* R155 - FLL Control (1) */
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[156] = 0x0039, /* R156 - FLL Control (2) */
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[157] = 0x0180, /* R157 - FLL Control (3) */
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[159] = 0x0032, /* R159 - FLL Control (5) */
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[160] = 0x0018, /* R160 - FLL Control (6) */
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[161] = 0x007D, /* R161 - FLL Control (7) */
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[162] = 0x0008, /* R162 - FLL Control (8) */
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[252] = 0x0005, /* R252 - General test 1 */
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[256] = 0x0000, /* R256 - DF1 */
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[257] = 0x0000, /* R257 - DF2 */
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[258] = 0x0000, /* R258 - DF3 */
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[259] = 0x0000, /* R259 - DF4 */
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[260] = 0x0000, /* R260 - DF5 */
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[261] = 0x0000, /* R261 - DF6 */
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[262] = 0x0000, /* R262 - DF7 */
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[264] = 0x0000, /* R264 - LHPF1 */
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[265] = 0x0000, /* R265 - LHPF2 */
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[268] = 0x0000, /* R268 - THREED1 */
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[269] = 0x0000, /* R269 - THREED2 */
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[270] = 0x0000, /* R270 - THREED3 */
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[271] = 0x0000, /* R271 - THREED4 */
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[276] = 0x000C, /* R276 - DRC 1 */
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[277] = 0x0925, /* R277 - DRC 2 */
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[278] = 0x0000, /* R278 - DRC 3 */
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[279] = 0x0000, /* R279 - DRC 4 */
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[280] = 0x0000, /* R280 - DRC 5 */
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[285] = 0x0000, /* R285 - Tloopback */
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[335] = 0x0004, /* R335 - EQ1 */
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[336] = 0x6318, /* R336 - EQ2 */
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[337] = 0x6300, /* R337 - EQ3 */
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[338] = 0x0FCA, /* R338 - EQ4 */
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[339] = 0x0400, /* R339 - EQ5 */
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[340] = 0x00D8, /* R340 - EQ6 */
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[341] = 0x1EB5, /* R341 - EQ7 */
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[342] = 0xF145, /* R342 - EQ8 */
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[343] = 0x0B75, /* R343 - EQ9 */
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[344] = 0x01C5, /* R344 - EQ10 */
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[345] = 0x1C58, /* R345 - EQ11 */
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[346] = 0xF373, /* R346 - EQ12 */
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[347] = 0x0A54, /* R347 - EQ13 */
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[348] = 0x0558, /* R348 - EQ14 */
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[349] = 0x168E, /* R349 - EQ15 */
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[350] = 0xF829, /* R350 - EQ16 */
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[351] = 0x07AD, /* R351 - EQ17 */
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[352] = 0x1103, /* R352 - EQ18 */
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[353] = 0x0564, /* R353 - EQ19 */
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[354] = 0x0559, /* R354 - EQ20 */
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[355] = 0x4000, /* R355 - EQ21 */
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[356] = 0x6318, /* R356 - EQ22 */
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[357] = 0x6300, /* R357 - EQ23 */
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[358] = 0x0FCA, /* R358 - EQ24 */
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[359] = 0x0400, /* R359 - EQ25 */
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[360] = 0x00D8, /* R360 - EQ26 */
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[361] = 0x1EB5, /* R361 - EQ27 */
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[362] = 0xF145, /* R362 - EQ28 */
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[363] = 0x0B75, /* R363 - EQ29 */
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[364] = 0x01C5, /* R364 - EQ30 */
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[365] = 0x1C58, /* R365 - EQ31 */
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[366] = 0xF373, /* R366 - EQ32 */
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[367] = 0x0A54, /* R367 - EQ33 */
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[368] = 0x0558, /* R368 - EQ34 */
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[369] = 0x168E, /* R369 - EQ35 */
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[370] = 0xF829, /* R370 - EQ36 */
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[371] = 0x07AD, /* R371 - EQ37 */
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[372] = 0x1103, /* R372 - EQ38 */
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[373] = 0x0564, /* R373 - EQ39 */
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[374] = 0x0559, /* R374 - EQ40 */
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[375] = 0x4000, /* R375 - EQ41 */
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[513] = 0x0000, /* R513 - GPIO 2 */
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[514] = 0x0000, /* R514 - GPIO 3 */
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[516] = 0x8100, /* R516 - GPIO 5 */
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[517] = 0x8100, /* R517 - GPIO 6 */
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[560] = 0x0000, /* R560 - Interrupt Status 1 */
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[561] = 0x0000, /* R561 - Interrupt Status 2 */
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[568] = 0x0030, /* R568 - Interrupt Status 1 Mask */
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[569] = 0xFFED, /* R569 - Interrupt Status 2 Mask */
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[576] = 0x0000, /* R576 - Interrupt Control */
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[584] = 0x002D, /* R584 - IRQ Debounce */
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[586] = 0x0000, /* R586 - MICINT Source Pol */
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[768] = 0x1C00, /* R768 - DSP2 Power Management */
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[1037] = 0x0000, /* R1037 - DSP2_ExecControl */
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[8192] = 0x0000, /* R8192 - DSP2 Instruction RAM 0 */
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[9216] = 0x0030, /* R9216 - DSP2 Address RAM 2 */
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[9217] = 0x0000, /* R9217 - DSP2 Address RAM 1 */
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[9218] = 0x0000, /* R9218 - DSP2 Address RAM 0 */
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[12288] = 0x0000, /* R12288 - DSP2 Data1 RAM 1 */
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[12289] = 0x0000, /* R12289 - DSP2 Data1 RAM 0 */
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[13312] = 0x0000, /* R13312 - DSP2 Data2 RAM 1 */
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[13313] = 0x0000, /* R13313 - DSP2 Data2 RAM 0 */
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[14336] = 0x0000, /* R14336 - DSP2 Data3 RAM 1 */
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[14337] = 0x0000, /* R14337 - DSP2 Data3 RAM 0 */
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[15360] = 0x000A, /* R15360 - DSP2 Coeff RAM 0 */
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[16384] = 0x0000, /* R16384 - RETUNEADC_SHARED_COEFF_1 */
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[16385] = 0x0000, /* R16385 - RETUNEADC_SHARED_COEFF_0 */
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[16386] = 0x0000, /* R16386 - RETUNEDAC_SHARED_COEFF_1 */
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[16387] = 0x0000, /* R16387 - RETUNEDAC_SHARED_COEFF_0 */
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[16388] = 0x0000, /* R16388 - SOUNDSTAGE_ENABLES_1 */
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[16389] = 0x0000, /* R16389 - SOUNDSTAGE_ENABLES_0 */
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[16896] = 0x0002, /* R16896 - HDBASS_AI_1 */
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[16897] = 0xBD12, /* R16897 - HDBASS_AI_0 */
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[16898] = 0x007C, /* R16898 - HDBASS_AR_1 */
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[16899] = 0x586C, /* R16899 - HDBASS_AR_0 */
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[16900] = 0x0053, /* R16900 - HDBASS_B_1 */
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[16901] = 0x8121, /* R16901 - HDBASS_B_0 */
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[16902] = 0x003F, /* R16902 - HDBASS_K_1 */
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[16903] = 0x8BD8, /* R16903 - HDBASS_K_0 */
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[16904] = 0x0032, /* R16904 - HDBASS_N1_1 */
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[16905] = 0xF52D, /* R16905 - HDBASS_N1_0 */
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[16906] = 0x0065, /* R16906 - HDBASS_N2_1 */
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[16907] = 0xAC8C, /* R16907 - HDBASS_N2_0 */
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[16908] = 0x006B, /* R16908 - HDBASS_N3_1 */
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[16909] = 0xE087, /* R16909 - HDBASS_N3_0 */
354
[16910] = 0x0072, /* R16910 - HDBASS_N4_1 */
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[16911] = 0x1483, /* R16911 - HDBASS_N4_0 */
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[16912] = 0x0072, /* R16912 - HDBASS_N5_1 */
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[16913] = 0x1483, /* R16913 - HDBASS_N5_0 */
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[16914] = 0x0043, /* R16914 - HDBASS_X1_1 */
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[16915] = 0x3525, /* R16915 - HDBASS_X1_0 */
360
[16916] = 0x0006, /* R16916 - HDBASS_X2_1 */
361
[16917] = 0x6A4A, /* R16917 - HDBASS_X2_0 */
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[16918] = 0x0043, /* R16918 - HDBASS_X3_1 */
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[16919] = 0x6079, /* R16919 - HDBASS_X3_0 */
364
[16920] = 0x0008, /* R16920 - HDBASS_ATK_1 */
365
[16921] = 0x0000, /* R16921 - HDBASS_ATK_0 */
366
[16922] = 0x0001, /* R16922 - HDBASS_DCY_1 */
367
[16923] = 0x0000, /* R16923 - HDBASS_DCY_0 */
368
[16924] = 0x0059, /* R16924 - HDBASS_PG_1 */
369
[16925] = 0x999A, /* R16925 - HDBASS_PG_0 */
371
[17048] = 0x0083, /* R17408 - HPF_C_1 */
372
[17049] = 0x98AD, /* R17409 - HPF_C_0 */
374
[17920] = 0x007F, /* R17920 - ADCL_RETUNE_C1_1 */
375
[17921] = 0xFFFF, /* R17921 - ADCL_RETUNE_C1_0 */
376
[17922] = 0x0000, /* R17922 - ADCL_RETUNE_C2_1 */
377
[17923] = 0x0000, /* R17923 - ADCL_RETUNE_C2_0 */
378
[17924] = 0x0000, /* R17924 - ADCL_RETUNE_C3_1 */
379
[17925] = 0x0000, /* R17925 - ADCL_RETUNE_C3_0 */
380
[17926] = 0x0000, /* R17926 - ADCL_RETUNE_C4_1 */
381
[17927] = 0x0000, /* R17927 - ADCL_RETUNE_C4_0 */
382
[17928] = 0x0000, /* R17928 - ADCL_RETUNE_C5_1 */
383
[17929] = 0x0000, /* R17929 - ADCL_RETUNE_C5_0 */
384
[17930] = 0x0000, /* R17930 - ADCL_RETUNE_C6_1 */
385
[17931] = 0x0000, /* R17931 - ADCL_RETUNE_C6_0 */
386
[17932] = 0x0000, /* R17932 - ADCL_RETUNE_C7_1 */
387
[17933] = 0x0000, /* R17933 - ADCL_RETUNE_C7_0 */
388
[17934] = 0x0000, /* R17934 - ADCL_RETUNE_C8_1 */
389
[17935] = 0x0000, /* R17935 - ADCL_RETUNE_C8_0 */
390
[17936] = 0x0000, /* R17936 - ADCL_RETUNE_C9_1 */
391
[17937] = 0x0000, /* R17937 - ADCL_RETUNE_C9_0 */
392
[17938] = 0x0000, /* R17938 - ADCL_RETUNE_C10_1 */
393
[17939] = 0x0000, /* R17939 - ADCL_RETUNE_C10_0 */
394
[17940] = 0x0000, /* R17940 - ADCL_RETUNE_C11_1 */
395
[17941] = 0x0000, /* R17941 - ADCL_RETUNE_C11_0 */
396
[17942] = 0x0000, /* R17942 - ADCL_RETUNE_C12_1 */
397
[17943] = 0x0000, /* R17943 - ADCL_RETUNE_C12_0 */
398
[17944] = 0x0000, /* R17944 - ADCL_RETUNE_C13_1 */
399
[17945] = 0x0000, /* R17945 - ADCL_RETUNE_C13_0 */
400
[17946] = 0x0000, /* R17946 - ADCL_RETUNE_C14_1 */
401
[17947] = 0x0000, /* R17947 - ADCL_RETUNE_C14_0 */
402
[17948] = 0x0000, /* R17948 - ADCL_RETUNE_C15_1 */
403
[17949] = 0x0000, /* R17949 - ADCL_RETUNE_C15_0 */
404
[17950] = 0x0000, /* R17950 - ADCL_RETUNE_C16_1 */
405
[17951] = 0x0000, /* R17951 - ADCL_RETUNE_C16_0 */
406
[17952] = 0x0000, /* R17952 - ADCL_RETUNE_C17_1 */
407
[17953] = 0x0000, /* R17953 - ADCL_RETUNE_C17_0 */
408
[17954] = 0x0000, /* R17954 - ADCL_RETUNE_C18_1 */
409
[17955] = 0x0000, /* R17955 - ADCL_RETUNE_C18_0 */
410
[17956] = 0x0000, /* R17956 - ADCL_RETUNE_C19_1 */
411
[17957] = 0x0000, /* R17957 - ADCL_RETUNE_C19_0 */
412
[17958] = 0x0000, /* R17958 - ADCL_RETUNE_C20_1 */
413
[17959] = 0x0000, /* R17959 - ADCL_RETUNE_C20_0 */
414
[17960] = 0x0000, /* R17960 - ADCL_RETUNE_C21_1 */
415
[17961] = 0x0000, /* R17961 - ADCL_RETUNE_C21_0 */
416
[17962] = 0x0000, /* R17962 - ADCL_RETUNE_C22_1 */
417
[17963] = 0x0000, /* R17963 - ADCL_RETUNE_C22_0 */
418
[17964] = 0x0000, /* R17964 - ADCL_RETUNE_C23_1 */
419
[17965] = 0x0000, /* R17965 - ADCL_RETUNE_C23_0 */
420
[17966] = 0x0000, /* R17966 - ADCL_RETUNE_C24_1 */
421
[17967] = 0x0000, /* R17967 - ADCL_RETUNE_C24_0 */
422
[17968] = 0x0000, /* R17968 - ADCL_RETUNE_C25_1 */
423
[17969] = 0x0000, /* R17969 - ADCL_RETUNE_C25_0 */
424
[17970] = 0x0000, /* R17970 - ADCL_RETUNE_C26_1 */
425
[17971] = 0x0000, /* R17971 - ADCL_RETUNE_C26_0 */
426
[17972] = 0x0000, /* R17972 - ADCL_RETUNE_C27_1 */
427
[17973] = 0x0000, /* R17973 - ADCL_RETUNE_C27_0 */
428
[17974] = 0x0000, /* R17974 - ADCL_RETUNE_C28_1 */
429
[17975] = 0x0000, /* R17975 - ADCL_RETUNE_C28_0 */
430
[17976] = 0x0000, /* R17976 - ADCL_RETUNE_C29_1 */
431
[17977] = 0x0000, /* R17977 - ADCL_RETUNE_C29_0 */
432
[17978] = 0x0000, /* R17978 - ADCL_RETUNE_C30_1 */
433
[17979] = 0x0000, /* R17979 - ADCL_RETUNE_C30_0 */
434
[17980] = 0x0000, /* R17980 - ADCL_RETUNE_C31_1 */
435
[17981] = 0x0000, /* R17981 - ADCL_RETUNE_C31_0 */
436
[17982] = 0x0000, /* R17982 - ADCL_RETUNE_C32_1 */
437
[17983] = 0x0000, /* R17983 - ADCL_RETUNE_C32_0 */
439
[18432] = 0x0020, /* R18432 - RETUNEADC_PG2_1 */
440
[18433] = 0x0000, /* R18433 - RETUNEADC_PG2_0 */
441
[18434] = 0x0040, /* R18434 - RETUNEADC_PG_1 */
442
[18435] = 0x0000, /* R18435 - RETUNEADC_PG_0 */
444
[18944] = 0x007F, /* R18944 - ADCR_RETUNE_C1_1 */
445
[18945] = 0xFFFF, /* R18945 - ADCR_RETUNE_C1_0 */
446
[18946] = 0x0000, /* R18946 - ADCR_RETUNE_C2_1 */
447
[18947] = 0x0000, /* R18947 - ADCR_RETUNE_C2_0 */
448
[18948] = 0x0000, /* R18948 - ADCR_RETUNE_C3_1 */
449
[18949] = 0x0000, /* R18949 - ADCR_RETUNE_C3_0 */
450
[18950] = 0x0000, /* R18950 - ADCR_RETUNE_C4_1 */
451
[18951] = 0x0000, /* R18951 - ADCR_RETUNE_C4_0 */
452
[18952] = 0x0000, /* R18952 - ADCR_RETUNE_C5_1 */
453
[18953] = 0x0000, /* R18953 - ADCR_RETUNE_C5_0 */
454
[18954] = 0x0000, /* R18954 - ADCR_RETUNE_C6_1 */
455
[18955] = 0x0000, /* R18955 - ADCR_RETUNE_C6_0 */
456
[18956] = 0x0000, /* R18956 - ADCR_RETUNE_C7_1 */
457
[18957] = 0x0000, /* R18957 - ADCR_RETUNE_C7_0 */
458
[18958] = 0x0000, /* R18958 - ADCR_RETUNE_C8_1 */
459
[18959] = 0x0000, /* R18959 - ADCR_RETUNE_C8_0 */
460
[18960] = 0x0000, /* R18960 - ADCR_RETUNE_C9_1 */
461
[18961] = 0x0000, /* R18961 - ADCR_RETUNE_C9_0 */
462
[18962] = 0x0000, /* R18962 - ADCR_RETUNE_C10_1 */
463
[18963] = 0x0000, /* R18963 - ADCR_RETUNE_C10_0 */
464
[18964] = 0x0000, /* R18964 - ADCR_RETUNE_C11_1 */
465
[18965] = 0x0000, /* R18965 - ADCR_RETUNE_C11_0 */
466
[18966] = 0x0000, /* R18966 - ADCR_RETUNE_C12_1 */
467
[18967] = 0x0000, /* R18967 - ADCR_RETUNE_C12_0 */
468
[18968] = 0x0000, /* R18968 - ADCR_RETUNE_C13_1 */
469
[18969] = 0x0000, /* R18969 - ADCR_RETUNE_C13_0 */
470
[18970] = 0x0000, /* R18970 - ADCR_RETUNE_C14_1 */
471
[18971] = 0x0000, /* R18971 - ADCR_RETUNE_C14_0 */
472
[18972] = 0x0000, /* R18972 - ADCR_RETUNE_C15_1 */
473
[18973] = 0x0000, /* R18973 - ADCR_RETUNE_C15_0 */
474
[18974] = 0x0000, /* R18974 - ADCR_RETUNE_C16_1 */
475
[18975] = 0x0000, /* R18975 - ADCR_RETUNE_C16_0 */
476
[18976] = 0x0000, /* R18976 - ADCR_RETUNE_C17_1 */
477
[18977] = 0x0000, /* R18977 - ADCR_RETUNE_C17_0 */
478
[18978] = 0x0000, /* R18978 - ADCR_RETUNE_C18_1 */
479
[18979] = 0x0000, /* R18979 - ADCR_RETUNE_C18_0 */
480
[18980] = 0x0000, /* R18980 - ADCR_RETUNE_C19_1 */
481
[18981] = 0x0000, /* R18981 - ADCR_RETUNE_C19_0 */
482
[18982] = 0x0000, /* R18982 - ADCR_RETUNE_C20_1 */
483
[18983] = 0x0000, /* R18983 - ADCR_RETUNE_C20_0 */
484
[18984] = 0x0000, /* R18984 - ADCR_RETUNE_C21_1 */
485
[18985] = 0x0000, /* R18985 - ADCR_RETUNE_C21_0 */
486
[18986] = 0x0000, /* R18986 - ADCR_RETUNE_C22_1 */
487
[18987] = 0x0000, /* R18987 - ADCR_RETUNE_C22_0 */
488
[18988] = 0x0000, /* R18988 - ADCR_RETUNE_C23_1 */
489
[18989] = 0x0000, /* R18989 - ADCR_RETUNE_C23_0 */
490
[18990] = 0x0000, /* R18990 - ADCR_RETUNE_C24_1 */
491
[18991] = 0x0000, /* R18991 - ADCR_RETUNE_C24_0 */
492
[18992] = 0x0000, /* R18992 - ADCR_RETUNE_C25_1 */
493
[18993] = 0x0000, /* R18993 - ADCR_RETUNE_C25_0 */
494
[18994] = 0x0000, /* R18994 - ADCR_RETUNE_C26_1 */
495
[18995] = 0x0000, /* R18995 - ADCR_RETUNE_C26_0 */
496
[18996] = 0x0000, /* R18996 - ADCR_RETUNE_C27_1 */
497
[18997] = 0x0000, /* R18997 - ADCR_RETUNE_C27_0 */
498
[18998] = 0x0000, /* R18998 - ADCR_RETUNE_C28_1 */
499
[18999] = 0x0000, /* R18999 - ADCR_RETUNE_C28_0 */
500
[19000] = 0x0000, /* R19000 - ADCR_RETUNE_C29_1 */
501
[19001] = 0x0000, /* R19001 - ADCR_RETUNE_C29_0 */
502
[19002] = 0x0000, /* R19002 - ADCR_RETUNE_C30_1 */
503
[19003] = 0x0000, /* R19003 - ADCR_RETUNE_C30_0 */
504
[19004] = 0x0000, /* R19004 - ADCR_RETUNE_C31_1 */
505
[19005] = 0x0000, /* R19005 - ADCR_RETUNE_C31_0 */
506
[19006] = 0x0000, /* R19006 - ADCR_RETUNE_C32_1 */
507
[19007] = 0x0000, /* R19007 - ADCR_RETUNE_C32_0 */
509
[19456] = 0x007F, /* R19456 - DACL_RETUNE_C1_1 */
510
[19457] = 0xFFFF, /* R19457 - DACL_RETUNE_C1_0 */
511
[19458] = 0x0000, /* R19458 - DACL_RETUNE_C2_1 */
512
[19459] = 0x0000, /* R19459 - DACL_RETUNE_C2_0 */
513
[19460] = 0x0000, /* R19460 - DACL_RETUNE_C3_1 */
514
[19461] = 0x0000, /* R19461 - DACL_RETUNE_C3_0 */
515
[19462] = 0x0000, /* R19462 - DACL_RETUNE_C4_1 */
516
[19463] = 0x0000, /* R19463 - DACL_RETUNE_C4_0 */
517
[19464] = 0x0000, /* R19464 - DACL_RETUNE_C5_1 */
518
[19465] = 0x0000, /* R19465 - DACL_RETUNE_C5_0 */
519
[19466] = 0x0000, /* R19466 - DACL_RETUNE_C6_1 */
520
[19467] = 0x0000, /* R19467 - DACL_RETUNE_C6_0 */
521
[19468] = 0x0000, /* R19468 - DACL_RETUNE_C7_1 */
522
[19469] = 0x0000, /* R19469 - DACL_RETUNE_C7_0 */
523
[19470] = 0x0000, /* R19470 - DACL_RETUNE_C8_1 */
524
[19471] = 0x0000, /* R19471 - DACL_RETUNE_C8_0 */
525
[19472] = 0x0000, /* R19472 - DACL_RETUNE_C9_1 */
526
[19473] = 0x0000, /* R19473 - DACL_RETUNE_C9_0 */
527
[19474] = 0x0000, /* R19474 - DACL_RETUNE_C10_1 */
528
[19475] = 0x0000, /* R19475 - DACL_RETUNE_C10_0 */
529
[19476] = 0x0000, /* R19476 - DACL_RETUNE_C11_1 */
530
[19477] = 0x0000, /* R19477 - DACL_RETUNE_C11_0 */
531
[19478] = 0x0000, /* R19478 - DACL_RETUNE_C12_1 */
532
[19479] = 0x0000, /* R19479 - DACL_RETUNE_C12_0 */
533
[19480] = 0x0000, /* R19480 - DACL_RETUNE_C13_1 */
534
[19481] = 0x0000, /* R19481 - DACL_RETUNE_C13_0 */
535
[19482] = 0x0000, /* R19482 - DACL_RETUNE_C14_1 */
536
[19483] = 0x0000, /* R19483 - DACL_RETUNE_C14_0 */
537
[19484] = 0x0000, /* R19484 - DACL_RETUNE_C15_1 */
538
[19485] = 0x0000, /* R19485 - DACL_RETUNE_C15_0 */
539
[19486] = 0x0000, /* R19486 - DACL_RETUNE_C16_1 */
540
[19487] = 0x0000, /* R19487 - DACL_RETUNE_C16_0 */
541
[19488] = 0x0000, /* R19488 - DACL_RETUNE_C17_1 */
542
[19489] = 0x0000, /* R19489 - DACL_RETUNE_C17_0 */
543
[19490] = 0x0000, /* R19490 - DACL_RETUNE_C18_1 */
544
[19491] = 0x0000, /* R19491 - DACL_RETUNE_C18_0 */
545
[19492] = 0x0000, /* R19492 - DACL_RETUNE_C19_1 */
546
[19493] = 0x0000, /* R19493 - DACL_RETUNE_C19_0 */
547
[19494] = 0x0000, /* R19494 - DACL_RETUNE_C20_1 */
548
[19495] = 0x0000, /* R19495 - DACL_RETUNE_C20_0 */
549
[19496] = 0x0000, /* R19496 - DACL_RETUNE_C21_1 */
550
[19497] = 0x0000, /* R19497 - DACL_RETUNE_C21_0 */
551
[19498] = 0x0000, /* R19498 - DACL_RETUNE_C22_1 */
552
[19499] = 0x0000, /* R19499 - DACL_RETUNE_C22_0 */
553
[19500] = 0x0000, /* R19500 - DACL_RETUNE_C23_1 */
554
[19501] = 0x0000, /* R19501 - DACL_RETUNE_C23_0 */
555
[19502] = 0x0000, /* R19502 - DACL_RETUNE_C24_1 */
556
[19503] = 0x0000, /* R19503 - DACL_RETUNE_C24_0 */
557
[19504] = 0x0000, /* R19504 - DACL_RETUNE_C25_1 */
558
[19505] = 0x0000, /* R19505 - DACL_RETUNE_C25_0 */
559
[19506] = 0x0000, /* R19506 - DACL_RETUNE_C26_1 */
560
[19507] = 0x0000, /* R19507 - DACL_RETUNE_C26_0 */
561
[19508] = 0x0000, /* R19508 - DACL_RETUNE_C27_1 */
562
[19509] = 0x0000, /* R19509 - DACL_RETUNE_C27_0 */
563
[19510] = 0x0000, /* R19510 - DACL_RETUNE_C28_1 */
564
[19511] = 0x0000, /* R19511 - DACL_RETUNE_C28_0 */
565
[19512] = 0x0000, /* R19512 - DACL_RETUNE_C29_1 */
566
[19513] = 0x0000, /* R19513 - DACL_RETUNE_C29_0 */
567
[19514] = 0x0000, /* R19514 - DACL_RETUNE_C30_1 */
568
[19515] = 0x0000, /* R19515 - DACL_RETUNE_C30_0 */
569
[19516] = 0x0000, /* R19516 - DACL_RETUNE_C31_1 */
570
[19517] = 0x0000, /* R19517 - DACL_RETUNE_C31_0 */
571
[19518] = 0x0000, /* R19518 - DACL_RETUNE_C32_1 */
572
[19519] = 0x0000, /* R19519 - DACL_RETUNE_C32_0 */
574
[19968] = 0x0020, /* R19968 - RETUNEDAC_PG2_1 */
575
[19969] = 0x0000, /* R19969 - RETUNEDAC_PG2_0 */
576
[19970] = 0x0040, /* R19970 - RETUNEDAC_PG_1 */
577
[19971] = 0x0000, /* R19971 - RETUNEDAC_PG_0 */
579
[20480] = 0x007F, /* R20480 - DACR_RETUNE_C1_1 */
580
[20481] = 0xFFFF, /* R20481 - DACR_RETUNE_C1_0 */
581
[20482] = 0x0000, /* R20482 - DACR_RETUNE_C2_1 */
582
[20483] = 0x0000, /* R20483 - DACR_RETUNE_C2_0 */
583
[20484] = 0x0000, /* R20484 - DACR_RETUNE_C3_1 */
584
[20485] = 0x0000, /* R20485 - DACR_RETUNE_C3_0 */
585
[20486] = 0x0000, /* R20486 - DACR_RETUNE_C4_1 */
586
[20487] = 0x0000, /* R20487 - DACR_RETUNE_C4_0 */
587
[20488] = 0x0000, /* R20488 - DACR_RETUNE_C5_1 */
588
[20489] = 0x0000, /* R20489 - DACR_RETUNE_C5_0 */
589
[20490] = 0x0000, /* R20490 - DACR_RETUNE_C6_1 */
590
[20491] = 0x0000, /* R20491 - DACR_RETUNE_C6_0 */
591
[20492] = 0x0000, /* R20492 - DACR_RETUNE_C7_1 */
592
[20493] = 0x0000, /* R20493 - DACR_RETUNE_C7_0 */
593
[20494] = 0x0000, /* R20494 - DACR_RETUNE_C8_1 */
594
[20495] = 0x0000, /* R20495 - DACR_RETUNE_C8_0 */
595
[20496] = 0x0000, /* R20496 - DACR_RETUNE_C9_1 */
596
[20497] = 0x0000, /* R20497 - DACR_RETUNE_C9_0 */
597
[20498] = 0x0000, /* R20498 - DACR_RETUNE_C10_1 */
598
[20499] = 0x0000, /* R20499 - DACR_RETUNE_C10_0 */
599
[20500] = 0x0000, /* R20500 - DACR_RETUNE_C11_1 */
600
[20501] = 0x0000, /* R20501 - DACR_RETUNE_C11_0 */
601
[20502] = 0x0000, /* R20502 - DACR_RETUNE_C12_1 */
602
[20503] = 0x0000, /* R20503 - DACR_RETUNE_C12_0 */
603
[20504] = 0x0000, /* R20504 - DACR_RETUNE_C13_1 */
604
[20505] = 0x0000, /* R20505 - DACR_RETUNE_C13_0 */
605
[20506] = 0x0000, /* R20506 - DACR_RETUNE_C14_1 */
606
[20507] = 0x0000, /* R20507 - DACR_RETUNE_C14_0 */
607
[20508] = 0x0000, /* R20508 - DACR_RETUNE_C15_1 */
608
[20509] = 0x0000, /* R20509 - DACR_RETUNE_C15_0 */
609
[20510] = 0x0000, /* R20510 - DACR_RETUNE_C16_1 */
610
[20511] = 0x0000, /* R20511 - DACR_RETUNE_C16_0 */
611
[20512] = 0x0000, /* R20512 - DACR_RETUNE_C17_1 */
612
[20513] = 0x0000, /* R20513 - DACR_RETUNE_C17_0 */
613
[20514] = 0x0000, /* R20514 - DACR_RETUNE_C18_1 */
614
[20515] = 0x0000, /* R20515 - DACR_RETUNE_C18_0 */
615
[20516] = 0x0000, /* R20516 - DACR_RETUNE_C19_1 */
616
[20517] = 0x0000, /* R20517 - DACR_RETUNE_C19_0 */
617
[20518] = 0x0000, /* R20518 - DACR_RETUNE_C20_1 */
618
[20519] = 0x0000, /* R20519 - DACR_RETUNE_C20_0 */
619
[20520] = 0x0000, /* R20520 - DACR_RETUNE_C21_1 */
620
[20521] = 0x0000, /* R20521 - DACR_RETUNE_C21_0 */
621
[20522] = 0x0000, /* R20522 - DACR_RETUNE_C22_1 */
622
[20523] = 0x0000, /* R20523 - DACR_RETUNE_C22_0 */
623
[20524] = 0x0000, /* R20524 - DACR_RETUNE_C23_1 */
624
[20525] = 0x0000, /* R20525 - DACR_RETUNE_C23_0 */
625
[20526] = 0x0000, /* R20526 - DACR_RETUNE_C24_1 */
626
[20527] = 0x0000, /* R20527 - DACR_RETUNE_C24_0 */
627
[20528] = 0x0000, /* R20528 - DACR_RETUNE_C25_1 */
628
[20529] = 0x0000, /* R20529 - DACR_RETUNE_C25_0 */
629
[20530] = 0x0000, /* R20530 - DACR_RETUNE_C26_1 */
630
[20531] = 0x0000, /* R20531 - DACR_RETUNE_C26_0 */
631
[20532] = 0x0000, /* R20532 - DACR_RETUNE_C27_1 */
632
[20533] = 0x0000, /* R20533 - DACR_RETUNE_C27_0 */
633
[20534] = 0x0000, /* R20534 - DACR_RETUNE_C28_1 */
634
[20535] = 0x0000, /* R20535 - DACR_RETUNE_C28_0 */
635
[20536] = 0x0000, /* R20536 - DACR_RETUNE_C29_1 */
636
[20537] = 0x0000, /* R20537 - DACR_RETUNE_C29_0 */
637
[20538] = 0x0000, /* R20538 - DACR_RETUNE_C30_1 */
638
[20539] = 0x0000, /* R20539 - DACR_RETUNE_C30_0 */
639
[20540] = 0x0000, /* R20540 - DACR_RETUNE_C31_1 */
640
[20541] = 0x0000, /* R20541 - DACR_RETUNE_C31_0 */
641
[20542] = 0x0000, /* R20542 - DACR_RETUNE_C32_1 */
642
[20543] = 0x0000, /* R20543 - DACR_RETUNE_C32_0 */
644
[20992] = 0x008C, /* R20992 - VSS_XHD2_1 */
645
[20993] = 0x0200, /* R20993 - VSS_XHD2_0 */
646
[20994] = 0x0035, /* R20994 - VSS_XHD3_1 */
647
[20995] = 0x0700, /* R20995 - VSS_XHD3_0 */
648
[20996] = 0x003A, /* R20996 - VSS_XHN1_1 */
649
[20997] = 0x4100, /* R20997 - VSS_XHN1_0 */
650
[20998] = 0x008B, /* R20998 - VSS_XHN2_1 */
651
[20999] = 0x7D00, /* R20999 - VSS_XHN2_0 */
652
[21000] = 0x003A, /* R21000 - VSS_XHN3_1 */
653
[21001] = 0x4100, /* R21001 - VSS_XHN3_0 */
654
[21002] = 0x008C, /* R21002 - VSS_XLA_1 */
655
[21003] = 0xFEE8, /* R21003 - VSS_XLA_0 */
656
[21004] = 0x0078, /* R21004 - VSS_XLB_1 */
657
[21005] = 0x0000, /* R21005 - VSS_XLB_0 */
658
[21006] = 0x003F, /* R21006 - VSS_XLG_1 */
659
[21007] = 0xB260, /* R21007 - VSS_XLG_0 */
660
[21008] = 0x002D, /* R21008 - VSS_PG2_1 */
661
[21009] = 0x1818, /* R21009 - VSS_PG2_0 */
662
[21010] = 0x0020, /* R21010 - VSS_PG_1 */
663
[21011] = 0x0000, /* R21011 - VSS_PG_0 */
664
[21012] = 0x00F1, /* R21012 - VSS_XTD1_1 */
665
[21013] = 0x8340, /* R21013 - VSS_XTD1_0 */
666
[21014] = 0x00FB, /* R21014 - VSS_XTD2_1 */
667
[21015] = 0x8300, /* R21015 - VSS_XTD2_0 */
668
[21016] = 0x00EE, /* R21016 - VSS_XTD3_1 */
669
[21017] = 0xAEC0, /* R21017 - VSS_XTD3_0 */
670
[21018] = 0x00FB, /* R21018 - VSS_XTD4_1 */
671
[21019] = 0xAC40, /* R21019 - VSS_XTD4_0 */
672
[21020] = 0x00F1, /* R21020 - VSS_XTD5_1 */
673
[21021] = 0x7F80, /* R21021 - VSS_XTD5_0 */
674
[21022] = 0x00F4, /* R21022 - VSS_XTD6_1 */
675
[21023] = 0x3B40, /* R21023 - VSS_XTD6_0 */
676
[21024] = 0x00F5, /* R21024 - VSS_XTD7_1 */
677
[21025] = 0xFB00, /* R21025 - VSS_XTD7_0 */
678
[21026] = 0x00EA, /* R21026 - VSS_XTD8_1 */
679
[21027] = 0x10C0, /* R21027 - VSS_XTD8_0 */
680
[21028] = 0x00FC, /* R21028 - VSS_XTD9_1 */
681
[21029] = 0xC580, /* R21029 - VSS_XTD9_0 */
682
[21030] = 0x00E2, /* R21030 - VSS_XTD10_1 */
683
[21031] = 0x75C0, /* R21031 - VSS_XTD10_0 */
684
[21032] = 0x0004, /* R21032 - VSS_XTD11_1 */
685
[21033] = 0xB480, /* R21033 - VSS_XTD11_0 */
686
[21034] = 0x00D4, /* R21034 - VSS_XTD12_1 */
687
[21035] = 0xF980, /* R21035 - VSS_XTD12_0 */
688
[21036] = 0x0004, /* R21036 - VSS_XTD13_1 */
689
[21037] = 0x9140, /* R21037 - VSS_XTD13_0 */
690
[21038] = 0x00D8, /* R21038 - VSS_XTD14_1 */
691
[21039] = 0xA480, /* R21039 - VSS_XTD14_0 */
692
[21040] = 0x0002, /* R21040 - VSS_XTD15_1 */
693
[21041] = 0x3DC0, /* R21041 - VSS_XTD15_0 */
694
[21042] = 0x00CF, /* R21042 - VSS_XTD16_1 */
695
[21043] = 0x7A80, /* R21043 - VSS_XTD16_0 */
696
[21044] = 0x00DC, /* R21044 - VSS_XTD17_1 */
697
[21045] = 0x0600, /* R21045 - VSS_XTD17_0 */
698
[21046] = 0x00F2, /* R21046 - VSS_XTD18_1 */
699
[21047] = 0xDAC0, /* R21047 - VSS_XTD18_0 */
700
[21048] = 0x00BA, /* R21048 - VSS_XTD19_1 */
701
[21049] = 0xF340, /* R21049 - VSS_XTD19_0 */
702
[21050] = 0x000A, /* R21050 - VSS_XTD20_1 */
703
[21051] = 0x7940, /* R21051 - VSS_XTD20_0 */
704
[21052] = 0x001C, /* R21052 - VSS_XTD21_1 */
705
[21053] = 0x0680, /* R21053 - VSS_XTD21_0 */
706
[21054] = 0x00FD, /* R21054 - VSS_XTD22_1 */
707
[21055] = 0x2D00, /* R21055 - VSS_XTD22_0 */
708
[21056] = 0x001C, /* R21056 - VSS_XTD23_1 */
709
[21057] = 0xE840, /* R21057 - VSS_XTD23_0 */
710
[21058] = 0x000D, /* R21058 - VSS_XTD24_1 */
711
[21059] = 0xDC40, /* R21059 - VSS_XTD24_0 */
712
[21060] = 0x00FC, /* R21060 - VSS_XTD25_1 */
713
[21061] = 0x9D00, /* R21061 - VSS_XTD25_0 */
714
[21062] = 0x0009, /* R21062 - VSS_XTD26_1 */
715
[21063] = 0x5580, /* R21063 - VSS_XTD26_0 */
716
[21064] = 0x00FE, /* R21064 - VSS_XTD27_1 */
717
[21065] = 0x7E80, /* R21065 - VSS_XTD27_0 */
718
[21066] = 0x000E, /* R21066 - VSS_XTD28_1 */
719
[21067] = 0xAB40, /* R21067 - VSS_XTD28_0 */
720
[21068] = 0x00F9, /* R21068 - VSS_XTD29_1 */
721
[21069] = 0x9880, /* R21069 - VSS_XTD29_0 */
722
[21070] = 0x0009, /* R21070 - VSS_XTD30_1 */
723
[21071] = 0x87C0, /* R21071 - VSS_XTD30_0 */
724
[21072] = 0x00FD, /* R21072 - VSS_XTD31_1 */
725
[21073] = 0x2C40, /* R21073 - VSS_XTD31_0 */
726
[21074] = 0x0009, /* R21074 - VSS_XTD32_1 */
727
[21075] = 0x4800, /* R21075 - VSS_XTD32_0 */
728
[21076] = 0x0003, /* R21076 - VSS_XTS1_1 */
729
[21077] = 0x5F40, /* R21077 - VSS_XTS1_0 */
730
[21078] = 0x0000, /* R21078 - VSS_XTS2_1 */
731
[21079] = 0x8700, /* R21079 - VSS_XTS2_0 */
732
[21080] = 0x00FA, /* R21080 - VSS_XTS3_1 */
733
[21081] = 0xE4C0, /* R21081 - VSS_XTS3_0 */
734
[21082] = 0x0000, /* R21082 - VSS_XTS4_1 */
735
[21083] = 0x0B40, /* R21083 - VSS_XTS4_0 */
736
[21084] = 0x0004, /* R21084 - VSS_XTS5_1 */
737
[21085] = 0xE180, /* R21085 - VSS_XTS5_0 */
738
[21086] = 0x0001, /* R21086 - VSS_XTS6_1 */
739
[21087] = 0x1F40, /* R21087 - VSS_XTS6_0 */
740
[21088] = 0x00F8, /* R21088 - VSS_XTS7_1 */
741
[21089] = 0xB000, /* R21089 - VSS_XTS7_0 */
742
[21090] = 0x00FB, /* R21090 - VSS_XTS8_1 */
743
[21091] = 0xCBC0, /* R21091 - VSS_XTS8_0 */
744
[21092] = 0x0004, /* R21092 - VSS_XTS9_1 */
745
[21093] = 0xF380, /* R21093 - VSS_XTS9_0 */
746
[21094] = 0x0007, /* R21094 - VSS_XTS10_1 */
747
[21095] = 0xDF40, /* R21095 - VSS_XTS10_0 */
748
[21096] = 0x00FF, /* R21096 - VSS_XTS11_1 */
749
[21097] = 0x0700, /* R21097 - VSS_XTS11_0 */
750
[21098] = 0x00EF, /* R21098 - VSS_XTS12_1 */
751
[21099] = 0xD700, /* R21099 - VSS_XTS12_0 */
752
[21100] = 0x00FB, /* R21100 - VSS_XTS13_1 */
753
[21101] = 0xAF40, /* R21101 - VSS_XTS13_0 */
754
[21102] = 0x0010, /* R21102 - VSS_XTS14_1 */
755
[21103] = 0x8A80, /* R21103 - VSS_XTS14_0 */
756
[21104] = 0x0011, /* R21104 - VSS_XTS15_1 */
757
[21105] = 0x07C0, /* R21105 - VSS_XTS15_0 */
758
[21106] = 0x00E0, /* R21106 - VSS_XTS16_1 */
759
[21107] = 0x0800, /* R21107 - VSS_XTS16_0 */
760
[21108] = 0x00D2, /* R21108 - VSS_XTS17_1 */
761
[21109] = 0x7600, /* R21109 - VSS_XTS17_0 */
762
[21110] = 0x0020, /* R21110 - VSS_XTS18_1 */
763
[21111] = 0xCF40, /* R21111 - VSS_XTS18_0 */
764
[21112] = 0x0030, /* R21112 - VSS_XTS19_1 */
765
[21113] = 0x2340, /* R21113 - VSS_XTS19_0 */
766
[21114] = 0x00FD, /* R21114 - VSS_XTS20_1 */
767
[21115] = 0x69C0, /* R21115 - VSS_XTS20_0 */
768
[21116] = 0x0028, /* R21116 - VSS_XTS21_1 */
769
[21117] = 0x3500, /* R21117 - VSS_XTS21_0 */
770
[21118] = 0x0006, /* R21118 - VSS_XTS22_1 */
771
[21119] = 0x3300, /* R21119 - VSS_XTS22_0 */
772
[21120] = 0x00D9, /* R21120 - VSS_XTS23_1 */
773
[21121] = 0xF6C0, /* R21121 - VSS_XTS23_0 */
774
[21122] = 0x00F3, /* R21122 - VSS_XTS24_1 */
775
[21123] = 0x3340, /* R21123 - VSS_XTS24_0 */
776
[21124] = 0x000F, /* R21124 - VSS_XTS25_1 */
777
[21125] = 0x4200, /* R21125 - VSS_XTS25_0 */
778
[21126] = 0x0004, /* R21126 - VSS_XTS26_1 */
779
[21127] = 0x0C80, /* R21127 - VSS_XTS26_0 */
780
[21128] = 0x00FB, /* R21128 - VSS_XTS27_1 */
781
[21129] = 0x3F80, /* R21129 - VSS_XTS27_0 */
782
[21130] = 0x00F7, /* R21130 - VSS_XTS28_1 */
783
[21131] = 0x57C0, /* R21131 - VSS_XTS28_0 */
784
[21132] = 0x0003, /* R21132 - VSS_XTS29_1 */
785
[21133] = 0x5400, /* R21133 - VSS_XTS29_0 */
786
[21134] = 0x0000, /* R21134 - VSS_XTS30_1 */
787
[21135] = 0xC6C0, /* R21135 - VSS_XTS30_0 */
788
[21136] = 0x0003, /* R21136 - VSS_XTS31_1 */
789
[21137] = 0x12C0, /* R21137 - VSS_XTS31_0 */
790
[21138] = 0x00FD, /* R21138 - VSS_XTS32_1 */
791
[21139] = 0x8580, /* R21139 - VSS_XTS32_0 */
794
static const struct wm8962_reg_access {
798
} wm8962_reg_access[WM8962_MAX_REGISTER + 1] = {
799
[0] = { 0x00FF, 0x01FF, 0x0000 }, /* R0 - Left Input volume */
800
[1] = { 0xFEFF, 0x01FF, 0xFFFF }, /* R1 - Right Input volume */
801
[2] = { 0x00FF, 0x01FF, 0x0000 }, /* R2 - HPOUTL volume */
802
[3] = { 0x00FF, 0x01FF, 0x0000 }, /* R3 - HPOUTR volume */
803
[4] = { 0x07FE, 0x07FE, 0xFFFF }, /* R4 - Clocking1 */
804
[5] = { 0x007F, 0x007F, 0x0000 }, /* R5 - ADC & DAC Control 1 */
805
[6] = { 0x37ED, 0x37ED, 0x0000 }, /* R6 - ADC & DAC Control 2 */
806
[7] = { 0x1FFF, 0x1FFF, 0x0000 }, /* R7 - Audio Interface 0 */
807
[8] = { 0x0FEF, 0x0FEF, 0xFFFF }, /* R8 - Clocking2 */
808
[9] = { 0x0B9F, 0x039F, 0x0000 }, /* R9 - Audio Interface 1 */
809
[10] = { 0x00FF, 0x01FF, 0x0000 }, /* R10 - Left DAC volume */
810
[11] = { 0x00FF, 0x01FF, 0x0000 }, /* R11 - Right DAC volume */
811
[14] = { 0x07FF, 0x07FF, 0x0000 }, /* R14 - Audio Interface 2 */
812
[15] = { 0xFFFF, 0xFFFF, 0xFFFF }, /* R15 - Software Reset */
813
[17] = { 0x07FF, 0x07FF, 0x0000 }, /* R17 - ALC1 */
814
[18] = { 0xF8FF, 0x00FF, 0xFFFF }, /* R18 - ALC2 */
815
[19] = { 0x1DFF, 0x1DFF, 0x0000 }, /* R19 - ALC3 */
816
[20] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20 - Noise Gate */
817
[21] = { 0x00FF, 0x01FF, 0x0000 }, /* R21 - Left ADC volume */
818
[22] = { 0x00FF, 0x01FF, 0x0000 }, /* R22 - Right ADC volume */
819
[23] = { 0x0161, 0x0161, 0x0000 }, /* R23 - Additional control(1) */
820
[24] = { 0x0008, 0x0008, 0x0000 }, /* R24 - Additional control(2) */
821
[25] = { 0x07FE, 0x07FE, 0x0000 }, /* R25 - Pwr Mgmt (1) */
822
[26] = { 0x01FB, 0x01FB, 0x0000 }, /* R26 - Pwr Mgmt (2) */
823
[27] = { 0x0017, 0x0017, 0x0000 }, /* R27 - Additional Control (3) */
824
[28] = { 0x001C, 0x001C, 0x0000 }, /* R28 - Anti-pop */
826
[30] = { 0xFFFE, 0xFFFE, 0x0000 }, /* R30 - Clocking 3 */
827
[31] = { 0x000F, 0x000F, 0x0000 }, /* R31 - Input mixer control (1) */
828
[32] = { 0x01FF, 0x01FF, 0x0000 }, /* R32 - Left input mixer volume */
829
[33] = { 0x01FF, 0x01FF, 0x0000 }, /* R33 - Right input mixer volume */
830
[34] = { 0x003F, 0x003F, 0x0000 }, /* R34 - Input mixer control (2) */
831
[35] = { 0x003F, 0x003F, 0x0000 }, /* R35 - Input bias control */
832
[37] = { 0x001F, 0x001F, 0x0000 }, /* R37 - Left input PGA control */
833
[38] = { 0x001F, 0x001F, 0x0000 }, /* R38 - Right input PGA control */
834
[40] = { 0x00FF, 0x01FF, 0x0000 }, /* R40 - SPKOUTL volume */
835
[41] = { 0x00FF, 0x01FF, 0x0000 }, /* R41 - SPKOUTR volume */
837
[47] = { 0x000F, 0x0000, 0x0000 }, /* R47 - Thermal Shutdown Status */
838
[48] = { 0x7EC7, 0x7E07, 0xFFFF }, /* R48 - Additional Control (4) */
839
[49] = { 0x00D3, 0x00D7, 0xFFFF }, /* R49 - Class D Control 1 */
840
[51] = { 0x0047, 0x0047, 0x0000 }, /* R51 - Class D Control 2 */
841
[56] = { 0x001E, 0x001E, 0x0000 }, /* R56 - Clocking 4 */
842
[57] = { 0x02FC, 0x02FC, 0x0000 }, /* R57 - DAC DSP Mixing (1) */
843
[58] = { 0x00FC, 0x00FC, 0x0000 }, /* R58 - DAC DSP Mixing (2) */
844
[60] = { 0x00CC, 0x00CC, 0x0000 }, /* R60 - DC Servo 0 */
845
[61] = { 0x00DD, 0x00DD, 0x0000 }, /* R61 - DC Servo 1 */
846
[64] = { 0x3F80, 0x3F80, 0x0000 }, /* R64 - DC Servo 4 */
847
[66] = { 0x0780, 0x0000, 0xFFFF }, /* R66 - DC Servo 6 */
848
[68] = { 0x0007, 0x0007, 0x0000 }, /* R68 - Analogue PGA Bias */
849
[69] = { 0x00FF, 0x00FF, 0x0000 }, /* R69 - Analogue HP 0 */
850
[71] = { 0x01FF, 0x01FF, 0x0000 }, /* R71 - Analogue HP 2 */
851
[72] = { 0x0001, 0x0001, 0x0000 }, /* R72 - Charge Pump 1 */
852
[82] = { 0x0001, 0x0001, 0x0000 }, /* R82 - Charge Pump B */
853
[87] = { 0x00A0, 0x00A0, 0x0000 }, /* R87 - Write Sequencer Control 1 */
854
[90] = { 0x007F, 0x01FF, 0x0000 }, /* R90 - Write Sequencer Control 2 */
855
[93] = { 0x03F9, 0x0000, 0x0000 }, /* R93 - Write Sequencer Control 3 */
856
[94] = { 0x0070, 0x0070, 0x0000 }, /* R94 - Control Interface */
857
[99] = { 0x000F, 0x000F, 0x0000 }, /* R99 - Mixer Enables */
858
[100] = { 0x00BF, 0x00BF, 0x0000 }, /* R100 - Headphone Mixer (1) */
859
[101] = { 0x00BF, 0x00BF, 0x0000 }, /* R101 - Headphone Mixer (2) */
860
[102] = { 0x01FF, 0x01FF, 0x0000 }, /* R102 - Headphone Mixer (3) */
861
[103] = { 0x01FF, 0x01FF, 0x0000 }, /* R103 - Headphone Mixer (4) */
862
[105] = { 0x00BF, 0x00BF, 0x0000 }, /* R105 - Speaker Mixer (1) */
863
[106] = { 0x00BF, 0x00BF, 0x0000 }, /* R106 - Speaker Mixer (2) */
864
[107] = { 0x01FF, 0x01FF, 0x0000 }, /* R107 - Speaker Mixer (3) */
865
[108] = { 0x01FF, 0x01FF, 0x0000 }, /* R108 - Speaker Mixer (4) */
866
[109] = { 0x00F0, 0x00F0, 0x0000 }, /* R109 - Speaker Mixer (5) */
867
[110] = { 0x00F7, 0x00F7, 0x0000 }, /* R110 - Beep Generator (1) */
868
[115] = { 0x001F, 0x001F, 0x0000 }, /* R115 - Oscillator Trim (3) */
869
[116] = { 0x001F, 0x001F, 0x0000 }, /* R116 - Oscillator Trim (4) */
870
[119] = { 0x00FF, 0x00FF, 0x0000 }, /* R119 - Oscillator Trim (7) */
871
[124] = { 0x0079, 0x0079, 0x0000 }, /* R124 - Analogue Clocking1 */
872
[125] = { 0x00DF, 0x00DF, 0x0000 }, /* R125 - Analogue Clocking2 */
873
[126] = { 0x000D, 0x000D, 0x0000 }, /* R126 - Analogue Clocking3 */
874
[127] = { 0x0000, 0xFFFF, 0x0000 }, /* R127 - PLL Software Reset */
875
[129] = { 0x00B0, 0x00B0, 0x0000 }, /* R129 - PLL2 */
876
[131] = { 0x0003, 0x0003, 0x0000 }, /* R131 - PLL 4 */
877
[136] = { 0x005F, 0x005F, 0x0000 }, /* R136 - PLL 9 */
878
[137] = { 0x00FF, 0x00FF, 0x0000 }, /* R137 - PLL 10 */
879
[138] = { 0x00FF, 0x00FF, 0x0000 }, /* R138 - PLL 11 */
880
[139] = { 0x00FF, 0x00FF, 0x0000 }, /* R139 - PLL 12 */
881
[140] = { 0x005F, 0x005F, 0x0000 }, /* R140 - PLL 13 */
882
[141] = { 0x00FF, 0x00FF, 0x0000 }, /* R141 - PLL 14 */
883
[142] = { 0x00FF, 0x00FF, 0x0000 }, /* R142 - PLL 15 */
884
[143] = { 0x00FF, 0x00FF, 0x0000 }, /* R143 - PLL 16 */
885
[155] = { 0x0067, 0x0067, 0x0000 }, /* R155 - FLL Control (1) */
886
[156] = { 0x01FB, 0x01FB, 0x0000 }, /* R156 - FLL Control (2) */
887
[157] = { 0x0007, 0x0007, 0x0000 }, /* R157 - FLL Control (3) */
888
[159] = { 0x007F, 0x007F, 0x0000 }, /* R159 - FLL Control (5) */
889
[160] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R160 - FLL Control (6) */
890
[161] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R161 - FLL Control (7) */
891
[162] = { 0x03FF, 0x03FF, 0x0000 }, /* R162 - FLL Control (8) */
892
[252] = { 0x0005, 0x0005, 0x0000 }, /* R252 - General test 1 */
893
[256] = { 0x000F, 0x000F, 0x0000 }, /* R256 - DF1 */
894
[257] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R257 - DF2 */
895
[258] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R258 - DF3 */
896
[259] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R259 - DF4 */
897
[260] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R260 - DF5 */
898
[261] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R261 - DF6 */
899
[262] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R262 - DF7 */
900
[264] = { 0x0003, 0x0003, 0x0000 }, /* R264 - LHPF1 */
901
[265] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R265 - LHPF2 */
902
[268] = { 0x0077, 0x0077, 0x0000 }, /* R268 - THREED1 */
903
[269] = { 0xFFFC, 0xFFFC, 0x0000 }, /* R269 - THREED2 */
904
[270] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R270 - THREED3 */
905
[271] = { 0xFFFC, 0xFFFC, 0x0000 }, /* R271 - THREED4 */
906
[276] = { 0x7FFF, 0x7FFF, 0x0000 }, /* R276 - DRC 1 */
907
[277] = { 0x1FFF, 0x1FFF, 0x0000 }, /* R277 - DRC 2 */
908
[278] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R278 - DRC 3 */
909
[279] = { 0x07FF, 0x07FF, 0x0000 }, /* R279 - DRC 4 */
910
[280] = { 0x03FF, 0x03FF, 0x0000 }, /* R280 - DRC 5 */
911
[285] = { 0x0003, 0x0003, 0x0000 }, /* R285 - Tloopback */
912
[335] = { 0x0007, 0x0007, 0x0000 }, /* R335 - EQ1 */
913
[336] = { 0xFFFE, 0xFFFE, 0x0000 }, /* R336 - EQ2 */
914
[337] = { 0xFFC0, 0xFFC0, 0x0000 }, /* R337 - EQ3 */
915
[338] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R338 - EQ4 */
916
[339] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R339 - EQ5 */
917
[340] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R340 - EQ6 */
918
[341] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R341 - EQ7 */
919
[342] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R342 - EQ8 */
920
[343] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R343 - EQ9 */
921
[344] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R344 - EQ10 */
922
[345] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R345 - EQ11 */
923
[346] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R346 - EQ12 */
924
[347] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R347 - EQ13 */
925
[348] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R348 - EQ14 */
926
[349] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R349 - EQ15 */
927
[350] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R350 - EQ16 */
928
[351] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R351 - EQ17 */
929
[352] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R352 - EQ18 */
930
[353] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R353 - EQ19 */
931
[354] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R354 - EQ20 */
932
[355] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R355 - EQ21 */
933
[356] = { 0xFFFE, 0xFFFE, 0x0000 }, /* R356 - EQ22 */
934
[357] = { 0xFFC0, 0xFFC0, 0x0000 }, /* R357 - EQ23 */
935
[358] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R358 - EQ24 */
936
[359] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R359 - EQ25 */
937
[360] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R360 - EQ26 */
938
[361] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R361 - EQ27 */
939
[362] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R362 - EQ28 */
940
[363] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R363 - EQ29 */
941
[364] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R364 - EQ30 */
942
[365] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R365 - EQ31 */
943
[366] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R366 - EQ32 */
944
[367] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R367 - EQ33 */
945
[368] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R368 - EQ34 */
946
[369] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R369 - EQ35 */
947
[370] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R370 - EQ36 */
948
[371] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R371 - EQ37 */
949
[372] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R372 - EQ38 */
950
[373] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R373 - EQ39 */
951
[374] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R374 - EQ40 */
952
[375] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R375 - EQ41 */
953
[513] = { 0x045F, 0x045F, 0x0000 }, /* R513 - GPIO 2 */
954
[514] = { 0x045F, 0x045F, 0x0000 }, /* R514 - GPIO 3 */
955
[516] = { 0xE75F, 0xE75F, 0x0000 }, /* R516 - GPIO 5 */
956
[517] = { 0xE75F, 0xE75F, 0x0000 }, /* R517 - GPIO 6 */
957
[560] = { 0x0030, 0x0030, 0xFFFF }, /* R560 - Interrupt Status 1 */
958
[561] = { 0xFFED, 0xFFED, 0xFFFF }, /* R561 - Interrupt Status 2 */
959
[568] = { 0x0030, 0x0030, 0x0000 }, /* R568 - Interrupt Status 1 Mask */
960
[569] = { 0xFFED, 0xFFED, 0x0000 }, /* R569 - Interrupt Status 2 Mask */
961
[576] = { 0x0001, 0x0001, 0x0000 }, /* R576 - Interrupt Control */
962
[584] = { 0x002D, 0x002D, 0x0000 }, /* R584 - IRQ Debounce */
963
[586] = { 0xC000, 0xC000, 0x0000 }, /* R586 - MICINT Source Pol */
964
[768] = { 0x0001, 0x0001, 0x0000 }, /* R768 - DSP2 Power Management */
965
[1037] = { 0x0000, 0x003F, 0x0000 }, /* R1037 - DSP2_ExecControl */
966
[4096] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4096 - Write Sequencer 0 */
967
[4097] = { 0x00FF, 0x00FF, 0x0000 }, /* R4097 - Write Sequencer 1 */
968
[4098] = { 0x070F, 0x070F, 0x0000 }, /* R4098 - Write Sequencer 2 */
969
[4099] = { 0x010F, 0x010F, 0x0000 }, /* R4099 - Write Sequencer 3 */
970
[4100] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4100 - Write Sequencer 4 */
971
[4101] = { 0x00FF, 0x00FF, 0x0000 }, /* R4101 - Write Sequencer 5 */
972
[4102] = { 0x070F, 0x070F, 0x0000 }, /* R4102 - Write Sequencer 6 */
973
[4103] = { 0x010F, 0x010F, 0x0000 }, /* R4103 - Write Sequencer 7 */
974
[4104] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4104 - Write Sequencer 8 */
975
[4105] = { 0x00FF, 0x00FF, 0x0000 }, /* R4105 - Write Sequencer 9 */
976
[4106] = { 0x070F, 0x070F, 0x0000 }, /* R4106 - Write Sequencer 10 */
977
[4107] = { 0x010F, 0x010F, 0x0000 }, /* R4107 - Write Sequencer 11 */
978
[4108] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4108 - Write Sequencer 12 */
979
[4109] = { 0x00FF, 0x00FF, 0x0000 }, /* R4109 - Write Sequencer 13 */
980
[4110] = { 0x070F, 0x070F, 0x0000 }, /* R4110 - Write Sequencer 14 */
981
[4111] = { 0x010F, 0x010F, 0x0000 }, /* R4111 - Write Sequencer 15 */
982
[4112] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4112 - Write Sequencer 16 */
983
[4113] = { 0x00FF, 0x00FF, 0x0000 }, /* R4113 - Write Sequencer 17 */
984
[4114] = { 0x070F, 0x070F, 0x0000 }, /* R4114 - Write Sequencer 18 */
985
[4115] = { 0x010F, 0x010F, 0x0000 }, /* R4115 - Write Sequencer 19 */
986
[4116] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4116 - Write Sequencer 20 */
987
[4117] = { 0x00FF, 0x00FF, 0x0000 }, /* R4117 - Write Sequencer 21 */
988
[4118] = { 0x070F, 0x070F, 0x0000 }, /* R4118 - Write Sequencer 22 */
989
[4119] = { 0x010F, 0x010F, 0x0000 }, /* R4119 - Write Sequencer 23 */
990
[4120] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4120 - Write Sequencer 24 */
991
[4121] = { 0x00FF, 0x00FF, 0x0000 }, /* R4121 - Write Sequencer 25 */
992
[4122] = { 0x070F, 0x070F, 0x0000 }, /* R4122 - Write Sequencer 26 */
993
[4123] = { 0x010F, 0x010F, 0x0000 }, /* R4123 - Write Sequencer 27 */
994
[4124] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4124 - Write Sequencer 28 */
995
[4125] = { 0x00FF, 0x00FF, 0x0000 }, /* R4125 - Write Sequencer 29 */
996
[4126] = { 0x070F, 0x070F, 0x0000 }, /* R4126 - Write Sequencer 30 */
997
[4127] = { 0x010F, 0x010F, 0x0000 }, /* R4127 - Write Sequencer 31 */
998
[4128] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4128 - Write Sequencer 32 */
999
[4129] = { 0x00FF, 0x00FF, 0x0000 }, /* R4129 - Write Sequencer 33 */
1000
[4130] = { 0x070F, 0x070F, 0x0000 }, /* R4130 - Write Sequencer 34 */
1001
[4131] = { 0x010F, 0x010F, 0x0000 }, /* R4131 - Write Sequencer 35 */
1002
[4132] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4132 - Write Sequencer 36 */
1003
[4133] = { 0x00FF, 0x00FF, 0x0000 }, /* R4133 - Write Sequencer 37 */
1004
[4134] = { 0x070F, 0x070F, 0x0000 }, /* R4134 - Write Sequencer 38 */
1005
[4135] = { 0x010F, 0x010F, 0x0000 }, /* R4135 - Write Sequencer 39 */
1006
[4136] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4136 - Write Sequencer 40 */
1007
[4137] = { 0x00FF, 0x00FF, 0x0000 }, /* R4137 - Write Sequencer 41 */
1008
[4138] = { 0x070F, 0x070F, 0x0000 }, /* R4138 - Write Sequencer 42 */
1009
[4139] = { 0x010F, 0x010F, 0x0000 }, /* R4139 - Write Sequencer 43 */
1010
[4140] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4140 - Write Sequencer 44 */
1011
[4141] = { 0x00FF, 0x00FF, 0x0000 }, /* R4141 - Write Sequencer 45 */
1012
[4142] = { 0x070F, 0x070F, 0x0000 }, /* R4142 - Write Sequencer 46 */
1013
[4143] = { 0x010F, 0x010F, 0x0000 }, /* R4143 - Write Sequencer 47 */
1014
[4144] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4144 - Write Sequencer 48 */
1015
[4145] = { 0x00FF, 0x00FF, 0x0000 }, /* R4145 - Write Sequencer 49 */
1016
[4146] = { 0x070F, 0x070F, 0x0000 }, /* R4146 - Write Sequencer 50 */
1017
[4147] = { 0x010F, 0x010F, 0x0000 }, /* R4147 - Write Sequencer 51 */
1018
[4148] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4148 - Write Sequencer 52 */
1019
[4149] = { 0x00FF, 0x00FF, 0x0000 }, /* R4149 - Write Sequencer 53 */
1020
[4150] = { 0x070F, 0x070F, 0x0000 }, /* R4150 - Write Sequencer 54 */
1021
[4151] = { 0x010F, 0x010F, 0x0000 }, /* R4151 - Write Sequencer 55 */
1022
[4152] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4152 - Write Sequencer 56 */
1023
[4153] = { 0x00FF, 0x00FF, 0x0000 }, /* R4153 - Write Sequencer 57 */
1024
[4154] = { 0x070F, 0x070F, 0x0000 }, /* R4154 - Write Sequencer 58 */
1025
[4155] = { 0x010F, 0x010F, 0x0000 }, /* R4155 - Write Sequencer 59 */
1026
[4156] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4156 - Write Sequencer 60 */
1027
[4157] = { 0x00FF, 0x00FF, 0x0000 }, /* R4157 - Write Sequencer 61 */
1028
[4158] = { 0x070F, 0x070F, 0x0000 }, /* R4158 - Write Sequencer 62 */
1029
[4159] = { 0x010F, 0x010F, 0x0000 }, /* R4159 - Write Sequencer 63 */
1030
[4160] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4160 - Write Sequencer 64 */
1031
[4161] = { 0x00FF, 0x00FF, 0x0000 }, /* R4161 - Write Sequencer 65 */
1032
[4162] = { 0x070F, 0x070F, 0x0000 }, /* R4162 - Write Sequencer 66 */
1033
[4163] = { 0x010F, 0x010F, 0x0000 }, /* R4163 - Write Sequencer 67 */
1034
[4164] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4164 - Write Sequencer 68 */
1035
[4165] = { 0x00FF, 0x00FF, 0x0000 }, /* R4165 - Write Sequencer 69 */
1036
[4166] = { 0x070F, 0x070F, 0x0000 }, /* R4166 - Write Sequencer 70 */
1037
[4167] = { 0x010F, 0x010F, 0x0000 }, /* R4167 - Write Sequencer 71 */
1038
[4168] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4168 - Write Sequencer 72 */
1039
[4169] = { 0x00FF, 0x00FF, 0x0000 }, /* R4169 - Write Sequencer 73 */
1040
[4170] = { 0x070F, 0x070F, 0x0000 }, /* R4170 - Write Sequencer 74 */
1041
[4171] = { 0x010F, 0x010F, 0x0000 }, /* R4171 - Write Sequencer 75 */
1042
[4172] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4172 - Write Sequencer 76 */
1043
[4173] = { 0x00FF, 0x00FF, 0x0000 }, /* R4173 - Write Sequencer 77 */
1044
[4174] = { 0x070F, 0x070F, 0x0000 }, /* R4174 - Write Sequencer 78 */
1045
[4175] = { 0x010F, 0x010F, 0x0000 }, /* R4175 - Write Sequencer 79 */
1046
[4176] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4176 - Write Sequencer 80 */
1047
[4177] = { 0x00FF, 0x00FF, 0x0000 }, /* R4177 - Write Sequencer 81 */
1048
[4178] = { 0x070F, 0x070F, 0x0000 }, /* R4178 - Write Sequencer 82 */
1049
[4179] = { 0x010F, 0x010F, 0x0000 }, /* R4179 - Write Sequencer 83 */
1050
[4180] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4180 - Write Sequencer 84 */
1051
[4181] = { 0x00FF, 0x00FF, 0x0000 }, /* R4181 - Write Sequencer 85 */
1052
[4182] = { 0x070F, 0x070F, 0x0000 }, /* R4182 - Write Sequencer 86 */
1053
[4183] = { 0x010F, 0x010F, 0x0000 }, /* R4183 - Write Sequencer 87 */
1054
[4184] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4184 - Write Sequencer 88 */
1055
[4185] = { 0x00FF, 0x00FF, 0x0000 }, /* R4185 - Write Sequencer 89 */
1056
[4186] = { 0x070F, 0x070F, 0x0000 }, /* R4186 - Write Sequencer 90 */
1057
[4187] = { 0x010F, 0x010F, 0x0000 }, /* R4187 - Write Sequencer 91 */
1058
[4188] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4188 - Write Sequencer 92 */
1059
[4189] = { 0x00FF, 0x00FF, 0x0000 }, /* R4189 - Write Sequencer 93 */
1060
[4190] = { 0x070F, 0x070F, 0x0000 }, /* R4190 - Write Sequencer 94 */
1061
[4191] = { 0x010F, 0x010F, 0x0000 }, /* R4191 - Write Sequencer 95 */
1062
[4192] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4192 - Write Sequencer 96 */
1063
[4193] = { 0x00FF, 0x00FF, 0x0000 }, /* R4193 - Write Sequencer 97 */
1064
[4194] = { 0x070F, 0x070F, 0x0000 }, /* R4194 - Write Sequencer 98 */
1065
[4195] = { 0x010F, 0x010F, 0x0000 }, /* R4195 - Write Sequencer 99 */
1066
[4196] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4196 - Write Sequencer 100 */
1067
[4197] = { 0x00FF, 0x00FF, 0x0000 }, /* R4197 - Write Sequencer 101 */
1068
[4198] = { 0x070F, 0x070F, 0x0000 }, /* R4198 - Write Sequencer 102 */
1069
[4199] = { 0x010F, 0x010F, 0x0000 }, /* R4199 - Write Sequencer 103 */
1070
[4200] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4200 - Write Sequencer 104 */
1071
[4201] = { 0x00FF, 0x00FF, 0x0000 }, /* R4201 - Write Sequencer 105 */
1072
[4202] = { 0x070F, 0x070F, 0x0000 }, /* R4202 - Write Sequencer 106 */
1073
[4203] = { 0x010F, 0x010F, 0x0000 }, /* R4203 - Write Sequencer 107 */
1074
[4204] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4204 - Write Sequencer 108 */
1075
[4205] = { 0x00FF, 0x00FF, 0x0000 }, /* R4205 - Write Sequencer 109 */
1076
[4206] = { 0x070F, 0x070F, 0x0000 }, /* R4206 - Write Sequencer 110 */
1077
[4207] = { 0x010F, 0x010F, 0x0000 }, /* R4207 - Write Sequencer 111 */
1078
[4208] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4208 - Write Sequencer 112 */
1079
[4209] = { 0x00FF, 0x00FF, 0x0000 }, /* R4209 - Write Sequencer 113 */
1080
[4210] = { 0x070F, 0x070F, 0x0000 }, /* R4210 - Write Sequencer 114 */
1081
[4211] = { 0x010F, 0x010F, 0x0000 }, /* R4211 - Write Sequencer 115 */
1082
[4212] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4212 - Write Sequencer 116 */
1083
[4213] = { 0x00FF, 0x00FF, 0x0000 }, /* R4213 - Write Sequencer 117 */
1084
[4214] = { 0x070F, 0x070F, 0x0000 }, /* R4214 - Write Sequencer 118 */
1085
[4215] = { 0x010F, 0x010F, 0x0000 }, /* R4215 - Write Sequencer 119 */
1086
[4216] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4216 - Write Sequencer 120 */
1087
[4217] = { 0x00FF, 0x00FF, 0x0000 }, /* R4217 - Write Sequencer 121 */
1088
[4218] = { 0x070F, 0x070F, 0x0000 }, /* R4218 - Write Sequencer 122 */
1089
[4219] = { 0x010F, 0x010F, 0x0000 }, /* R4219 - Write Sequencer 123 */
1090
[4220] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4220 - Write Sequencer 124 */
1091
[4221] = { 0x00FF, 0x00FF, 0x0000 }, /* R4221 - Write Sequencer 125 */
1092
[4222] = { 0x070F, 0x070F, 0x0000 }, /* R4222 - Write Sequencer 126 */
1093
[4223] = { 0x010F, 0x010F, 0x0000 }, /* R4223 - Write Sequencer 127 */
1094
[4224] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4224 - Write Sequencer 128 */
1095
[4225] = { 0x00FF, 0x00FF, 0x0000 }, /* R4225 - Write Sequencer 129 */
1096
[4226] = { 0x070F, 0x070F, 0x0000 }, /* R4226 - Write Sequencer 130 */
1097
[4227] = { 0x010F, 0x010F, 0x0000 }, /* R4227 - Write Sequencer 131 */
1098
[4228] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4228 - Write Sequencer 132 */
1099
[4229] = { 0x00FF, 0x00FF, 0x0000 }, /* R4229 - Write Sequencer 133 */
1100
[4230] = { 0x070F, 0x070F, 0x0000 }, /* R4230 - Write Sequencer 134 */
1101
[4231] = { 0x010F, 0x010F, 0x0000 }, /* R4231 - Write Sequencer 135 */
1102
[4232] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4232 - Write Sequencer 136 */
1103
[4233] = { 0x00FF, 0x00FF, 0x0000 }, /* R4233 - Write Sequencer 137 */
1104
[4234] = { 0x070F, 0x070F, 0x0000 }, /* R4234 - Write Sequencer 138 */
1105
[4235] = { 0x010F, 0x010F, 0x0000 }, /* R4235 - Write Sequencer 139 */
1106
[4236] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4236 - Write Sequencer 140 */
1107
[4237] = { 0x00FF, 0x00FF, 0x0000 }, /* R4237 - Write Sequencer 141 */
1108
[4238] = { 0x070F, 0x070F, 0x0000 }, /* R4238 - Write Sequencer 142 */
1109
[4239] = { 0x010F, 0x010F, 0x0000 }, /* R4239 - Write Sequencer 143 */
1110
[4240] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4240 - Write Sequencer 144 */
1111
[4241] = { 0x00FF, 0x00FF, 0x0000 }, /* R4241 - Write Sequencer 145 */
1112
[4242] = { 0x070F, 0x070F, 0x0000 }, /* R4242 - Write Sequencer 146 */
1113
[4243] = { 0x010F, 0x010F, 0x0000 }, /* R4243 - Write Sequencer 147 */
1114
[4244] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4244 - Write Sequencer 148 */
1115
[4245] = { 0x00FF, 0x00FF, 0x0000 }, /* R4245 - Write Sequencer 149 */
1116
[4246] = { 0x070F, 0x070F, 0x0000 }, /* R4246 - Write Sequencer 150 */
1117
[4247] = { 0x010F, 0x010F, 0x0000 }, /* R4247 - Write Sequencer 151 */
1118
[4248] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4248 - Write Sequencer 152 */
1119
[4249] = { 0x00FF, 0x00FF, 0x0000 }, /* R4249 - Write Sequencer 153 */
1120
[4250] = { 0x070F, 0x070F, 0x0000 }, /* R4250 - Write Sequencer 154 */
1121
[4251] = { 0x010F, 0x010F, 0x0000 }, /* R4251 - Write Sequencer 155 */
1122
[4252] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4252 - Write Sequencer 156 */
1123
[4253] = { 0x00FF, 0x00FF, 0x0000 }, /* R4253 - Write Sequencer 157 */
1124
[4254] = { 0x070F, 0x070F, 0x0000 }, /* R4254 - Write Sequencer 158 */
1125
[4255] = { 0x010F, 0x010F, 0x0000 }, /* R4255 - Write Sequencer 159 */
1126
[4256] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4256 - Write Sequencer 160 */
1127
[4257] = { 0x00FF, 0x00FF, 0x0000 }, /* R4257 - Write Sequencer 161 */
1128
[4258] = { 0x070F, 0x070F, 0x0000 }, /* R4258 - Write Sequencer 162 */
1129
[4259] = { 0x010F, 0x010F, 0x0000 }, /* R4259 - Write Sequencer 163 */
1130
[4260] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4260 - Write Sequencer 164 */
1131
[4261] = { 0x00FF, 0x00FF, 0x0000 }, /* R4261 - Write Sequencer 165 */
1132
[4262] = { 0x070F, 0x070F, 0x0000 }, /* R4262 - Write Sequencer 166 */
1133
[4263] = { 0x010F, 0x010F, 0x0000 }, /* R4263 - Write Sequencer 167 */
1134
[4264] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4264 - Write Sequencer 168 */
1135
[4265] = { 0x00FF, 0x00FF, 0x0000 }, /* R4265 - Write Sequencer 169 */
1136
[4266] = { 0x070F, 0x070F, 0x0000 }, /* R4266 - Write Sequencer 170 */
1137
[4267] = { 0x010F, 0x010F, 0x0000 }, /* R4267 - Write Sequencer 171 */
1138
[4268] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4268 - Write Sequencer 172 */
1139
[4269] = { 0x00FF, 0x00FF, 0x0000 }, /* R4269 - Write Sequencer 173 */
1140
[4270] = { 0x070F, 0x070F, 0x0000 }, /* R4270 - Write Sequencer 174 */
1141
[4271] = { 0x010F, 0x010F, 0x0000 }, /* R4271 - Write Sequencer 175 */
1142
[4272] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4272 - Write Sequencer 176 */
1143
[4273] = { 0x00FF, 0x00FF, 0x0000 }, /* R4273 - Write Sequencer 177 */
1144
[4274] = { 0x070F, 0x070F, 0x0000 }, /* R4274 - Write Sequencer 178 */
1145
[4275] = { 0x010F, 0x010F, 0x0000 }, /* R4275 - Write Sequencer 179 */
1146
[4276] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4276 - Write Sequencer 180 */
1147
[4277] = { 0x00FF, 0x00FF, 0x0000 }, /* R4277 - Write Sequencer 181 */
1148
[4278] = { 0x070F, 0x070F, 0x0000 }, /* R4278 - Write Sequencer 182 */
1149
[4279] = { 0x010F, 0x010F, 0x0000 }, /* R4279 - Write Sequencer 183 */
1150
[4280] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4280 - Write Sequencer 184 */
1151
[4281] = { 0x00FF, 0x00FF, 0x0000 }, /* R4281 - Write Sequencer 185 */
1152
[4282] = { 0x070F, 0x070F, 0x0000 }, /* R4282 - Write Sequencer 186 */
1153
[4283] = { 0x010F, 0x010F, 0x0000 }, /* R4283 - Write Sequencer 187 */
1154
[4284] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4284 - Write Sequencer 188 */
1155
[4285] = { 0x00FF, 0x00FF, 0x0000 }, /* R4285 - Write Sequencer 189 */
1156
[4286] = { 0x070F, 0x070F, 0x0000 }, /* R4286 - Write Sequencer 190 */
1157
[4287] = { 0x010F, 0x010F, 0x0000 }, /* R4287 - Write Sequencer 191 */
1158
[4288] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4288 - Write Sequencer 192 */
1159
[4289] = { 0x00FF, 0x00FF, 0x0000 }, /* R4289 - Write Sequencer 193 */
1160
[4290] = { 0x070F, 0x070F, 0x0000 }, /* R4290 - Write Sequencer 194 */
1161
[4291] = { 0x010F, 0x010F, 0x0000 }, /* R4291 - Write Sequencer 195 */
1162
[4292] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4292 - Write Sequencer 196 */
1163
[4293] = { 0x00FF, 0x00FF, 0x0000 }, /* R4293 - Write Sequencer 197 */
1164
[4294] = { 0x070F, 0x070F, 0x0000 }, /* R4294 - Write Sequencer 198 */
1165
[4295] = { 0x010F, 0x010F, 0x0000 }, /* R4295 - Write Sequencer 199 */
1166
[4296] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4296 - Write Sequencer 200 */
1167
[4297] = { 0x00FF, 0x00FF, 0x0000 }, /* R4297 - Write Sequencer 201 */
1168
[4298] = { 0x070F, 0x070F, 0x0000 }, /* R4298 - Write Sequencer 202 */
1169
[4299] = { 0x010F, 0x010F, 0x0000 }, /* R4299 - Write Sequencer 203 */
1170
[4300] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4300 - Write Sequencer 204 */
1171
[4301] = { 0x00FF, 0x00FF, 0x0000 }, /* R4301 - Write Sequencer 205 */
1172
[4302] = { 0x070F, 0x070F, 0x0000 }, /* R4302 - Write Sequencer 206 */
1173
[4303] = { 0x010F, 0x010F, 0x0000 }, /* R4303 - Write Sequencer 207 */
1174
[4304] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4304 - Write Sequencer 208 */
1175
[4305] = { 0x00FF, 0x00FF, 0x0000 }, /* R4305 - Write Sequencer 209 */
1176
[4306] = { 0x070F, 0x070F, 0x0000 }, /* R4306 - Write Sequencer 210 */
1177
[4307] = { 0x010F, 0x010F, 0x0000 }, /* R4307 - Write Sequencer 211 */
1178
[4308] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4308 - Write Sequencer 212 */
1179
[4309] = { 0x00FF, 0x00FF, 0x0000 }, /* R4309 - Write Sequencer 213 */
1180
[4310] = { 0x070F, 0x070F, 0x0000 }, /* R4310 - Write Sequencer 214 */
1181
[4311] = { 0x010F, 0x010F, 0x0000 }, /* R4311 - Write Sequencer 215 */
1182
[4312] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4312 - Write Sequencer 216 */
1183
[4313] = { 0x00FF, 0x00FF, 0x0000 }, /* R4313 - Write Sequencer 217 */
1184
[4314] = { 0x070F, 0x070F, 0x0000 }, /* R4314 - Write Sequencer 218 */
1185
[4315] = { 0x010F, 0x010F, 0x0000 }, /* R4315 - Write Sequencer 219 */
1186
[4316] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4316 - Write Sequencer 220 */
1187
[4317] = { 0x00FF, 0x00FF, 0x0000 }, /* R4317 - Write Sequencer 221 */
1188
[4318] = { 0x070F, 0x070F, 0x0000 }, /* R4318 - Write Sequencer 222 */
1189
[4319] = { 0x010F, 0x010F, 0x0000 }, /* R4319 - Write Sequencer 223 */
1190
[4320] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4320 - Write Sequencer 224 */
1191
[4321] = { 0x00FF, 0x00FF, 0x0000 }, /* R4321 - Write Sequencer 225 */
1192
[4322] = { 0x070F, 0x070F, 0x0000 }, /* R4322 - Write Sequencer 226 */
1193
[4323] = { 0x010F, 0x010F, 0x0000 }, /* R4323 - Write Sequencer 227 */
1194
[4324] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4324 - Write Sequencer 228 */
1195
[4325] = { 0x00FF, 0x00FF, 0x0000 }, /* R4325 - Write Sequencer 229 */
1196
[4326] = { 0x070F, 0x070F, 0x0000 }, /* R4326 - Write Sequencer 230 */
1197
[4327] = { 0x010F, 0x010F, 0x0000 }, /* R4327 - Write Sequencer 231 */
1198
[4328] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4328 - Write Sequencer 232 */
1199
[4329] = { 0x00FF, 0x00FF, 0x0000 }, /* R4329 - Write Sequencer 233 */
1200
[4330] = { 0x070F, 0x070F, 0x0000 }, /* R4330 - Write Sequencer 234 */
1201
[4331] = { 0x010F, 0x010F, 0x0000 }, /* R4331 - Write Sequencer 235 */
1202
[4332] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4332 - Write Sequencer 236 */
1203
[4333] = { 0x00FF, 0x00FF, 0x0000 }, /* R4333 - Write Sequencer 237 */
1204
[4334] = { 0x070F, 0x070F, 0x0000 }, /* R4334 - Write Sequencer 238 */
1205
[4335] = { 0x010F, 0x010F, 0x0000 }, /* R4335 - Write Sequencer 239 */
1206
[4336] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4336 - Write Sequencer 240 */
1207
[4337] = { 0x00FF, 0x00FF, 0x0000 }, /* R4337 - Write Sequencer 241 */
1208
[4338] = { 0x070F, 0x070F, 0x0000 }, /* R4338 - Write Sequencer 242 */
1209
[4339] = { 0x010F, 0x010F, 0x0000 }, /* R4339 - Write Sequencer 243 */
1210
[4340] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4340 - Write Sequencer 244 */
1211
[4341] = { 0x00FF, 0x00FF, 0x0000 }, /* R4341 - Write Sequencer 245 */
1212
[4342] = { 0x070F, 0x070F, 0x0000 }, /* R4342 - Write Sequencer 246 */
1213
[4343] = { 0x010F, 0x010F, 0x0000 }, /* R4343 - Write Sequencer 247 */
1214
[4344] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4344 - Write Sequencer 248 */
1215
[4345] = { 0x00FF, 0x00FF, 0x0000 }, /* R4345 - Write Sequencer 249 */
1216
[4346] = { 0x070F, 0x070F, 0x0000 }, /* R4346 - Write Sequencer 250 */
1217
[4347] = { 0x010F, 0x010F, 0x0000 }, /* R4347 - Write Sequencer 251 */
1218
[4348] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4348 - Write Sequencer 252 */
1219
[4349] = { 0x00FF, 0x00FF, 0x0000 }, /* R4349 - Write Sequencer 253 */
1220
[4350] = { 0x070F, 0x070F, 0x0000 }, /* R4350 - Write Sequencer 254 */
1221
[4351] = { 0x010F, 0x010F, 0x0000 }, /* R4351 - Write Sequencer 255 */
1222
[4352] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4352 - Write Sequencer 256 */
1223
[4353] = { 0x00FF, 0x00FF, 0x0000 }, /* R4353 - Write Sequencer 257 */
1224
[4354] = { 0x070F, 0x070F, 0x0000 }, /* R4354 - Write Sequencer 258 */
1225
[4355] = { 0x010F, 0x010F, 0x0000 }, /* R4355 - Write Sequencer 259 */
1226
[4356] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4356 - Write Sequencer 260 */
1227
[4357] = { 0x00FF, 0x00FF, 0x0000 }, /* R4357 - Write Sequencer 261 */
1228
[4358] = { 0x070F, 0x070F, 0x0000 }, /* R4358 - Write Sequencer 262 */
1229
[4359] = { 0x010F, 0x010F, 0x0000 }, /* R4359 - Write Sequencer 263 */
1230
[4360] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4360 - Write Sequencer 264 */
1231
[4361] = { 0x00FF, 0x00FF, 0x0000 }, /* R4361 - Write Sequencer 265 */
1232
[4362] = { 0x070F, 0x070F, 0x0000 }, /* R4362 - Write Sequencer 266 */
1233
[4363] = { 0x010F, 0x010F, 0x0000 }, /* R4363 - Write Sequencer 267 */
1234
[4364] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4364 - Write Sequencer 268 */
1235
[4365] = { 0x00FF, 0x00FF, 0x0000 }, /* R4365 - Write Sequencer 269 */
1236
[4366] = { 0x070F, 0x070F, 0x0000 }, /* R4366 - Write Sequencer 270 */
1237
[4367] = { 0x010F, 0x010F, 0x0000 }, /* R4367 - Write Sequencer 271 */
1238
[4368] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4368 - Write Sequencer 272 */
1239
[4369] = { 0x00FF, 0x00FF, 0x0000 }, /* R4369 - Write Sequencer 273 */
1240
[4370] = { 0x070F, 0x070F, 0x0000 }, /* R4370 - Write Sequencer 274 */
1241
[4371] = { 0x010F, 0x010F, 0x0000 }, /* R4371 - Write Sequencer 275 */
1242
[4372] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4372 - Write Sequencer 276 */
1243
[4373] = { 0x00FF, 0x00FF, 0x0000 }, /* R4373 - Write Sequencer 277 */
1244
[4374] = { 0x070F, 0x070F, 0x0000 }, /* R4374 - Write Sequencer 278 */
1245
[4375] = { 0x010F, 0x010F, 0x0000 }, /* R4375 - Write Sequencer 279 */
1246
[4376] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4376 - Write Sequencer 280 */
1247
[4377] = { 0x00FF, 0x00FF, 0x0000 }, /* R4377 - Write Sequencer 281 */
1248
[4378] = { 0x070F, 0x070F, 0x0000 }, /* R4378 - Write Sequencer 282 */
1249
[4379] = { 0x010F, 0x010F, 0x0000 }, /* R4379 - Write Sequencer 283 */
1250
[4380] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4380 - Write Sequencer 284 */
1251
[4381] = { 0x00FF, 0x00FF, 0x0000 }, /* R4381 - Write Sequencer 285 */
1252
[4382] = { 0x070F, 0x070F, 0x0000 }, /* R4382 - Write Sequencer 286 */
1253
[4383] = { 0x010F, 0x010F, 0x0000 }, /* R4383 - Write Sequencer 287 */
1254
[4384] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4384 - Write Sequencer 288 */
1255
[4385] = { 0x00FF, 0x00FF, 0x0000 }, /* R4385 - Write Sequencer 289 */
1256
[4386] = { 0x070F, 0x070F, 0x0000 }, /* R4386 - Write Sequencer 290 */
1257
[4387] = { 0x010F, 0x010F, 0x0000 }, /* R4387 - Write Sequencer 291 */
1258
[4388] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4388 - Write Sequencer 292 */
1259
[4389] = { 0x00FF, 0x00FF, 0x0000 }, /* R4389 - Write Sequencer 293 */
1260
[4390] = { 0x070F, 0x070F, 0x0000 }, /* R4390 - Write Sequencer 294 */
1261
[4391] = { 0x010F, 0x010F, 0x0000 }, /* R4391 - Write Sequencer 295 */
1262
[4392] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4392 - Write Sequencer 296 */
1263
[4393] = { 0x00FF, 0x00FF, 0x0000 }, /* R4393 - Write Sequencer 297 */
1264
[4394] = { 0x070F, 0x070F, 0x0000 }, /* R4394 - Write Sequencer 298 */
1265
[4395] = { 0x010F, 0x010F, 0x0000 }, /* R4395 - Write Sequencer 299 */
1266
[4396] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4396 - Write Sequencer 300 */
1267
[4397] = { 0x00FF, 0x00FF, 0x0000 }, /* R4397 - Write Sequencer 301 */
1268
[4398] = { 0x070F, 0x070F, 0x0000 }, /* R4398 - Write Sequencer 302 */
1269
[4399] = { 0x010F, 0x010F, 0x0000 }, /* R4399 - Write Sequencer 303 */
1270
[4400] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4400 - Write Sequencer 304 */
1271
[4401] = { 0x00FF, 0x00FF, 0x0000 }, /* R4401 - Write Sequencer 305 */
1272
[4402] = { 0x070F, 0x070F, 0x0000 }, /* R4402 - Write Sequencer 306 */
1273
[4403] = { 0x010F, 0x010F, 0x0000 }, /* R4403 - Write Sequencer 307 */
1274
[4404] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4404 - Write Sequencer 308 */
1275
[4405] = { 0x00FF, 0x00FF, 0x0000 }, /* R4405 - Write Sequencer 309 */
1276
[4406] = { 0x070F, 0x070F, 0x0000 }, /* R4406 - Write Sequencer 310 */
1277
[4407] = { 0x010F, 0x010F, 0x0000 }, /* R4407 - Write Sequencer 311 */
1278
[4408] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4408 - Write Sequencer 312 */
1279
[4409] = { 0x00FF, 0x00FF, 0x0000 }, /* R4409 - Write Sequencer 313 */
1280
[4410] = { 0x070F, 0x070F, 0x0000 }, /* R4410 - Write Sequencer 314 */
1281
[4411] = { 0x010F, 0x010F, 0x0000 }, /* R4411 - Write Sequencer 315 */
1282
[4412] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4412 - Write Sequencer 316 */
1283
[4413] = { 0x00FF, 0x00FF, 0x0000 }, /* R4413 - Write Sequencer 317 */
1284
[4414] = { 0x070F, 0x070F, 0x0000 }, /* R4414 - Write Sequencer 318 */
1285
[4415] = { 0x010F, 0x010F, 0x0000 }, /* R4415 - Write Sequencer 319 */
1286
[4416] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4416 - Write Sequencer 320 */
1287
[4417] = { 0x00FF, 0x00FF, 0x0000 }, /* R4417 - Write Sequencer 321 */
1288
[4418] = { 0x070F, 0x070F, 0x0000 }, /* R4418 - Write Sequencer 322 */
1289
[4419] = { 0x010F, 0x010F, 0x0000 }, /* R4419 - Write Sequencer 323 */
1290
[4420] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4420 - Write Sequencer 324 */
1291
[4421] = { 0x00FF, 0x00FF, 0x0000 }, /* R4421 - Write Sequencer 325 */
1292
[4422] = { 0x070F, 0x070F, 0x0000 }, /* R4422 - Write Sequencer 326 */
1293
[4423] = { 0x010F, 0x010F, 0x0000 }, /* R4423 - Write Sequencer 327 */
1294
[4424] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4424 - Write Sequencer 328 */
1295
[4425] = { 0x00FF, 0x00FF, 0x0000 }, /* R4425 - Write Sequencer 329 */
1296
[4426] = { 0x070F, 0x070F, 0x0000 }, /* R4426 - Write Sequencer 330 */
1297
[4427] = { 0x010F, 0x010F, 0x0000 }, /* R4427 - Write Sequencer 331 */
1298
[4428] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4428 - Write Sequencer 332 */
1299
[4429] = { 0x00FF, 0x00FF, 0x0000 }, /* R4429 - Write Sequencer 333 */
1300
[4430] = { 0x070F, 0x070F, 0x0000 }, /* R4430 - Write Sequencer 334 */
1301
[4431] = { 0x010F, 0x010F, 0x0000 }, /* R4431 - Write Sequencer 335 */
1302
[4432] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4432 - Write Sequencer 336 */
1303
[4433] = { 0x00FF, 0x00FF, 0x0000 }, /* R4433 - Write Sequencer 337 */
1304
[4434] = { 0x070F, 0x070F, 0x0000 }, /* R4434 - Write Sequencer 338 */
1305
[4435] = { 0x010F, 0x010F, 0x0000 }, /* R4435 - Write Sequencer 339 */
1306
[4436] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4436 - Write Sequencer 340 */
1307
[4437] = { 0x00FF, 0x00FF, 0x0000 }, /* R4437 - Write Sequencer 341 */
1308
[4438] = { 0x070F, 0x070F, 0x0000 }, /* R4438 - Write Sequencer 342 */
1309
[4439] = { 0x010F, 0x010F, 0x0000 }, /* R4439 - Write Sequencer 343 */
1310
[4440] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4440 - Write Sequencer 344 */
1311
[4441] = { 0x00FF, 0x00FF, 0x0000 }, /* R4441 - Write Sequencer 345 */
1312
[4442] = { 0x070F, 0x070F, 0x0000 }, /* R4442 - Write Sequencer 346 */
1313
[4443] = { 0x010F, 0x010F, 0x0000 }, /* R4443 - Write Sequencer 347 */
1314
[4444] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4444 - Write Sequencer 348 */
1315
[4445] = { 0x00FF, 0x00FF, 0x0000 }, /* R4445 - Write Sequencer 349 */
1316
[4446] = { 0x070F, 0x070F, 0x0000 }, /* R4446 - Write Sequencer 350 */
1317
[4447] = { 0x010F, 0x010F, 0x0000 }, /* R4447 - Write Sequencer 351 */
1318
[4448] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4448 - Write Sequencer 352 */
1319
[4449] = { 0x00FF, 0x00FF, 0x0000 }, /* R4449 - Write Sequencer 353 */
1320
[4450] = { 0x070F, 0x070F, 0x0000 }, /* R4450 - Write Sequencer 354 */
1321
[4451] = { 0x010F, 0x010F, 0x0000 }, /* R4451 - Write Sequencer 355 */
1322
[4452] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4452 - Write Sequencer 356 */
1323
[4453] = { 0x00FF, 0x00FF, 0x0000 }, /* R4453 - Write Sequencer 357 */
1324
[4454] = { 0x070F, 0x070F, 0x0000 }, /* R4454 - Write Sequencer 358 */
1325
[4455] = { 0x010F, 0x010F, 0x0000 }, /* R4455 - Write Sequencer 359 */
1326
[4456] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4456 - Write Sequencer 360 */
1327
[4457] = { 0x00FF, 0x00FF, 0x0000 }, /* R4457 - Write Sequencer 361 */
1328
[4458] = { 0x070F, 0x070F, 0x0000 }, /* R4458 - Write Sequencer 362 */
1329
[4459] = { 0x010F, 0x010F, 0x0000 }, /* R4459 - Write Sequencer 363 */
1330
[4460] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4460 - Write Sequencer 364 */
1331
[4461] = { 0x00FF, 0x00FF, 0x0000 }, /* R4461 - Write Sequencer 365 */
1332
[4462] = { 0x070F, 0x070F, 0x0000 }, /* R4462 - Write Sequencer 366 */
1333
[4463] = { 0x010F, 0x010F, 0x0000 }, /* R4463 - Write Sequencer 367 */
1334
[4464] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4464 - Write Sequencer 368 */
1335
[4465] = { 0x00FF, 0x00FF, 0x0000 }, /* R4465 - Write Sequencer 369 */
1336
[4466] = { 0x070F, 0x070F, 0x0000 }, /* R4466 - Write Sequencer 370 */
1337
[4467] = { 0x010F, 0x010F, 0x0000 }, /* R4467 - Write Sequencer 371 */
1338
[4468] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4468 - Write Sequencer 372 */
1339
[4469] = { 0x00FF, 0x00FF, 0x0000 }, /* R4469 - Write Sequencer 373 */
1340
[4470] = { 0x070F, 0x070F, 0x0000 }, /* R4470 - Write Sequencer 374 */
1341
[4471] = { 0x010F, 0x010F, 0x0000 }, /* R4471 - Write Sequencer 375 */
1342
[4472] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4472 - Write Sequencer 376 */
1343
[4473] = { 0x00FF, 0x00FF, 0x0000 }, /* R4473 - Write Sequencer 377 */
1344
[4474] = { 0x070F, 0x070F, 0x0000 }, /* R4474 - Write Sequencer 378 */
1345
[4475] = { 0x010F, 0x010F, 0x0000 }, /* R4475 - Write Sequencer 379 */
1346
[4476] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4476 - Write Sequencer 380 */
1347
[4477] = { 0x00FF, 0x00FF, 0x0000 }, /* R4477 - Write Sequencer 381 */
1348
[4478] = { 0x070F, 0x070F, 0x0000 }, /* R4478 - Write Sequencer 382 */
1349
[4479] = { 0x010F, 0x010F, 0x0000 }, /* R4479 - Write Sequencer 383 */
1350
[4480] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4480 - Write Sequencer 384 */
1351
[4481] = { 0x00FF, 0x00FF, 0x0000 }, /* R4481 - Write Sequencer 385 */
1352
[4482] = { 0x070F, 0x070F, 0x0000 }, /* R4482 - Write Sequencer 386 */
1353
[4483] = { 0x010F, 0x010F, 0x0000 }, /* R4483 - Write Sequencer 387 */
1354
[4484] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4484 - Write Sequencer 388 */
1355
[4485] = { 0x00FF, 0x00FF, 0x0000 }, /* R4485 - Write Sequencer 389 */
1356
[4486] = { 0x070F, 0x070F, 0x0000 }, /* R4486 - Write Sequencer 390 */
1357
[4487] = { 0x010F, 0x010F, 0x0000 }, /* R4487 - Write Sequencer 391 */
1358
[4488] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4488 - Write Sequencer 392 */
1359
[4489] = { 0x00FF, 0x00FF, 0x0000 }, /* R4489 - Write Sequencer 393 */
1360
[4490] = { 0x070F, 0x070F, 0x0000 }, /* R4490 - Write Sequencer 394 */
1361
[4491] = { 0x010F, 0x010F, 0x0000 }, /* R4491 - Write Sequencer 395 */
1362
[4492] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4492 - Write Sequencer 396 */
1363
[4493] = { 0x00FF, 0x00FF, 0x0000 }, /* R4493 - Write Sequencer 397 */
1364
[4494] = { 0x070F, 0x070F, 0x0000 }, /* R4494 - Write Sequencer 398 */
1365
[4495] = { 0x010F, 0x010F, 0x0000 }, /* R4495 - Write Sequencer 399 */
1366
[4496] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4496 - Write Sequencer 400 */
1367
[4497] = { 0x00FF, 0x00FF, 0x0000 }, /* R4497 - Write Sequencer 401 */
1368
[4498] = { 0x070F, 0x070F, 0x0000 }, /* R4498 - Write Sequencer 402 */
1369
[4499] = { 0x010F, 0x010F, 0x0000 }, /* R4499 - Write Sequencer 403 */
1370
[4500] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4500 - Write Sequencer 404 */
1371
[4501] = { 0x00FF, 0x00FF, 0x0000 }, /* R4501 - Write Sequencer 405 */
1372
[4502] = { 0x070F, 0x070F, 0x0000 }, /* R4502 - Write Sequencer 406 */
1373
[4503] = { 0x010F, 0x010F, 0x0000 }, /* R4503 - Write Sequencer 407 */
1374
[4504] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4504 - Write Sequencer 408 */
1375
[4505] = { 0x00FF, 0x00FF, 0x0000 }, /* R4505 - Write Sequencer 409 */
1376
[4506] = { 0x070F, 0x070F, 0x0000 }, /* R4506 - Write Sequencer 410 */
1377
[4507] = { 0x010F, 0x010F, 0x0000 }, /* R4507 - Write Sequencer 411 */
1378
[4508] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4508 - Write Sequencer 412 */
1379
[4509] = { 0x00FF, 0x00FF, 0x0000 }, /* R4509 - Write Sequencer 413 */
1380
[4510] = { 0x070F, 0x070F, 0x0000 }, /* R4510 - Write Sequencer 414 */
1381
[4511] = { 0x010F, 0x010F, 0x0000 }, /* R4511 - Write Sequencer 415 */
1382
[4512] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4512 - Write Sequencer 416 */
1383
[4513] = { 0x00FF, 0x00FF, 0x0000 }, /* R4513 - Write Sequencer 417 */
1384
[4514] = { 0x070F, 0x070F, 0x0000 }, /* R4514 - Write Sequencer 418 */
1385
[4515] = { 0x010F, 0x010F, 0x0000 }, /* R4515 - Write Sequencer 419 */
1386
[4516] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4516 - Write Sequencer 420 */
1387
[4517] = { 0x00FF, 0x00FF, 0x0000 }, /* R4517 - Write Sequencer 421 */
1388
[4518] = { 0x070F, 0x070F, 0x0000 }, /* R4518 - Write Sequencer 422 */
1389
[4519] = { 0x010F, 0x010F, 0x0000 }, /* R4519 - Write Sequencer 423 */
1390
[4520] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4520 - Write Sequencer 424 */
1391
[4521] = { 0x00FF, 0x00FF, 0x0000 }, /* R4521 - Write Sequencer 425 */
1392
[4522] = { 0x070F, 0x070F, 0x0000 }, /* R4522 - Write Sequencer 426 */
1393
[4523] = { 0x010F, 0x010F, 0x0000 }, /* R4523 - Write Sequencer 427 */
1394
[4524] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4524 - Write Sequencer 428 */
1395
[4525] = { 0x00FF, 0x00FF, 0x0000 }, /* R4525 - Write Sequencer 429 */
1396
[4526] = { 0x070F, 0x070F, 0x0000 }, /* R4526 - Write Sequencer 430 */
1397
[4527] = { 0x010F, 0x010F, 0x0000 }, /* R4527 - Write Sequencer 431 */
1398
[4528] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4528 - Write Sequencer 432 */
1399
[4529] = { 0x00FF, 0x00FF, 0x0000 }, /* R4529 - Write Sequencer 433 */
1400
[4530] = { 0x070F, 0x070F, 0x0000 }, /* R4530 - Write Sequencer 434 */
1401
[4531] = { 0x010F, 0x010F, 0x0000 }, /* R4531 - Write Sequencer 435 */
1402
[4532] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4532 - Write Sequencer 436 */
1403
[4533] = { 0x00FF, 0x00FF, 0x0000 }, /* R4533 - Write Sequencer 437 */
1404
[4534] = { 0x070F, 0x070F, 0x0000 }, /* R4534 - Write Sequencer 438 */
1405
[4535] = { 0x010F, 0x010F, 0x0000 }, /* R4535 - Write Sequencer 439 */
1406
[4536] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4536 - Write Sequencer 440 */
1407
[4537] = { 0x00FF, 0x00FF, 0x0000 }, /* R4537 - Write Sequencer 441 */
1408
[4538] = { 0x070F, 0x070F, 0x0000 }, /* R4538 - Write Sequencer 442 */
1409
[4539] = { 0x010F, 0x010F, 0x0000 }, /* R4539 - Write Sequencer 443 */
1410
[4540] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4540 - Write Sequencer 444 */
1411
[4541] = { 0x00FF, 0x00FF, 0x0000 }, /* R4541 - Write Sequencer 445 */
1412
[4542] = { 0x070F, 0x070F, 0x0000 }, /* R4542 - Write Sequencer 446 */
1413
[4543] = { 0x010F, 0x010F, 0x0000 }, /* R4543 - Write Sequencer 447 */
1414
[4544] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4544 - Write Sequencer 448 */
1415
[4545] = { 0x00FF, 0x00FF, 0x0000 }, /* R4545 - Write Sequencer 449 */
1416
[4546] = { 0x070F, 0x070F, 0x0000 }, /* R4546 - Write Sequencer 450 */
1417
[4547] = { 0x010F, 0x010F, 0x0000 }, /* R4547 - Write Sequencer 451 */
1418
[4548] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4548 - Write Sequencer 452 */
1419
[4549] = { 0x00FF, 0x00FF, 0x0000 }, /* R4549 - Write Sequencer 453 */
1420
[4550] = { 0x070F, 0x070F, 0x0000 }, /* R4550 - Write Sequencer 454 */
1421
[4551] = { 0x010F, 0x010F, 0x0000 }, /* R4551 - Write Sequencer 455 */
1422
[4552] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4552 - Write Sequencer 456 */
1423
[4553] = { 0x00FF, 0x00FF, 0x0000 }, /* R4553 - Write Sequencer 457 */
1424
[4554] = { 0x070F, 0x070F, 0x0000 }, /* R4554 - Write Sequencer 458 */
1425
[4555] = { 0x010F, 0x010F, 0x0000 }, /* R4555 - Write Sequencer 459 */
1426
[4556] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4556 - Write Sequencer 460 */
1427
[4557] = { 0x00FF, 0x00FF, 0x0000 }, /* R4557 - Write Sequencer 461 */
1428
[4558] = { 0x070F, 0x070F, 0x0000 }, /* R4558 - Write Sequencer 462 */
1429
[4559] = { 0x010F, 0x010F, 0x0000 }, /* R4559 - Write Sequencer 463 */
1430
[4560] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4560 - Write Sequencer 464 */
1431
[4561] = { 0x00FF, 0x00FF, 0x0000 }, /* R4561 - Write Sequencer 465 */
1432
[4562] = { 0x070F, 0x070F, 0x0000 }, /* R4562 - Write Sequencer 466 */
1433
[4563] = { 0x010F, 0x010F, 0x0000 }, /* R4563 - Write Sequencer 467 */
1434
[4564] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4564 - Write Sequencer 468 */
1435
[4565] = { 0x00FF, 0x00FF, 0x0000 }, /* R4565 - Write Sequencer 469 */
1436
[4566] = { 0x070F, 0x070F, 0x0000 }, /* R4566 - Write Sequencer 470 */
1437
[4567] = { 0x010F, 0x010F, 0x0000 }, /* R4567 - Write Sequencer 471 */
1438
[4568] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4568 - Write Sequencer 472 */
1439
[4569] = { 0x00FF, 0x00FF, 0x0000 }, /* R4569 - Write Sequencer 473 */
1440
[4570] = { 0x070F, 0x070F, 0x0000 }, /* R4570 - Write Sequencer 474 */
1441
[4571] = { 0x010F, 0x010F, 0x0000 }, /* R4571 - Write Sequencer 475 */
1442
[4572] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4572 - Write Sequencer 476 */
1443
[4573] = { 0x00FF, 0x00FF, 0x0000 }, /* R4573 - Write Sequencer 477 */
1444
[4574] = { 0x070F, 0x070F, 0x0000 }, /* R4574 - Write Sequencer 478 */
1445
[4575] = { 0x010F, 0x010F, 0x0000 }, /* R4575 - Write Sequencer 479 */
1446
[4576] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4576 - Write Sequencer 480 */
1447
[4577] = { 0x00FF, 0x00FF, 0x0000 }, /* R4577 - Write Sequencer 481 */
1448
[4578] = { 0x070F, 0x070F, 0x0000 }, /* R4578 - Write Sequencer 482 */
1449
[4579] = { 0x010F, 0x010F, 0x0000 }, /* R4579 - Write Sequencer 483 */
1450
[4580] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4580 - Write Sequencer 484 */
1451
[4581] = { 0x00FF, 0x00FF, 0x0000 }, /* R4581 - Write Sequencer 485 */
1452
[4582] = { 0x070F, 0x070F, 0x0000 }, /* R4582 - Write Sequencer 486 */
1453
[4583] = { 0x010F, 0x010F, 0x0000 }, /* R4583 - Write Sequencer 487 */
1454
[4584] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4584 - Write Sequencer 488 */
1455
[4585] = { 0x00FF, 0x00FF, 0x0000 }, /* R4585 - Write Sequencer 489 */
1456
[4586] = { 0x070F, 0x070F, 0x0000 }, /* R4586 - Write Sequencer 490 */
1457
[4587] = { 0x010F, 0x010F, 0x0000 }, /* R4587 - Write Sequencer 491 */
1458
[4588] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4588 - Write Sequencer 492 */
1459
[4589] = { 0x00FF, 0x00FF, 0x0000 }, /* R4589 - Write Sequencer 493 */
1460
[4590] = { 0x070F, 0x070F, 0x0000 }, /* R4590 - Write Sequencer 494 */
1461
[4591] = { 0x010F, 0x010F, 0x0000 }, /* R4591 - Write Sequencer 495 */
1462
[4592] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4592 - Write Sequencer 496 */
1463
[4593] = { 0x00FF, 0x00FF, 0x0000 }, /* R4593 - Write Sequencer 497 */
1464
[4594] = { 0x070F, 0x070F, 0x0000 }, /* R4594 - Write Sequencer 498 */
1465
[4595] = { 0x010F, 0x010F, 0x0000 }, /* R4595 - Write Sequencer 499 */
1466
[4596] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4596 - Write Sequencer 500 */
1467
[4597] = { 0x00FF, 0x00FF, 0x0000 }, /* R4597 - Write Sequencer 501 */
1468
[4598] = { 0x070F, 0x070F, 0x0000 }, /* R4598 - Write Sequencer 502 */
1469
[4599] = { 0x010F, 0x010F, 0x0000 }, /* R4599 - Write Sequencer 503 */
1470
[4600] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4600 - Write Sequencer 504 */
1471
[4601] = { 0x00FF, 0x00FF, 0x0000 }, /* R4601 - Write Sequencer 505 */
1472
[4602] = { 0x070F, 0x070F, 0x0000 }, /* R4602 - Write Sequencer 506 */
1473
[4603] = { 0x010F, 0x010F, 0x0000 }, /* R4603 - Write Sequencer 507 */
1474
[4604] = { 0x3FFF, 0x3FFF, 0x0000 }, /* R4604 - Write Sequencer 508 */
1475
[4605] = { 0x00FF, 0x00FF, 0x0000 }, /* R4605 - Write Sequencer 509 */
1476
[4606] = { 0x070F, 0x070F, 0x0000 }, /* R4606 - Write Sequencer 510 */
1477
[4607] = { 0x010F, 0x010F, 0x0000 }, /* R4607 - Write Sequencer 511 */
1478
[8192] = { 0x03FF, 0x03FF, 0x0000 }, /* R8192 - DSP2 Instruction RAM 0 */
1479
[9216] = { 0x003F, 0x003F, 0x0000 }, /* R9216 - DSP2 Address RAM 2 */
1480
[9217] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R9217 - DSP2 Address RAM 1 */
1481
[9218] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R9218 - DSP2 Address RAM 0 */
1482
[12288] = { 0x00FF, 0x00FF, 0x0000 }, /* R12288 - DSP2 Data1 RAM 1 */
1483
[12289] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R12289 - DSP2 Data1 RAM 0 */
1484
[13312] = { 0x00FF, 0x00FF, 0x0000 }, /* R13312 - DSP2 Data2 RAM 1 */
1485
[13313] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R13313 - DSP2 Data2 RAM 0 */
1486
[14336] = { 0x00FF, 0x00FF, 0x0000 }, /* R14336 - DSP2 Data3 RAM 1 */
1487
[14337] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R14337 - DSP2 Data3 RAM 0 */
1488
[15360] = { 0x07FF, 0x07FF, 0x0000 }, /* R15360 - DSP2 Coeff RAM 0 */
1489
[16384] = { 0x00FF, 0x00FF, 0x0000 }, /* R16384 - RETUNEADC_SHARED_COEFF_1 */
1490
[16385] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16385 - RETUNEADC_SHARED_COEFF_0 */
1491
[16386] = { 0x00FF, 0x00FF, 0x0000 }, /* R16386 - RETUNEDAC_SHARED_COEFF_1 */
1492
[16387] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16387 - RETUNEDAC_SHARED_COEFF_0 */
1493
[16388] = { 0x00FF, 0x00FF, 0x0000 }, /* R16388 - SOUNDSTAGE_ENABLES_1 */
1494
[16389] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16389 - SOUNDSTAGE_ENABLES_0 */
1495
[16896] = { 0x00FF, 0x00FF, 0x0000 }, /* R16896 - HDBASS_AI_1 */
1496
[16897] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16897 - HDBASS_AI_0 */
1497
[16898] = { 0x00FF, 0x00FF, 0x0000 }, /* R16898 - HDBASS_AR_1 */
1498
[16899] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16899 - HDBASS_AR_0 */
1499
[16900] = { 0x00FF, 0x00FF, 0x0000 }, /* R16900 - HDBASS_B_1 */
1500
[16901] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16901 - HDBASS_B_0 */
1501
[16902] = { 0x00FF, 0x00FF, 0x0000 }, /* R16902 - HDBASS_K_1 */
1502
[16903] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16903 - HDBASS_K_0 */
1503
[16904] = { 0x00FF, 0x00FF, 0x0000 }, /* R16904 - HDBASS_N1_1 */
1504
[16905] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16905 - HDBASS_N1_0 */
1505
[16906] = { 0x00FF, 0x00FF, 0x0000 }, /* R16906 - HDBASS_N2_1 */
1506
[16907] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16907 - HDBASS_N2_0 */
1507
[16908] = { 0x00FF, 0x00FF, 0x0000 }, /* R16908 - HDBASS_N3_1 */
1508
[16909] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16909 - HDBASS_N3_0 */
1509
[16910] = { 0x00FF, 0x00FF, 0x0000 }, /* R16910 - HDBASS_N4_1 */
1510
[16911] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16911 - HDBASS_N4_0 */
1511
[16912] = { 0x00FF, 0x00FF, 0x0000 }, /* R16912 - HDBASS_N5_1 */
1512
[16913] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16913 - HDBASS_N5_0 */
1513
[16914] = { 0x00FF, 0x00FF, 0x0000 }, /* R16914 - HDBASS_X1_1 */
1514
[16915] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16915 - HDBASS_X1_0 */
1515
[16916] = { 0x00FF, 0x00FF, 0x0000 }, /* R16916 - HDBASS_X2_1 */
1516
[16917] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16917 - HDBASS_X2_0 */
1517
[16918] = { 0x00FF, 0x00FF, 0x0000 }, /* R16918 - HDBASS_X3_1 */
1518
[16919] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16919 - HDBASS_X3_0 */
1519
[16920] = { 0x00FF, 0x00FF, 0x0000 }, /* R16920 - HDBASS_ATK_1 */
1520
[16921] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16921 - HDBASS_ATK_0 */
1521
[16922] = { 0x00FF, 0x00FF, 0x0000 }, /* R16922 - HDBASS_DCY_1 */
1522
[16923] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16923 - HDBASS_DCY_0 */
1523
[16924] = { 0x00FF, 0x00FF, 0x0000 }, /* R16924 - HDBASS_PG_1 */
1524
[16925] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R16925 - HDBASS_PG_0 */
1525
[17408] = { 0x00FF, 0x00FF, 0x0000 }, /* R17408 - HPF_C_1 */
1526
[17409] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17409 - HPF_C_0 */
1527
[17920] = { 0x00FF, 0x00FF, 0x0000 }, /* R17920 - ADCL_RETUNE_C1_1 */
1528
[17921] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17921 - ADCL_RETUNE_C1_0 */
1529
[17922] = { 0x00FF, 0x00FF, 0x0000 }, /* R17922 - ADCL_RETUNE_C2_1 */
1530
[17923] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17923 - ADCL_RETUNE_C2_0 */
1531
[17924] = { 0x00FF, 0x00FF, 0x0000 }, /* R17924 - ADCL_RETUNE_C3_1 */
1532
[17925] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17925 - ADCL_RETUNE_C3_0 */
1533
[17926] = { 0x00FF, 0x00FF, 0x0000 }, /* R17926 - ADCL_RETUNE_C4_1 */
1534
[17927] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17927 - ADCL_RETUNE_C4_0 */
1535
[17928] = { 0x00FF, 0x00FF, 0x0000 }, /* R17928 - ADCL_RETUNE_C5_1 */
1536
[17929] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17929 - ADCL_RETUNE_C5_0 */
1537
[17930] = { 0x00FF, 0x00FF, 0x0000 }, /* R17930 - ADCL_RETUNE_C6_1 */
1538
[17931] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17931 - ADCL_RETUNE_C6_0 */
1539
[17932] = { 0x00FF, 0x00FF, 0x0000 }, /* R17932 - ADCL_RETUNE_C7_1 */
1540
[17933] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17933 - ADCL_RETUNE_C7_0 */
1541
[17934] = { 0x00FF, 0x00FF, 0x0000 }, /* R17934 - ADCL_RETUNE_C8_1 */
1542
[17935] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17935 - ADCL_RETUNE_C8_0 */
1543
[17936] = { 0x00FF, 0x00FF, 0x0000 }, /* R17936 - ADCL_RETUNE_C9_1 */
1544
[17937] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17937 - ADCL_RETUNE_C9_0 */
1545
[17938] = { 0x00FF, 0x00FF, 0x0000 }, /* R17938 - ADCL_RETUNE_C10_1 */
1546
[17939] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17939 - ADCL_RETUNE_C10_0 */
1547
[17940] = { 0x00FF, 0x00FF, 0x0000 }, /* R17940 - ADCL_RETUNE_C11_1 */
1548
[17941] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17941 - ADCL_RETUNE_C11_0 */
1549
[17942] = { 0x00FF, 0x00FF, 0x0000 }, /* R17942 - ADCL_RETUNE_C12_1 */
1550
[17943] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17943 - ADCL_RETUNE_C12_0 */
1551
[17944] = { 0x00FF, 0x00FF, 0x0000 }, /* R17944 - ADCL_RETUNE_C13_1 */
1552
[17945] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17945 - ADCL_RETUNE_C13_0 */
1553
[17946] = { 0x00FF, 0x00FF, 0x0000 }, /* R17946 - ADCL_RETUNE_C14_1 */
1554
[17947] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17947 - ADCL_RETUNE_C14_0 */
1555
[17948] = { 0x00FF, 0x00FF, 0x0000 }, /* R17948 - ADCL_RETUNE_C15_1 */
1556
[17949] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17949 - ADCL_RETUNE_C15_0 */
1557
[17950] = { 0x00FF, 0x00FF, 0x0000 }, /* R17950 - ADCL_RETUNE_C16_1 */
1558
[17951] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17951 - ADCL_RETUNE_C16_0 */
1559
[17952] = { 0x00FF, 0x00FF, 0x0000 }, /* R17952 - ADCL_RETUNE_C17_1 */
1560
[17953] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17953 - ADCL_RETUNE_C17_0 */
1561
[17954] = { 0x00FF, 0x00FF, 0x0000 }, /* R17954 - ADCL_RETUNE_C18_1 */
1562
[17955] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17955 - ADCL_RETUNE_C18_0 */
1563
[17956] = { 0x00FF, 0x00FF, 0x0000 }, /* R17956 - ADCL_RETUNE_C19_1 */
1564
[17957] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17957 - ADCL_RETUNE_C19_0 */
1565
[17958] = { 0x00FF, 0x00FF, 0x0000 }, /* R17958 - ADCL_RETUNE_C20_1 */
1566
[17959] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17959 - ADCL_RETUNE_C20_0 */
1567
[17960] = { 0x00FF, 0x00FF, 0x0000 }, /* R17960 - ADCL_RETUNE_C21_1 */
1568
[17961] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17961 - ADCL_RETUNE_C21_0 */
1569
[17962] = { 0x00FF, 0x00FF, 0x0000 }, /* R17962 - ADCL_RETUNE_C22_1 */
1570
[17963] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17963 - ADCL_RETUNE_C22_0 */
1571
[17964] = { 0x00FF, 0x00FF, 0x0000 }, /* R17964 - ADCL_RETUNE_C23_1 */
1572
[17965] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17965 - ADCL_RETUNE_C23_0 */
1573
[17966] = { 0x00FF, 0x00FF, 0x0000 }, /* R17966 - ADCL_RETUNE_C24_1 */
1574
[17967] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17967 - ADCL_RETUNE_C24_0 */
1575
[17968] = { 0x00FF, 0x00FF, 0x0000 }, /* R17968 - ADCL_RETUNE_C25_1 */
1576
[17969] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17969 - ADCL_RETUNE_C25_0 */
1577
[17970] = { 0x00FF, 0x00FF, 0x0000 }, /* R17970 - ADCL_RETUNE_C26_1 */
1578
[17971] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17971 - ADCL_RETUNE_C26_0 */
1579
[17972] = { 0x00FF, 0x00FF, 0x0000 }, /* R17972 - ADCL_RETUNE_C27_1 */
1580
[17973] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17973 - ADCL_RETUNE_C27_0 */
1581
[17974] = { 0x00FF, 0x00FF, 0x0000 }, /* R17974 - ADCL_RETUNE_C28_1 */
1582
[17975] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17975 - ADCL_RETUNE_C28_0 */
1583
[17976] = { 0x00FF, 0x00FF, 0x0000 }, /* R17976 - ADCL_RETUNE_C29_1 */
1584
[17977] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17977 - ADCL_RETUNE_C29_0 */
1585
[17978] = { 0x00FF, 0x00FF, 0x0000 }, /* R17978 - ADCL_RETUNE_C30_1 */
1586
[17979] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17979 - ADCL_RETUNE_C30_0 */
1587
[17980] = { 0x00FF, 0x00FF, 0x0000 }, /* R17980 - ADCL_RETUNE_C31_1 */
1588
[17981] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17981 - ADCL_RETUNE_C31_0 */
1589
[17982] = { 0x00FF, 0x00FF, 0x0000 }, /* R17982 - ADCL_RETUNE_C32_1 */
1590
[17983] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R17983 - ADCL_RETUNE_C32_0 */
1591
[18432] = { 0x00FF, 0x00FF, 0x0000 }, /* R18432 - RETUNEADC_PG2_1 */
1592
[18433] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18433 - RETUNEADC_PG2_0 */
1593
[18434] = { 0x00FF, 0x00FF, 0x0000 }, /* R18434 - RETUNEADC_PG_1 */
1594
[18435] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18435 - RETUNEADC_PG_0 */
1595
[18944] = { 0x00FF, 0x00FF, 0x0000 }, /* R18944 - ADCR_RETUNE_C1_1 */
1596
[18945] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18945 - ADCR_RETUNE_C1_0 */
1597
[18946] = { 0x00FF, 0x00FF, 0x0000 }, /* R18946 - ADCR_RETUNE_C2_1 */
1598
[18947] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18947 - ADCR_RETUNE_C2_0 */
1599
[18948] = { 0x00FF, 0x00FF, 0x0000 }, /* R18948 - ADCR_RETUNE_C3_1 */
1600
[18949] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18949 - ADCR_RETUNE_C3_0 */
1601
[18950] = { 0x00FF, 0x00FF, 0x0000 }, /* R18950 - ADCR_RETUNE_C4_1 */
1602
[18951] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18951 - ADCR_RETUNE_C4_0 */
1603
[18952] = { 0x00FF, 0x00FF, 0x0000 }, /* R18952 - ADCR_RETUNE_C5_1 */
1604
[18953] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18953 - ADCR_RETUNE_C5_0 */
1605
[18954] = { 0x00FF, 0x00FF, 0x0000 }, /* R18954 - ADCR_RETUNE_C6_1 */
1606
[18955] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18955 - ADCR_RETUNE_C6_0 */
1607
[18956] = { 0x00FF, 0x00FF, 0x0000 }, /* R18956 - ADCR_RETUNE_C7_1 */
1608
[18957] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18957 - ADCR_RETUNE_C7_0 */
1609
[18958] = { 0x00FF, 0x00FF, 0x0000 }, /* R18958 - ADCR_RETUNE_C8_1 */
1610
[18959] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18959 - ADCR_RETUNE_C8_0 */
1611
[18960] = { 0x00FF, 0x00FF, 0x0000 }, /* R18960 - ADCR_RETUNE_C9_1 */
1612
[18961] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18961 - ADCR_RETUNE_C9_0 */
1613
[18962] = { 0x00FF, 0x00FF, 0x0000 }, /* R18962 - ADCR_RETUNE_C10_1 */
1614
[18963] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18963 - ADCR_RETUNE_C10_0 */
1615
[18964] = { 0x00FF, 0x00FF, 0x0000 }, /* R18964 - ADCR_RETUNE_C11_1 */
1616
[18965] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18965 - ADCR_RETUNE_C11_0 */
1617
[18966] = { 0x00FF, 0x00FF, 0x0000 }, /* R18966 - ADCR_RETUNE_C12_1 */
1618
[18967] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18967 - ADCR_RETUNE_C12_0 */
1619
[18968] = { 0x00FF, 0x00FF, 0x0000 }, /* R18968 - ADCR_RETUNE_C13_1 */
1620
[18969] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18969 - ADCR_RETUNE_C13_0 */
1621
[18970] = { 0x00FF, 0x00FF, 0x0000 }, /* R18970 - ADCR_RETUNE_C14_1 */
1622
[18971] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18971 - ADCR_RETUNE_C14_0 */
1623
[18972] = { 0x00FF, 0x00FF, 0x0000 }, /* R18972 - ADCR_RETUNE_C15_1 */
1624
[18973] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18973 - ADCR_RETUNE_C15_0 */
1625
[18974] = { 0x00FF, 0x00FF, 0x0000 }, /* R18974 - ADCR_RETUNE_C16_1 */
1626
[18975] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18975 - ADCR_RETUNE_C16_0 */
1627
[18976] = { 0x00FF, 0x00FF, 0x0000 }, /* R18976 - ADCR_RETUNE_C17_1 */
1628
[18977] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18977 - ADCR_RETUNE_C17_0 */
1629
[18978] = { 0x00FF, 0x00FF, 0x0000 }, /* R18978 - ADCR_RETUNE_C18_1 */
1630
[18979] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18979 - ADCR_RETUNE_C18_0 */
1631
[18980] = { 0x00FF, 0x00FF, 0x0000 }, /* R18980 - ADCR_RETUNE_C19_1 */
1632
[18981] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18981 - ADCR_RETUNE_C19_0 */
1633
[18982] = { 0x00FF, 0x00FF, 0x0000 }, /* R18982 - ADCR_RETUNE_C20_1 */
1634
[18983] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18983 - ADCR_RETUNE_C20_0 */
1635
[18984] = { 0x00FF, 0x00FF, 0x0000 }, /* R18984 - ADCR_RETUNE_C21_1 */
1636
[18985] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18985 - ADCR_RETUNE_C21_0 */
1637
[18986] = { 0x00FF, 0x00FF, 0x0000 }, /* R18986 - ADCR_RETUNE_C22_1 */
1638
[18987] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18987 - ADCR_RETUNE_C22_0 */
1639
[18988] = { 0x00FF, 0x00FF, 0x0000 }, /* R18988 - ADCR_RETUNE_C23_1 */
1640
[18989] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18989 - ADCR_RETUNE_C23_0 */
1641
[18990] = { 0x00FF, 0x00FF, 0x0000 }, /* R18990 - ADCR_RETUNE_C24_1 */
1642
[18991] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18991 - ADCR_RETUNE_C24_0 */
1643
[18992] = { 0x00FF, 0x00FF, 0x0000 }, /* R18992 - ADCR_RETUNE_C25_1 */
1644
[18993] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18993 - ADCR_RETUNE_C25_0 */
1645
[18994] = { 0x00FF, 0x00FF, 0x0000 }, /* R18994 - ADCR_RETUNE_C26_1 */
1646
[18995] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18995 - ADCR_RETUNE_C26_0 */
1647
[18996] = { 0x00FF, 0x00FF, 0x0000 }, /* R18996 - ADCR_RETUNE_C27_1 */
1648
[18997] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18997 - ADCR_RETUNE_C27_0 */
1649
[18998] = { 0x00FF, 0x00FF, 0x0000 }, /* R18998 - ADCR_RETUNE_C28_1 */
1650
[18999] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R18999 - ADCR_RETUNE_C28_0 */
1651
[19000] = { 0x00FF, 0x00FF, 0x0000 }, /* R19000 - ADCR_RETUNE_C29_1 */
1652
[19001] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19001 - ADCR_RETUNE_C29_0 */
1653
[19002] = { 0x00FF, 0x00FF, 0x0000 }, /* R19002 - ADCR_RETUNE_C30_1 */
1654
[19003] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19003 - ADCR_RETUNE_C30_0 */
1655
[19004] = { 0x00FF, 0x00FF, 0x0000 }, /* R19004 - ADCR_RETUNE_C31_1 */
1656
[19005] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19005 - ADCR_RETUNE_C31_0 */
1657
[19006] = { 0x00FF, 0x00FF, 0x0000 }, /* R19006 - ADCR_RETUNE_C32_1 */
1658
[19007] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19007 - ADCR_RETUNE_C32_0 */
1659
[19456] = { 0x00FF, 0x00FF, 0x0000 }, /* R19456 - DACL_RETUNE_C1_1 */
1660
[19457] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19457 - DACL_RETUNE_C1_0 */
1661
[19458] = { 0x00FF, 0x00FF, 0x0000 }, /* R19458 - DACL_RETUNE_C2_1 */
1662
[19459] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19459 - DACL_RETUNE_C2_0 */
1663
[19460] = { 0x00FF, 0x00FF, 0x0000 }, /* R19460 - DACL_RETUNE_C3_1 */
1664
[19461] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19461 - DACL_RETUNE_C3_0 */
1665
[19462] = { 0x00FF, 0x00FF, 0x0000 }, /* R19462 - DACL_RETUNE_C4_1 */
1666
[19463] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19463 - DACL_RETUNE_C4_0 */
1667
[19464] = { 0x00FF, 0x00FF, 0x0000 }, /* R19464 - DACL_RETUNE_C5_1 */
1668
[19465] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19465 - DACL_RETUNE_C5_0 */
1669
[19466] = { 0x00FF, 0x00FF, 0x0000 }, /* R19466 - DACL_RETUNE_C6_1 */
1670
[19467] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19467 - DACL_RETUNE_C6_0 */
1671
[19468] = { 0x00FF, 0x00FF, 0x0000 }, /* R19468 - DACL_RETUNE_C7_1 */
1672
[19469] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19469 - DACL_RETUNE_C7_0 */
1673
[19470] = { 0x00FF, 0x00FF, 0x0000 }, /* R19470 - DACL_RETUNE_C8_1 */
1674
[19471] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19471 - DACL_RETUNE_C8_0 */
1675
[19472] = { 0x00FF, 0x00FF, 0x0000 }, /* R19472 - DACL_RETUNE_C9_1 */
1676
[19473] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19473 - DACL_RETUNE_C9_0 */
1677
[19474] = { 0x00FF, 0x00FF, 0x0000 }, /* R19474 - DACL_RETUNE_C10_1 */
1678
[19475] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19475 - DACL_RETUNE_C10_0 */
1679
[19476] = { 0x00FF, 0x00FF, 0x0000 }, /* R19476 - DACL_RETUNE_C11_1 */
1680
[19477] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19477 - DACL_RETUNE_C11_0 */
1681
[19478] = { 0x00FF, 0x00FF, 0x0000 }, /* R19478 - DACL_RETUNE_C12_1 */
1682
[19479] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19479 - DACL_RETUNE_C12_0 */
1683
[19480] = { 0x00FF, 0x00FF, 0x0000 }, /* R19480 - DACL_RETUNE_C13_1 */
1684
[19481] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19481 - DACL_RETUNE_C13_0 */
1685
[19482] = { 0x00FF, 0x00FF, 0x0000 }, /* R19482 - DACL_RETUNE_C14_1 */
1686
[19483] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19483 - DACL_RETUNE_C14_0 */
1687
[19484] = { 0x00FF, 0x00FF, 0x0000 }, /* R19484 - DACL_RETUNE_C15_1 */
1688
[19485] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19485 - DACL_RETUNE_C15_0 */
1689
[19486] = { 0x00FF, 0x00FF, 0x0000 }, /* R19486 - DACL_RETUNE_C16_1 */
1690
[19487] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19487 - DACL_RETUNE_C16_0 */
1691
[19488] = { 0x00FF, 0x00FF, 0x0000 }, /* R19488 - DACL_RETUNE_C17_1 */
1692
[19489] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19489 - DACL_RETUNE_C17_0 */
1693
[19490] = { 0x00FF, 0x00FF, 0x0000 }, /* R19490 - DACL_RETUNE_C18_1 */
1694
[19491] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19491 - DACL_RETUNE_C18_0 */
1695
[19492] = { 0x00FF, 0x00FF, 0x0000 }, /* R19492 - DACL_RETUNE_C19_1 */
1696
[19493] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19493 - DACL_RETUNE_C19_0 */
1697
[19494] = { 0x00FF, 0x00FF, 0x0000 }, /* R19494 - DACL_RETUNE_C20_1 */
1698
[19495] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19495 - DACL_RETUNE_C20_0 */
1699
[19496] = { 0x00FF, 0x00FF, 0x0000 }, /* R19496 - DACL_RETUNE_C21_1 */
1700
[19497] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19497 - DACL_RETUNE_C21_0 */
1701
[19498] = { 0x00FF, 0x00FF, 0x0000 }, /* R19498 - DACL_RETUNE_C22_1 */
1702
[19499] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19499 - DACL_RETUNE_C22_0 */
1703
[19500] = { 0x00FF, 0x00FF, 0x0000 }, /* R19500 - DACL_RETUNE_C23_1 */
1704
[19501] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19501 - DACL_RETUNE_C23_0 */
1705
[19502] = { 0x00FF, 0x00FF, 0x0000 }, /* R19502 - DACL_RETUNE_C24_1 */
1706
[19503] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19503 - DACL_RETUNE_C24_0 */
1707
[19504] = { 0x00FF, 0x00FF, 0x0000 }, /* R19504 - DACL_RETUNE_C25_1 */
1708
[19505] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19505 - DACL_RETUNE_C25_0 */
1709
[19506] = { 0x00FF, 0x00FF, 0x0000 }, /* R19506 - DACL_RETUNE_C26_1 */
1710
[19507] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19507 - DACL_RETUNE_C26_0 */
1711
[19508] = { 0x00FF, 0x00FF, 0x0000 }, /* R19508 - DACL_RETUNE_C27_1 */
1712
[19509] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19509 - DACL_RETUNE_C27_0 */
1713
[19510] = { 0x00FF, 0x00FF, 0x0000 }, /* R19510 - DACL_RETUNE_C28_1 */
1714
[19511] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19511 - DACL_RETUNE_C28_0 */
1715
[19512] = { 0x00FF, 0x00FF, 0x0000 }, /* R19512 - DACL_RETUNE_C29_1 */
1716
[19513] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19513 - DACL_RETUNE_C29_0 */
1717
[19514] = { 0x00FF, 0x00FF, 0x0000 }, /* R19514 - DACL_RETUNE_C30_1 */
1718
[19515] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19515 - DACL_RETUNE_C30_0 */
1719
[19516] = { 0x00FF, 0x00FF, 0x0000 }, /* R19516 - DACL_RETUNE_C31_1 */
1720
[19517] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19517 - DACL_RETUNE_C31_0 */
1721
[19518] = { 0x00FF, 0x00FF, 0x0000 }, /* R19518 - DACL_RETUNE_C32_1 */
1722
[19519] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19519 - DACL_RETUNE_C32_0 */
1723
[19968] = { 0x00FF, 0x00FF, 0x0000 }, /* R19968 - RETUNEDAC_PG2_1 */
1724
[19969] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19969 - RETUNEDAC_PG2_0 */
1725
[19970] = { 0x00FF, 0x00FF, 0x0000 }, /* R19970 - RETUNEDAC_PG_1 */
1726
[19971] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R19971 - RETUNEDAC_PG_0 */
1727
[20480] = { 0x00FF, 0x00FF, 0x0000 }, /* R20480 - DACR_RETUNE_C1_1 */
1728
[20481] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20481 - DACR_RETUNE_C1_0 */
1729
[20482] = { 0x00FF, 0x00FF, 0x0000 }, /* R20482 - DACR_RETUNE_C2_1 */
1730
[20483] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20483 - DACR_RETUNE_C2_0 */
1731
[20484] = { 0x00FF, 0x00FF, 0x0000 }, /* R20484 - DACR_RETUNE_C3_1 */
1732
[20485] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20485 - DACR_RETUNE_C3_0 */
1733
[20486] = { 0x00FF, 0x00FF, 0x0000 }, /* R20486 - DACR_RETUNE_C4_1 */
1734
[20487] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20487 - DACR_RETUNE_C4_0 */
1735
[20488] = { 0x00FF, 0x00FF, 0x0000 }, /* R20488 - DACR_RETUNE_C5_1 */
1736
[20489] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20489 - DACR_RETUNE_C5_0 */
1737
[20490] = { 0x00FF, 0x00FF, 0x0000 }, /* R20490 - DACR_RETUNE_C6_1 */
1738
[20491] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20491 - DACR_RETUNE_C6_0 */
1739
[20492] = { 0x00FF, 0x00FF, 0x0000 }, /* R20492 - DACR_RETUNE_C7_1 */
1740
[20493] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20493 - DACR_RETUNE_C7_0 */
1741
[20494] = { 0x00FF, 0x00FF, 0x0000 }, /* R20494 - DACR_RETUNE_C8_1 */
1742
[20495] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20495 - DACR_RETUNE_C8_0 */
1743
[20496] = { 0x00FF, 0x00FF, 0x0000 }, /* R20496 - DACR_RETUNE_C9_1 */
1744
[20497] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20497 - DACR_RETUNE_C9_0 */
1745
[20498] = { 0x00FF, 0x00FF, 0x0000 }, /* R20498 - DACR_RETUNE_C10_1 */
1746
[20499] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20499 - DACR_RETUNE_C10_0 */
1747
[20500] = { 0x00FF, 0x00FF, 0x0000 }, /* R20500 - DACR_RETUNE_C11_1 */
1748
[20501] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20501 - DACR_RETUNE_C11_0 */
1749
[20502] = { 0x00FF, 0x00FF, 0x0000 }, /* R20502 - DACR_RETUNE_C12_1 */
1750
[20503] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20503 - DACR_RETUNE_C12_0 */
1751
[20504] = { 0x00FF, 0x00FF, 0x0000 }, /* R20504 - DACR_RETUNE_C13_1 */
1752
[20505] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20505 - DACR_RETUNE_C13_0 */
1753
[20506] = { 0x00FF, 0x00FF, 0x0000 }, /* R20506 - DACR_RETUNE_C14_1 */
1754
[20507] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20507 - DACR_RETUNE_C14_0 */
1755
[20508] = { 0x00FF, 0x00FF, 0x0000 }, /* R20508 - DACR_RETUNE_C15_1 */
1756
[20509] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20509 - DACR_RETUNE_C15_0 */
1757
[20510] = { 0x00FF, 0x00FF, 0x0000 }, /* R20510 - DACR_RETUNE_C16_1 */
1758
[20511] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20511 - DACR_RETUNE_C16_0 */
1759
[20512] = { 0x00FF, 0x00FF, 0x0000 }, /* R20512 - DACR_RETUNE_C17_1 */
1760
[20513] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20513 - DACR_RETUNE_C17_0 */
1761
[20514] = { 0x00FF, 0x00FF, 0x0000 }, /* R20514 - DACR_RETUNE_C18_1 */
1762
[20515] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20515 - DACR_RETUNE_C18_0 */
1763
[20516] = { 0x00FF, 0x00FF, 0x0000 }, /* R20516 - DACR_RETUNE_C19_1 */
1764
[20517] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20517 - DACR_RETUNE_C19_0 */
1765
[20518] = { 0x00FF, 0x00FF, 0x0000 }, /* R20518 - DACR_RETUNE_C20_1 */
1766
[20519] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20519 - DACR_RETUNE_C20_0 */
1767
[20520] = { 0x00FF, 0x00FF, 0x0000 }, /* R20520 - DACR_RETUNE_C21_1 */
1768
[20521] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20521 - DACR_RETUNE_C21_0 */
1769
[20522] = { 0x00FF, 0x00FF, 0x0000 }, /* R20522 - DACR_RETUNE_C22_1 */
1770
[20523] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20523 - DACR_RETUNE_C22_0 */
1771
[20524] = { 0x00FF, 0x00FF, 0x0000 }, /* R20524 - DACR_RETUNE_C23_1 */
1772
[20525] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20525 - DACR_RETUNE_C23_0 */
1773
[20526] = { 0x00FF, 0x00FF, 0x0000 }, /* R20526 - DACR_RETUNE_C24_1 */
1774
[20527] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20527 - DACR_RETUNE_C24_0 */
1775
[20528] = { 0x00FF, 0x00FF, 0x0000 }, /* R20528 - DACR_RETUNE_C25_1 */
1776
[20529] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20529 - DACR_RETUNE_C25_0 */
1777
[20530] = { 0x00FF, 0x00FF, 0x0000 }, /* R20530 - DACR_RETUNE_C26_1 */
1778
[20531] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20531 - DACR_RETUNE_C26_0 */
1779
[20532] = { 0x00FF, 0x00FF, 0x0000 }, /* R20532 - DACR_RETUNE_C27_1 */
1780
[20533] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20533 - DACR_RETUNE_C27_0 */
1781
[20534] = { 0x00FF, 0x00FF, 0x0000 }, /* R20534 - DACR_RETUNE_C28_1 */
1782
[20535] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20535 - DACR_RETUNE_C28_0 */
1783
[20536] = { 0x00FF, 0x00FF, 0x0000 }, /* R20536 - DACR_RETUNE_C29_1 */
1784
[20537] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20537 - DACR_RETUNE_C29_0 */
1785
[20538] = { 0x00FF, 0x00FF, 0x0000 }, /* R20538 - DACR_RETUNE_C30_1 */
1786
[20539] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20539 - DACR_RETUNE_C30_0 */
1787
[20540] = { 0x00FF, 0x00FF, 0x0000 }, /* R20540 - DACR_RETUNE_C31_1 */
1788
[20541] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20541 - DACR_RETUNE_C31_0 */
1789
[20542] = { 0x00FF, 0x00FF, 0x0000 }, /* R20542 - DACR_RETUNE_C32_1 */
1790
[20543] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20543 - DACR_RETUNE_C32_0 */
1791
[20992] = { 0x00FF, 0x00FF, 0x0000 }, /* R20992 - VSS_XHD2_1 */
1792
[20993] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20993 - VSS_XHD2_0 */
1793
[20994] = { 0x00FF, 0x00FF, 0x0000 }, /* R20994 - VSS_XHD3_1 */
1794
[20995] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20995 - VSS_XHD3_0 */
1795
[20996] = { 0x00FF, 0x00FF, 0x0000 }, /* R20996 - VSS_XHN1_1 */
1796
[20997] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20997 - VSS_XHN1_0 */
1797
[20998] = { 0x00FF, 0x00FF, 0x0000 }, /* R20998 - VSS_XHN2_1 */
1798
[20999] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R20999 - VSS_XHN2_0 */
1799
[21000] = { 0x00FF, 0x00FF, 0x0000 }, /* R21000 - VSS_XHN3_1 */
1800
[21001] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21001 - VSS_XHN3_0 */
1801
[21002] = { 0x00FF, 0x00FF, 0x0000 }, /* R21002 - VSS_XLA_1 */
1802
[21003] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21003 - VSS_XLA_0 */
1803
[21004] = { 0x00FF, 0x00FF, 0x0000 }, /* R21004 - VSS_XLB_1 */
1804
[21005] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21005 - VSS_XLB_0 */
1805
[21006] = { 0x00FF, 0x00FF, 0x0000 }, /* R21006 - VSS_XLG_1 */
1806
[21007] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21007 - VSS_XLG_0 */
1807
[21008] = { 0x00FF, 0x00FF, 0x0000 }, /* R21008 - VSS_PG2_1 */
1808
[21009] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21009 - VSS_PG2_0 */
1809
[21010] = { 0x00FF, 0x00FF, 0x0000 }, /* R21010 - VSS_PG_1 */
1810
[21011] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21011 - VSS_PG_0 */
1811
[21012] = { 0x00FF, 0x00FF, 0x0000 }, /* R21012 - VSS_XTD1_1 */
1812
[21013] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21013 - VSS_XTD1_0 */
1813
[21014] = { 0x00FF, 0x00FF, 0x0000 }, /* R21014 - VSS_XTD2_1 */
1814
[21015] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21015 - VSS_XTD2_0 */
1815
[21016] = { 0x00FF, 0x00FF, 0x0000 }, /* R21016 - VSS_XTD3_1 */
1816
[21017] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21017 - VSS_XTD3_0 */
1817
[21018] = { 0x00FF, 0x00FF, 0x0000 }, /* R21018 - VSS_XTD4_1 */
1818
[21019] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21019 - VSS_XTD4_0 */
1819
[21020] = { 0x00FF, 0x00FF, 0x0000 }, /* R21020 - VSS_XTD5_1 */
1820
[21021] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21021 - VSS_XTD5_0 */
1821
[21022] = { 0x00FF, 0x00FF, 0x0000 }, /* R21022 - VSS_XTD6_1 */
1822
[21023] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21023 - VSS_XTD6_0 */
1823
[21024] = { 0x00FF, 0x00FF, 0x0000 }, /* R21024 - VSS_XTD7_1 */
1824
[21025] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21025 - VSS_XTD7_0 */
1825
[21026] = { 0x00FF, 0x00FF, 0x0000 }, /* R21026 - VSS_XTD8_1 */
1826
[21027] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21027 - VSS_XTD8_0 */
1827
[21028] = { 0x00FF, 0x00FF, 0x0000 }, /* R21028 - VSS_XTD9_1 */
1828
[21029] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21029 - VSS_XTD9_0 */
1829
[21030] = { 0x00FF, 0x00FF, 0x0000 }, /* R21030 - VSS_XTD10_1 */
1830
[21031] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21031 - VSS_XTD10_0 */
1831
[21032] = { 0x00FF, 0x00FF, 0x0000 }, /* R21032 - VSS_XTD11_1 */
1832
[21033] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21033 - VSS_XTD11_0 */
1833
[21034] = { 0x00FF, 0x00FF, 0x0000 }, /* R21034 - VSS_XTD12_1 */
1834
[21035] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21035 - VSS_XTD12_0 */
1835
[21036] = { 0x00FF, 0x00FF, 0x0000 }, /* R21036 - VSS_XTD13_1 */
1836
[21037] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21037 - VSS_XTD13_0 */
1837
[21038] = { 0x00FF, 0x00FF, 0x0000 }, /* R21038 - VSS_XTD14_1 */
1838
[21039] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21039 - VSS_XTD14_0 */
1839
[21040] = { 0x00FF, 0x00FF, 0x0000 }, /* R21040 - VSS_XTD15_1 */
1840
[21041] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21041 - VSS_XTD15_0 */
1841
[21042] = { 0x00FF, 0x00FF, 0x0000 }, /* R21042 - VSS_XTD16_1 */
1842
[21043] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21043 - VSS_XTD16_0 */
1843
[21044] = { 0x00FF, 0x00FF, 0x0000 }, /* R21044 - VSS_XTD17_1 */
1844
[21045] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21045 - VSS_XTD17_0 */
1845
[21046] = { 0x00FF, 0x00FF, 0x0000 }, /* R21046 - VSS_XTD18_1 */
1846
[21047] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21047 - VSS_XTD18_0 */
1847
[21048] = { 0x00FF, 0x00FF, 0x0000 }, /* R21048 - VSS_XTD19_1 */
1848
[21049] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21049 - VSS_XTD19_0 */
1849
[21050] = { 0x00FF, 0x00FF, 0x0000 }, /* R21050 - VSS_XTD20_1 */
1850
[21051] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21051 - VSS_XTD20_0 */
1851
[21052] = { 0x00FF, 0x00FF, 0x0000 }, /* R21052 - VSS_XTD21_1 */
1852
[21053] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21053 - VSS_XTD21_0 */
1853
[21054] = { 0x00FF, 0x00FF, 0x0000 }, /* R21054 - VSS_XTD22_1 */
1854
[21055] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21055 - VSS_XTD22_0 */
1855
[21056] = { 0x00FF, 0x00FF, 0x0000 }, /* R21056 - VSS_XTD23_1 */
1856
[21057] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21057 - VSS_XTD23_0 */
1857
[21058] = { 0x00FF, 0x00FF, 0x0000 }, /* R21058 - VSS_XTD24_1 */
1858
[21059] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21059 - VSS_XTD24_0 */
1859
[21060] = { 0x00FF, 0x00FF, 0x0000 }, /* R21060 - VSS_XTD25_1 */
1860
[21061] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21061 - VSS_XTD25_0 */
1861
[21062] = { 0x00FF, 0x00FF, 0x0000 }, /* R21062 - VSS_XTD26_1 */
1862
[21063] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21063 - VSS_XTD26_0 */
1863
[21064] = { 0x00FF, 0x00FF, 0x0000 }, /* R21064 - VSS_XTD27_1 */
1864
[21065] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21065 - VSS_XTD27_0 */
1865
[21066] = { 0x00FF, 0x00FF, 0x0000 }, /* R21066 - VSS_XTD28_1 */
1866
[21067] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21067 - VSS_XTD28_0 */
1867
[21068] = { 0x00FF, 0x00FF, 0x0000 }, /* R21068 - VSS_XTD29_1 */
1868
[21069] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21069 - VSS_XTD29_0 */
1869
[21070] = { 0x00FF, 0x00FF, 0x0000 }, /* R21070 - VSS_XTD30_1 */
1870
[21071] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21071 - VSS_XTD30_0 */
1871
[21072] = { 0x00FF, 0x00FF, 0x0000 }, /* R21072 - VSS_XTD31_1 */
1872
[21073] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21073 - VSS_XTD31_0 */
1873
[21074] = { 0x00FF, 0x00FF, 0x0000 }, /* R21074 - VSS_XTD32_1 */
1874
[21075] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21075 - VSS_XTD32_0 */
1875
[21076] = { 0x00FF, 0x00FF, 0x0000 }, /* R21076 - VSS_XTS1_1 */
1876
[21077] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21077 - VSS_XTS1_0 */
1877
[21078] = { 0x00FF, 0x00FF, 0x0000 }, /* R21078 - VSS_XTS2_1 */
1878
[21079] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21079 - VSS_XTS2_0 */
1879
[21080] = { 0x00FF, 0x00FF, 0x0000 }, /* R21080 - VSS_XTS3_1 */
1880
[21081] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21081 - VSS_XTS3_0 */
1881
[21082] = { 0x00FF, 0x00FF, 0x0000 }, /* R21082 - VSS_XTS4_1 */
1882
[21083] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21083 - VSS_XTS4_0 */
1883
[21084] = { 0x00FF, 0x00FF, 0x0000 }, /* R21084 - VSS_XTS5_1 */
1884
[21085] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21085 - VSS_XTS5_0 */
1885
[21086] = { 0x00FF, 0x00FF, 0x0000 }, /* R21086 - VSS_XTS6_1 */
1886
[21087] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21087 - VSS_XTS6_0 */
1887
[21088] = { 0x00FF, 0x00FF, 0x0000 }, /* R21088 - VSS_XTS7_1 */
1888
[21089] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21089 - VSS_XTS7_0 */
1889
[21090] = { 0x00FF, 0x00FF, 0x0000 }, /* R21090 - VSS_XTS8_1 */
1890
[21091] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21091 - VSS_XTS8_0 */
1891
[21092] = { 0x00FF, 0x00FF, 0x0000 }, /* R21092 - VSS_XTS9_1 */
1892
[21093] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21093 - VSS_XTS9_0 */
1893
[21094] = { 0x00FF, 0x00FF, 0x0000 }, /* R21094 - VSS_XTS10_1 */
1894
[21095] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21095 - VSS_XTS10_0 */
1895
[21096] = { 0x00FF, 0x00FF, 0x0000 }, /* R21096 - VSS_XTS11_1 */
1896
[21097] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21097 - VSS_XTS11_0 */
1897
[21098] = { 0x00FF, 0x00FF, 0x0000 }, /* R21098 - VSS_XTS12_1 */
1898
[21099] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21099 - VSS_XTS12_0 */
1899
[21100] = { 0x00FF, 0x00FF, 0x0000 }, /* R21100 - VSS_XTS13_1 */
1900
[21101] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21101 - VSS_XTS13_0 */
1901
[21102] = { 0x00FF, 0x00FF, 0x0000 }, /* R21102 - VSS_XTS14_1 */
1902
[21103] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21103 - VSS_XTS14_0 */
1903
[21104] = { 0x00FF, 0x00FF, 0x0000 }, /* R21104 - VSS_XTS15_1 */
1904
[21105] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21105 - VSS_XTS15_0 */
1905
[21106] = { 0x00FF, 0x00FF, 0x0000 }, /* R21106 - VSS_XTS16_1 */
1906
[21107] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21107 - VSS_XTS16_0 */
1907
[21108] = { 0x00FF, 0x00FF, 0x0000 }, /* R21108 - VSS_XTS17_1 */
1908
[21109] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21109 - VSS_XTS17_0 */
1909
[21110] = { 0x00FF, 0x00FF, 0x0000 }, /* R21110 - VSS_XTS18_1 */
1910
[21111] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21111 - VSS_XTS18_0 */
1911
[21112] = { 0x00FF, 0x00FF, 0x0000 }, /* R21112 - VSS_XTS19_1 */
1912
[21113] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21113 - VSS_XTS19_0 */
1913
[21114] = { 0x00FF, 0x00FF, 0x0000 }, /* R21114 - VSS_XTS20_1 */
1914
[21115] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21115 - VSS_XTS20_0 */
1915
[21116] = { 0x00FF, 0x00FF, 0x0000 }, /* R21116 - VSS_XTS21_1 */
1916
[21117] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21117 - VSS_XTS21_0 */
1917
[21118] = { 0x00FF, 0x00FF, 0x0000 }, /* R21118 - VSS_XTS22_1 */
1918
[21119] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21119 - VSS_XTS22_0 */
1919
[21120] = { 0x00FF, 0x00FF, 0x0000 }, /* R21120 - VSS_XTS23_1 */
1920
[21121] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21121 - VSS_XTS23_0 */
1921
[21122] = { 0x00FF, 0x00FF, 0x0000 }, /* R21122 - VSS_XTS24_1 */
1922
[21123] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21123 - VSS_XTS24_0 */
1923
[21124] = { 0x00FF, 0x00FF, 0x0000 }, /* R21124 - VSS_XTS25_1 */
1924
[21125] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21125 - VSS_XTS25_0 */
1925
[21126] = { 0x00FF, 0x00FF, 0x0000 }, /* R21126 - VSS_XTS26_1 */
1926
[21127] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21127 - VSS_XTS26_0 */
1927
[21128] = { 0x00FF, 0x00FF, 0x0000 }, /* R21128 - VSS_XTS27_1 */
1928
[21129] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21129 - VSS_XTS27_0 */
1929
[21130] = { 0x00FF, 0x00FF, 0x0000 }, /* R21130 - VSS_XTS28_1 */
1930
[21131] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21131 - VSS_XTS28_0 */
1931
[21132] = { 0x00FF, 0x00FF, 0x0000 }, /* R21132 - VSS_XTS29_1 */
1932
[21133] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21133 - VSS_XTS29_0 */
1933
[21134] = { 0x00FF, 0x00FF, 0x0000 }, /* R21134 - VSS_XTS30_1 */
1934
[21135] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21135 - VSS_XTS30_0 */
1935
[21136] = { 0x00FF, 0x00FF, 0x0000 }, /* R21136 - VSS_XTS31_1 */
1936
[21137] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21137 - VSS_XTS31_0 */
1937
[21138] = { 0x00FF, 0x00FF, 0x0000 }, /* R21138 - VSS_XTS32_1 */
1938
[21139] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21139 - VSS_XTS32_0 */
1941
static int wm8962_volatile_register(struct snd_soc_codec *codec, unsigned int reg)
1943
if (wm8962_reg_access[reg].vol)
1949
static int wm8962_readable_register(struct snd_soc_codec *codec, unsigned int reg)
1951
if (wm8962_reg_access[reg].read)
1957
static int wm8962_reset(struct snd_soc_codec *codec)
1959
return snd_soc_write(codec, WM8962_SOFTWARE_RESET, 0x6243);
1962
static const DECLARE_TLV_DB_SCALE(inpga_tlv, -2325, 75, 0);
1963
static const DECLARE_TLV_DB_SCALE(mixin_tlv, -1500, 300, 0);
1964
static const unsigned int mixinpga_tlv[] = {
1965
TLV_DB_RANGE_HEAD(7),
1966
0, 1, TLV_DB_SCALE_ITEM(0, 600, 0),
1967
2, 2, TLV_DB_SCALE_ITEM(1300, 1300, 0),
1968
3, 4, TLV_DB_SCALE_ITEM(1800, 200, 0),
1969
5, 5, TLV_DB_SCALE_ITEM(2400, 0, 0),
1970
6, 7, TLV_DB_SCALE_ITEM(2700, 300, 0),
1972
static const DECLARE_TLV_DB_SCALE(beep_tlv, -9600, 600, 1);
1973
static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1);
1974
static const DECLARE_TLV_DB_SCALE(st_tlv, -3600, 300, 0);
1975
static const DECLARE_TLV_DB_SCALE(inmix_tlv, -600, 600, 0);
1976
static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0);
1977
static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
1978
static const DECLARE_TLV_DB_SCALE(hp_tlv, -700, 100, 0);
1979
static const unsigned int classd_tlv[] = {
1980
TLV_DB_RANGE_HEAD(7),
1981
0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
1982
7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
1985
/* The VU bits for the headphones are in a different register to the mute
1986
* bits and only take effect on the PGA if it is actually powered.
1988
static int wm8962_put_hp_sw(struct snd_kcontrol *kcontrol,
1989
struct snd_ctl_elem_value *ucontrol)
1991
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1992
u16 *reg_cache = codec->reg_cache;
1995
/* Apply the update (if any) */
1996
ret = snd_soc_put_volsw(kcontrol, ucontrol);
2000
/* If the left PGA is enabled hit that VU bit... */
2001
if (reg_cache[WM8962_PWR_MGMT_2] & WM8962_HPOUTL_PGA_ENA)
2002
return snd_soc_write(codec, WM8962_HPOUTL_VOLUME,
2003
reg_cache[WM8962_HPOUTL_VOLUME]);
2005
/* ...otherwise the right. The VU is stereo. */
2006
if (reg_cache[WM8962_PWR_MGMT_2] & WM8962_HPOUTR_PGA_ENA)
2007
return snd_soc_write(codec, WM8962_HPOUTR_VOLUME,
2008
reg_cache[WM8962_HPOUTR_VOLUME]);
2013
/* The VU bits for the speakers are in a different register to the mute
2014
* bits and only take effect on the PGA if it is actually powered.
2016
static int wm8962_put_spk_sw(struct snd_kcontrol *kcontrol,
2017
struct snd_ctl_elem_value *ucontrol)
2019
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
2020
u16 *reg_cache = codec->reg_cache;
2023
/* Apply the update (if any) */
2024
ret = snd_soc_put_volsw(kcontrol, ucontrol);
2028
/* If the left PGA is enabled hit that VU bit... */
2029
if (reg_cache[WM8962_PWR_MGMT_2] & WM8962_SPKOUTL_PGA_ENA)
2030
return snd_soc_write(codec, WM8962_SPKOUTL_VOLUME,
2031
reg_cache[WM8962_SPKOUTL_VOLUME]);
2033
/* ...otherwise the right. The VU is stereo. */
2034
if (reg_cache[WM8962_PWR_MGMT_2] & WM8962_SPKOUTR_PGA_ENA)
2035
return snd_soc_write(codec, WM8962_SPKOUTR_VOLUME,
2036
reg_cache[WM8962_SPKOUTR_VOLUME]);
2041
static const struct snd_kcontrol_new wm8962_snd_controls[] = {
2042
SOC_DOUBLE("Input Mixer Switch", WM8962_INPUT_MIXER_CONTROL_1, 3, 2, 1, 1),
2044
SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8962_LEFT_INPUT_MIXER_VOLUME, 6, 7, 0,
2046
SOC_SINGLE_TLV("MIXINL PGA Volume", WM8962_LEFT_INPUT_MIXER_VOLUME, 3, 7, 0,
2048
SOC_SINGLE_TLV("MIXINL IN3L Volume", WM8962_LEFT_INPUT_MIXER_VOLUME, 0, 7, 0,
2051
SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8962_RIGHT_INPUT_MIXER_VOLUME, 6, 7, 0,
2053
SOC_SINGLE_TLV("MIXINR PGA Volume", WM8962_RIGHT_INPUT_MIXER_VOLUME, 3, 7, 0,
2055
SOC_SINGLE_TLV("MIXINR IN3R Volume", WM8962_RIGHT_INPUT_MIXER_VOLUME, 0, 7, 0,
2058
SOC_DOUBLE_R_TLV("Digital Capture Volume", WM8962_LEFT_ADC_VOLUME,
2059
WM8962_RIGHT_ADC_VOLUME, 1, 127, 0, digital_tlv),
2060
SOC_DOUBLE_R_TLV("Capture Volume", WM8962_LEFT_INPUT_VOLUME,
2061
WM8962_RIGHT_INPUT_VOLUME, 0, 63, 0, inpga_tlv),
2062
SOC_DOUBLE_R("Capture Switch", WM8962_LEFT_INPUT_VOLUME,
2063
WM8962_RIGHT_INPUT_VOLUME, 7, 1, 1),
2064
SOC_DOUBLE_R("Capture ZC Switch", WM8962_LEFT_INPUT_VOLUME,
2065
WM8962_RIGHT_INPUT_VOLUME, 6, 1, 1),
2067
SOC_DOUBLE_R_TLV("Sidetone Volume", WM8962_DAC_DSP_MIXING_1,
2068
WM8962_DAC_DSP_MIXING_2, 4, 12, 0, st_tlv),
2070
SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8962_LEFT_DAC_VOLUME,
2071
WM8962_RIGHT_DAC_VOLUME, 1, 127, 0, digital_tlv),
2072
SOC_SINGLE("DAC High Performance Switch", WM8962_ADC_DAC_CONTROL_2, 0, 1, 0),
2074
SOC_SINGLE("ADC High Performance Switch", WM8962_ADDITIONAL_CONTROL_1,
2077
SOC_SINGLE_TLV("Beep Volume", WM8962_BEEP_GENERATOR_1, 4, 15, 0, beep_tlv),
2079
SOC_DOUBLE_R_TLV("Headphone Volume", WM8962_HPOUTL_VOLUME,
2080
WM8962_HPOUTR_VOLUME, 0, 127, 0, out_tlv),
2081
SOC_DOUBLE_EXT("Headphone Switch", WM8962_PWR_MGMT_2, 1, 0, 1, 1,
2082
snd_soc_get_volsw, wm8962_put_hp_sw),
2083
SOC_DOUBLE_R("Headphone ZC Switch", WM8962_HPOUTL_VOLUME, WM8962_HPOUTR_VOLUME,
2085
SOC_DOUBLE_TLV("Headphone Aux Volume", WM8962_ANALOGUE_HP_2, 3, 6, 7, 0,
2088
SOC_DOUBLE_R("Headphone Mixer Switch", WM8962_HEADPHONE_MIXER_3,
2089
WM8962_HEADPHONE_MIXER_4, 8, 1, 1),
2091
SOC_SINGLE_TLV("HPMIXL IN4L Volume", WM8962_HEADPHONE_MIXER_3,
2092
3, 7, 0, bypass_tlv),
2093
SOC_SINGLE_TLV("HPMIXL IN4R Volume", WM8962_HEADPHONE_MIXER_3,
2094
0, 7, 0, bypass_tlv),
2095
SOC_SINGLE_TLV("HPMIXL MIXINL Volume", WM8962_HEADPHONE_MIXER_3,
2096
7, 1, 1, inmix_tlv),
2097
SOC_SINGLE_TLV("HPMIXL MIXINR Volume", WM8962_HEADPHONE_MIXER_3,
2098
6, 1, 1, inmix_tlv),
2100
SOC_SINGLE_TLV("HPMIXR IN4L Volume", WM8962_HEADPHONE_MIXER_4,
2101
3, 7, 0, bypass_tlv),
2102
SOC_SINGLE_TLV("HPMIXR IN4R Volume", WM8962_HEADPHONE_MIXER_4,
2103
0, 7, 0, bypass_tlv),
2104
SOC_SINGLE_TLV("HPMIXR MIXINL Volume", WM8962_HEADPHONE_MIXER_4,
2105
7, 1, 1, inmix_tlv),
2106
SOC_SINGLE_TLV("HPMIXR MIXINR Volume", WM8962_HEADPHONE_MIXER_4,
2107
6, 1, 1, inmix_tlv),
2109
SOC_SINGLE_TLV("Speaker Boost Volume", WM8962_CLASS_D_CONTROL_2, 0, 7, 0,
2113
static const struct snd_kcontrol_new wm8962_spk_mono_controls[] = {
2114
SOC_SINGLE_TLV("Speaker Volume", WM8962_SPKOUTL_VOLUME, 0, 127, 0, out_tlv),
2115
SOC_SINGLE_EXT("Speaker Switch", WM8962_CLASS_D_CONTROL_1, 1, 1, 1,
2116
snd_soc_get_volsw, wm8962_put_spk_sw),
2117
SOC_SINGLE("Speaker ZC Switch", WM8962_SPKOUTL_VOLUME, 7, 1, 0),
2119
SOC_SINGLE("Speaker Mixer Switch", WM8962_SPEAKER_MIXER_3, 8, 1, 1),
2120
SOC_SINGLE_TLV("Speaker Mixer IN4L Volume", WM8962_SPEAKER_MIXER_3,
2121
3, 7, 0, bypass_tlv),
2122
SOC_SINGLE_TLV("Speaker Mixer IN4R Volume", WM8962_SPEAKER_MIXER_3,
2123
0, 7, 0, bypass_tlv),
2124
SOC_SINGLE_TLV("Speaker Mixer MIXINL Volume", WM8962_SPEAKER_MIXER_3,
2125
7, 1, 1, inmix_tlv),
2126
SOC_SINGLE_TLV("Speaker Mixer MIXINR Volume", WM8962_SPEAKER_MIXER_3,
2127
6, 1, 1, inmix_tlv),
2128
SOC_SINGLE_TLV("Speaker Mixer DACL Volume", WM8962_SPEAKER_MIXER_5,
2129
7, 1, 0, inmix_tlv),
2130
SOC_SINGLE_TLV("Speaker Mixer DACR Volume", WM8962_SPEAKER_MIXER_5,
2131
6, 1, 0, inmix_tlv),
2134
static const struct snd_kcontrol_new wm8962_spk_stereo_controls[] = {
2135
SOC_DOUBLE_R_TLV("Speaker Volume", WM8962_SPKOUTL_VOLUME,
2136
WM8962_SPKOUTR_VOLUME, 0, 127, 0, out_tlv),
2137
SOC_DOUBLE_EXT("Speaker Switch", WM8962_CLASS_D_CONTROL_1, 1, 0, 1, 1,
2138
snd_soc_get_volsw, wm8962_put_spk_sw),
2139
SOC_DOUBLE_R("Speaker ZC Switch", WM8962_SPKOUTL_VOLUME, WM8962_SPKOUTR_VOLUME,
2142
SOC_DOUBLE_R("Speaker Mixer Switch", WM8962_SPEAKER_MIXER_3,
2143
WM8962_SPEAKER_MIXER_4, 8, 1, 1),
2145
SOC_SINGLE_TLV("SPKOUTL Mixer IN4L Volume", WM8962_SPEAKER_MIXER_3,
2146
3, 7, 0, bypass_tlv),
2147
SOC_SINGLE_TLV("SPKOUTL Mixer IN4R Volume", WM8962_SPEAKER_MIXER_3,
2148
0, 7, 0, bypass_tlv),
2149
SOC_SINGLE_TLV("SPKOUTL Mixer MIXINL Volume", WM8962_SPEAKER_MIXER_3,
2150
7, 1, 1, inmix_tlv),
2151
SOC_SINGLE_TLV("SPKOUTL Mixer MIXINR Volume", WM8962_SPEAKER_MIXER_3,
2152
6, 1, 1, inmix_tlv),
2153
SOC_SINGLE_TLV("SPKOUTL Mixer DACL Volume", WM8962_SPEAKER_MIXER_5,
2154
7, 1, 0, inmix_tlv),
2155
SOC_SINGLE_TLV("SPKOUTL Mixer DACR Volume", WM8962_SPEAKER_MIXER_5,
2156
6, 1, 0, inmix_tlv),
2158
SOC_SINGLE_TLV("SPKOUTR Mixer IN4L Volume", WM8962_SPEAKER_MIXER_4,
2159
3, 7, 0, bypass_tlv),
2160
SOC_SINGLE_TLV("SPKOUTR Mixer IN4R Volume", WM8962_SPEAKER_MIXER_4,
2161
0, 7, 0, bypass_tlv),
2162
SOC_SINGLE_TLV("SPKOUTR Mixer MIXINL Volume", WM8962_SPEAKER_MIXER_4,
2163
7, 1, 1, inmix_tlv),
2164
SOC_SINGLE_TLV("SPKOUTR Mixer MIXINR Volume", WM8962_SPEAKER_MIXER_4,
2165
6, 1, 1, inmix_tlv),
2166
SOC_SINGLE_TLV("SPKOUTR Mixer DACL Volume", WM8962_SPEAKER_MIXER_5,
2167
5, 1, 0, inmix_tlv),
2168
SOC_SINGLE_TLV("SPKOUTR Mixer DACR Volume", WM8962_SPEAKER_MIXER_5,
2169
4, 1, 0, inmix_tlv),
2172
static int sysclk_event(struct snd_soc_dapm_widget *w,
2173
struct snd_kcontrol *kcontrol, int event)
2175
struct snd_soc_codec *codec = w->codec;
2179
src = snd_soc_read(codec, WM8962_CLOCKING2) & WM8962_SYSCLK_SRC_MASK;
2185
case 0x200: /* FLL */
2189
dev_err(codec->dev, "Unknown SYSCLK source %x\n", src);
2194
case SND_SOC_DAPM_PRE_PMU:
2196
snd_soc_update_bits(codec, WM8962_FLL_CONTROL_1,
2197
WM8962_FLL_ENA, WM8962_FLL_ENA);
2200
case SND_SOC_DAPM_POST_PMD:
2202
snd_soc_update_bits(codec, WM8962_FLL_CONTROL_1,
2214
static int cp_event(struct snd_soc_dapm_widget *w,
2215
struct snd_kcontrol *kcontrol, int event)
2218
case SND_SOC_DAPM_POST_PMU:
2230
static int hp_event(struct snd_soc_dapm_widget *w,
2231
struct snd_kcontrol *kcontrol, int event)
2233
struct snd_soc_codec *codec = w->codec;
2236
int expected = (WM8962_DCS_STARTUP_DONE_HP1L |
2237
WM8962_DCS_STARTUP_DONE_HP1R);
2240
case SND_SOC_DAPM_POST_PMU:
2241
snd_soc_update_bits(codec, WM8962_ANALOGUE_HP_0,
2242
WM8962_HP1L_ENA | WM8962_HP1R_ENA,
2243
WM8962_HP1L_ENA | WM8962_HP1R_ENA);
2246
snd_soc_update_bits(codec, WM8962_ANALOGUE_HP_0,
2247
WM8962_HP1L_ENA_DLY | WM8962_HP1R_ENA_DLY,
2248
WM8962_HP1L_ENA_DLY | WM8962_HP1R_ENA_DLY);
2250
/* Start the DC servo */
2251
snd_soc_update_bits(codec, WM8962_DC_SERVO_1,
2252
WM8962_HP1L_DCS_ENA | WM8962_HP1R_DCS_ENA |
2253
WM8962_HP1L_DCS_STARTUP |
2254
WM8962_HP1R_DCS_STARTUP,
2255
WM8962_HP1L_DCS_ENA | WM8962_HP1R_DCS_ENA |
2256
WM8962_HP1L_DCS_STARTUP |
2257
WM8962_HP1R_DCS_STARTUP);
2259
/* Wait for it to complete, should be well under 100ms */
2263
reg = snd_soc_read(codec, WM8962_DC_SERVO_6);
2266
"Failed to read DCS status: %d\n",
2270
dev_dbg(codec->dev, "DCS status: %x\n", reg);
2271
} while (++timeout < 200 && (reg & expected) != expected);
2273
if ((reg & expected) != expected)
2274
dev_err(codec->dev, "DC servo timed out\n");
2276
dev_dbg(codec->dev, "DC servo complete after %dms\n",
2279
snd_soc_update_bits(codec, WM8962_ANALOGUE_HP_0,
2280
WM8962_HP1L_ENA_OUTP |
2281
WM8962_HP1R_ENA_OUTP,
2282
WM8962_HP1L_ENA_OUTP |
2283
WM8962_HP1R_ENA_OUTP);
2286
snd_soc_update_bits(codec, WM8962_ANALOGUE_HP_0,
2287
WM8962_HP1L_RMV_SHORT |
2288
WM8962_HP1R_RMV_SHORT,
2289
WM8962_HP1L_RMV_SHORT |
2290
WM8962_HP1R_RMV_SHORT);
2293
case SND_SOC_DAPM_PRE_PMD:
2294
snd_soc_update_bits(codec, WM8962_ANALOGUE_HP_0,
2295
WM8962_HP1L_RMV_SHORT |
2296
WM8962_HP1R_RMV_SHORT, 0);
2300
snd_soc_update_bits(codec, WM8962_DC_SERVO_1,
2301
WM8962_HP1L_DCS_ENA | WM8962_HP1R_DCS_ENA |
2302
WM8962_HP1L_DCS_STARTUP |
2303
WM8962_HP1R_DCS_STARTUP,
2306
snd_soc_update_bits(codec, WM8962_ANALOGUE_HP_0,
2307
WM8962_HP1L_ENA | WM8962_HP1R_ENA |
2308
WM8962_HP1L_ENA_DLY | WM8962_HP1R_ENA_DLY |
2309
WM8962_HP1L_ENA_OUTP |
2310
WM8962_HP1R_ENA_OUTP, 0);
2323
/* VU bits for the output PGAs only take effect while the PGA is powered */
2324
static int out_pga_event(struct snd_soc_dapm_widget *w,
2325
struct snd_kcontrol *kcontrol, int event)
2327
struct snd_soc_codec *codec = w->codec;
2328
u16 *reg_cache = codec->reg_cache;
2332
case WM8962_HPOUTR_PGA_ENA_SHIFT:
2333
reg = WM8962_HPOUTR_VOLUME;
2335
case WM8962_HPOUTL_PGA_ENA_SHIFT:
2336
reg = WM8962_HPOUTL_VOLUME;
2338
case WM8962_SPKOUTR_PGA_ENA_SHIFT:
2339
reg = WM8962_SPKOUTR_VOLUME;
2341
case WM8962_SPKOUTL_PGA_ENA_SHIFT:
2342
reg = WM8962_SPKOUTL_VOLUME;
2350
case SND_SOC_DAPM_POST_PMU:
2351
return snd_soc_write(codec, reg, reg_cache[reg]);
2358
static const char *st_text[] = { "None", "Right", "Left" };
2360
static const struct soc_enum str_enum =
2361
SOC_ENUM_SINGLE(WM8962_DAC_DSP_MIXING_1, 2, 3, st_text);
2363
static const struct snd_kcontrol_new str_mux =
2364
SOC_DAPM_ENUM("Right Sidetone", str_enum);
2366
static const struct soc_enum stl_enum =
2367
SOC_ENUM_SINGLE(WM8962_DAC_DSP_MIXING_2, 2, 3, st_text);
2369
static const struct snd_kcontrol_new stl_mux =
2370
SOC_DAPM_ENUM("Left Sidetone", stl_enum);
2372
static const char *outmux_text[] = { "DAC", "Mixer" };
2374
static const struct soc_enum spkoutr_enum =
2375
SOC_ENUM_SINGLE(WM8962_SPEAKER_MIXER_2, 7, 2, outmux_text);
2377
static const struct snd_kcontrol_new spkoutr_mux =
2378
SOC_DAPM_ENUM("SPKOUTR Mux", spkoutr_enum);
2380
static const struct soc_enum spkoutl_enum =
2381
SOC_ENUM_SINGLE(WM8962_SPEAKER_MIXER_1, 7, 2, outmux_text);
2383
static const struct snd_kcontrol_new spkoutl_mux =
2384
SOC_DAPM_ENUM("SPKOUTL Mux", spkoutl_enum);
2386
static const struct soc_enum hpoutr_enum =
2387
SOC_ENUM_SINGLE(WM8962_HEADPHONE_MIXER_2, 7, 2, outmux_text);
2389
static const struct snd_kcontrol_new hpoutr_mux =
2390
SOC_DAPM_ENUM("HPOUTR Mux", hpoutr_enum);
2392
static const struct soc_enum hpoutl_enum =
2393
SOC_ENUM_SINGLE(WM8962_HEADPHONE_MIXER_1, 7, 2, outmux_text);
2395
static const struct snd_kcontrol_new hpoutl_mux =
2396
SOC_DAPM_ENUM("HPOUTL Mux", hpoutl_enum);
2398
static const struct snd_kcontrol_new inpgal[] = {
2399
SOC_DAPM_SINGLE("IN1L Switch", WM8962_LEFT_INPUT_PGA_CONTROL, 3, 1, 0),
2400
SOC_DAPM_SINGLE("IN2L Switch", WM8962_LEFT_INPUT_PGA_CONTROL, 2, 1, 0),
2401
SOC_DAPM_SINGLE("IN3L Switch", WM8962_LEFT_INPUT_PGA_CONTROL, 1, 1, 0),
2402
SOC_DAPM_SINGLE("IN4L Switch", WM8962_LEFT_INPUT_PGA_CONTROL, 0, 1, 0),
2405
static const struct snd_kcontrol_new inpgar[] = {
2406
SOC_DAPM_SINGLE("IN1R Switch", WM8962_RIGHT_INPUT_PGA_CONTROL, 3, 1, 0),
2407
SOC_DAPM_SINGLE("IN2R Switch", WM8962_RIGHT_INPUT_PGA_CONTROL, 2, 1, 0),
2408
SOC_DAPM_SINGLE("IN3R Switch", WM8962_RIGHT_INPUT_PGA_CONTROL, 1, 1, 0),
2409
SOC_DAPM_SINGLE("IN4R Switch", WM8962_RIGHT_INPUT_PGA_CONTROL, 0, 1, 0),
2412
static const struct snd_kcontrol_new mixinl[] = {
2413
SOC_DAPM_SINGLE("IN2L Switch", WM8962_INPUT_MIXER_CONTROL_2, 5, 1, 0),
2414
SOC_DAPM_SINGLE("IN3L Switch", WM8962_INPUT_MIXER_CONTROL_2, 4, 1, 0),
2415
SOC_DAPM_SINGLE("PGA Switch", WM8962_INPUT_MIXER_CONTROL_2, 3, 1, 0),
2418
static const struct snd_kcontrol_new mixinr[] = {
2419
SOC_DAPM_SINGLE("IN2R Switch", WM8962_INPUT_MIXER_CONTROL_2, 2, 1, 0),
2420
SOC_DAPM_SINGLE("IN3R Switch", WM8962_INPUT_MIXER_CONTROL_2, 1, 1, 0),
2421
SOC_DAPM_SINGLE("PGA Switch", WM8962_INPUT_MIXER_CONTROL_2, 0, 1, 0),
2424
static const struct snd_kcontrol_new hpmixl[] = {
2425
SOC_DAPM_SINGLE("DACL Switch", WM8962_HEADPHONE_MIXER_1, 5, 1, 0),
2426
SOC_DAPM_SINGLE("DACR Switch", WM8962_HEADPHONE_MIXER_1, 4, 1, 0),
2427
SOC_DAPM_SINGLE("MIXINL Switch", WM8962_HEADPHONE_MIXER_1, 3, 1, 0),
2428
SOC_DAPM_SINGLE("MIXINR Switch", WM8962_HEADPHONE_MIXER_1, 2, 1, 0),
2429
SOC_DAPM_SINGLE("IN4L Switch", WM8962_HEADPHONE_MIXER_1, 1, 1, 0),
2430
SOC_DAPM_SINGLE("IN4R Switch", WM8962_HEADPHONE_MIXER_1, 0, 1, 0),
2433
static const struct snd_kcontrol_new hpmixr[] = {
2434
SOC_DAPM_SINGLE("DACL Switch", WM8962_HEADPHONE_MIXER_2, 5, 1, 0),
2435
SOC_DAPM_SINGLE("DACR Switch", WM8962_HEADPHONE_MIXER_2, 4, 1, 0),
2436
SOC_DAPM_SINGLE("MIXINL Switch", WM8962_HEADPHONE_MIXER_2, 3, 1, 0),
2437
SOC_DAPM_SINGLE("MIXINR Switch", WM8962_HEADPHONE_MIXER_2, 2, 1, 0),
2438
SOC_DAPM_SINGLE("IN4L Switch", WM8962_HEADPHONE_MIXER_2, 1, 1, 0),
2439
SOC_DAPM_SINGLE("IN4R Switch", WM8962_HEADPHONE_MIXER_2, 0, 1, 0),
2442
static const struct snd_kcontrol_new spkmixl[] = {
2443
SOC_DAPM_SINGLE("DACL Switch", WM8962_SPEAKER_MIXER_1, 5, 1, 0),
2444
SOC_DAPM_SINGLE("DACR Switch", WM8962_SPEAKER_MIXER_1, 4, 1, 0),
2445
SOC_DAPM_SINGLE("MIXINL Switch", WM8962_SPEAKER_MIXER_1, 3, 1, 0),
2446
SOC_DAPM_SINGLE("MIXINR Switch", WM8962_SPEAKER_MIXER_1, 2, 1, 0),
2447
SOC_DAPM_SINGLE("IN4L Switch", WM8962_SPEAKER_MIXER_1, 1, 1, 0),
2448
SOC_DAPM_SINGLE("IN4R Switch", WM8962_SPEAKER_MIXER_1, 0, 1, 0),
2451
static const struct snd_kcontrol_new spkmixr[] = {
2452
SOC_DAPM_SINGLE("DACL Switch", WM8962_SPEAKER_MIXER_2, 5, 1, 0),
2453
SOC_DAPM_SINGLE("DACR Switch", WM8962_SPEAKER_MIXER_2, 4, 1, 0),
2454
SOC_DAPM_SINGLE("MIXINL Switch", WM8962_SPEAKER_MIXER_2, 3, 1, 0),
2455
SOC_DAPM_SINGLE("MIXINR Switch", WM8962_SPEAKER_MIXER_2, 2, 1, 0),
2456
SOC_DAPM_SINGLE("IN4L Switch", WM8962_SPEAKER_MIXER_2, 1, 1, 0),
2457
SOC_DAPM_SINGLE("IN4R Switch", WM8962_SPEAKER_MIXER_2, 0, 1, 0),
2460
static const struct snd_soc_dapm_widget wm8962_dapm_widgets[] = {
2461
SND_SOC_DAPM_INPUT("IN1L"),
2462
SND_SOC_DAPM_INPUT("IN1R"),
2463
SND_SOC_DAPM_INPUT("IN2L"),
2464
SND_SOC_DAPM_INPUT("IN2R"),
2465
SND_SOC_DAPM_INPUT("IN3L"),
2466
SND_SOC_DAPM_INPUT("IN3R"),
2467
SND_SOC_DAPM_INPUT("IN4L"),
2468
SND_SOC_DAPM_INPUT("IN4R"),
2469
SND_SOC_DAPM_INPUT("Beep"),
2471
SND_SOC_DAPM_MICBIAS("MICBIAS", WM8962_PWR_MGMT_1, 1, 0),
2473
SND_SOC_DAPM_SUPPLY("Class G", WM8962_CHARGE_PUMP_B, 0, 1, NULL, 0),
2474
SND_SOC_DAPM_SUPPLY("SYSCLK", WM8962_CLOCKING2, 5, 0, sysclk_event,
2475
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
2476
SND_SOC_DAPM_SUPPLY("Charge Pump", WM8962_CHARGE_PUMP_1, 0, 0, cp_event,
2477
SND_SOC_DAPM_POST_PMU),
2478
SND_SOC_DAPM_SUPPLY("TOCLK", WM8962_ADDITIONAL_CONTROL_1, 0, 0, NULL, 0),
2480
SND_SOC_DAPM_MIXER("INPGAL", WM8962_LEFT_INPUT_PGA_CONTROL, 4, 0,
2481
inpgal, ARRAY_SIZE(inpgal)),
2482
SND_SOC_DAPM_MIXER("INPGAR", WM8962_RIGHT_INPUT_PGA_CONTROL, 4, 0,
2483
inpgar, ARRAY_SIZE(inpgar)),
2484
SND_SOC_DAPM_MIXER("MIXINL", WM8962_PWR_MGMT_1, 5, 0,
2485
mixinl, ARRAY_SIZE(mixinl)),
2486
SND_SOC_DAPM_MIXER("MIXINR", WM8962_PWR_MGMT_1, 4, 0,
2487
mixinr, ARRAY_SIZE(mixinr)),
2489
SND_SOC_DAPM_ADC("ADCL", "Capture", WM8962_PWR_MGMT_1, 3, 0),
2490
SND_SOC_DAPM_ADC("ADCR", "Capture", WM8962_PWR_MGMT_1, 2, 0),
2492
SND_SOC_DAPM_MUX("STL", SND_SOC_NOPM, 0, 0, &stl_mux),
2493
SND_SOC_DAPM_MUX("STR", SND_SOC_NOPM, 0, 0, &str_mux),
2495
SND_SOC_DAPM_DAC("DACL", "Playback", WM8962_PWR_MGMT_2, 8, 0),
2496
SND_SOC_DAPM_DAC("DACR", "Playback", WM8962_PWR_MGMT_2, 7, 0),
2498
SND_SOC_DAPM_PGA("Left Bypass", SND_SOC_NOPM, 0, 0, NULL, 0),
2499
SND_SOC_DAPM_PGA("Right Bypass", SND_SOC_NOPM, 0, 0, NULL, 0),
2501
SND_SOC_DAPM_MIXER("HPMIXL", WM8962_MIXER_ENABLES, 3, 0,
2502
hpmixl, ARRAY_SIZE(hpmixl)),
2503
SND_SOC_DAPM_MIXER("HPMIXR", WM8962_MIXER_ENABLES, 2, 0,
2504
hpmixr, ARRAY_SIZE(hpmixr)),
2506
SND_SOC_DAPM_MUX_E("HPOUTL PGA", WM8962_PWR_MGMT_2, 6, 0, &hpoutl_mux,
2507
out_pga_event, SND_SOC_DAPM_POST_PMU),
2508
SND_SOC_DAPM_MUX_E("HPOUTR PGA", WM8962_PWR_MGMT_2, 5, 0, &hpoutr_mux,
2509
out_pga_event, SND_SOC_DAPM_POST_PMU),
2511
SND_SOC_DAPM_PGA_E("HPOUT", SND_SOC_NOPM, 0, 0, NULL, 0, hp_event,
2512
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
2514
SND_SOC_DAPM_OUTPUT("HPOUTL"),
2515
SND_SOC_DAPM_OUTPUT("HPOUTR"),
2518
static const struct snd_soc_dapm_widget wm8962_dapm_spk_mono_widgets[] = {
2519
SND_SOC_DAPM_MIXER("Speaker Mixer", WM8962_MIXER_ENABLES, 1, 0,
2520
spkmixl, ARRAY_SIZE(spkmixl)),
2521
SND_SOC_DAPM_MUX_E("Speaker PGA", WM8962_PWR_MGMT_2, 4, 0, &spkoutl_mux,
2522
out_pga_event, SND_SOC_DAPM_POST_PMU),
2523
SND_SOC_DAPM_PGA("Speaker Output", WM8962_CLASS_D_CONTROL_1, 7, 0, NULL, 0),
2524
SND_SOC_DAPM_OUTPUT("SPKOUT"),
2527
static const struct snd_soc_dapm_widget wm8962_dapm_spk_stereo_widgets[] = {
2528
SND_SOC_DAPM_MIXER("SPKOUTL Mixer", WM8962_MIXER_ENABLES, 1, 0,
2529
spkmixl, ARRAY_SIZE(spkmixl)),
2530
SND_SOC_DAPM_MIXER("SPKOUTR Mixer", WM8962_MIXER_ENABLES, 0, 0,
2531
spkmixr, ARRAY_SIZE(spkmixr)),
2533
SND_SOC_DAPM_MUX_E("SPKOUTL PGA", WM8962_PWR_MGMT_2, 4, 0, &spkoutl_mux,
2534
out_pga_event, SND_SOC_DAPM_POST_PMU),
2535
SND_SOC_DAPM_MUX_E("SPKOUTR PGA", WM8962_PWR_MGMT_2, 3, 0, &spkoutr_mux,
2536
out_pga_event, SND_SOC_DAPM_POST_PMU),
2538
SND_SOC_DAPM_PGA("SPKOUTR Output", WM8962_CLASS_D_CONTROL_1, 7, 0, NULL, 0),
2539
SND_SOC_DAPM_PGA("SPKOUTL Output", WM8962_CLASS_D_CONTROL_1, 6, 0, NULL, 0),
2541
SND_SOC_DAPM_OUTPUT("SPKOUTL"),
2542
SND_SOC_DAPM_OUTPUT("SPKOUTR"),
2545
static const struct snd_soc_dapm_route wm8962_intercon[] = {
2546
{ "INPGAL", "IN1L Switch", "IN1L" },
2547
{ "INPGAL", "IN2L Switch", "IN2L" },
2548
{ "INPGAL", "IN3L Switch", "IN3L" },
2549
{ "INPGAL", "IN4L Switch", "IN4L" },
2551
{ "INPGAR", "IN1R Switch", "IN1R" },
2552
{ "INPGAR", "IN2R Switch", "IN2R" },
2553
{ "INPGAR", "IN3R Switch", "IN3R" },
2554
{ "INPGAR", "IN4R Switch", "IN4R" },
2556
{ "MIXINL", "IN2L Switch", "IN2L" },
2557
{ "MIXINL", "IN3L Switch", "IN3L" },
2558
{ "MIXINL", "PGA Switch", "INPGAL" },
2560
{ "MIXINR", "IN2R Switch", "IN2R" },
2561
{ "MIXINR", "IN3R Switch", "IN3R" },
2562
{ "MIXINR", "PGA Switch", "INPGAR" },
2564
{ "MICBIAS", NULL, "SYSCLK" },
2566
{ "ADCL", NULL, "SYSCLK" },
2567
{ "ADCL", NULL, "TOCLK" },
2568
{ "ADCL", NULL, "MIXINL" },
2570
{ "ADCR", NULL, "SYSCLK" },
2571
{ "ADCR", NULL, "TOCLK" },
2572
{ "ADCR", NULL, "MIXINR" },
2574
{ "STL", "Left", "ADCL" },
2575
{ "STL", "Right", "ADCR" },
2577
{ "STR", "Left", "ADCL" },
2578
{ "STR", "Right", "ADCR" },
2580
{ "DACL", NULL, "SYSCLK" },
2581
{ "DACL", NULL, "TOCLK" },
2582
{ "DACL", NULL, "Beep" },
2583
{ "DACL", NULL, "STL" },
2585
{ "DACR", NULL, "SYSCLK" },
2586
{ "DACR", NULL, "TOCLK" },
2587
{ "DACR", NULL, "Beep" },
2588
{ "DACR", NULL, "STR" },
2590
{ "HPMIXL", "IN4L Switch", "IN4L" },
2591
{ "HPMIXL", "IN4R Switch", "IN4R" },
2592
{ "HPMIXL", "DACL Switch", "DACL" },
2593
{ "HPMIXL", "DACR Switch", "DACR" },
2594
{ "HPMIXL", "MIXINL Switch", "MIXINL" },
2595
{ "HPMIXL", "MIXINR Switch", "MIXINR" },
2597
{ "HPMIXR", "IN4L Switch", "IN4L" },
2598
{ "HPMIXR", "IN4R Switch", "IN4R" },
2599
{ "HPMIXR", "DACL Switch", "DACL" },
2600
{ "HPMIXR", "DACR Switch", "DACR" },
2601
{ "HPMIXR", "MIXINL Switch", "MIXINL" },
2602
{ "HPMIXR", "MIXINR Switch", "MIXINR" },
2604
{ "Left Bypass", NULL, "HPMIXL" },
2605
{ "Left Bypass", NULL, "Class G" },
2607
{ "Right Bypass", NULL, "HPMIXR" },
2608
{ "Right Bypass", NULL, "Class G" },
2610
{ "HPOUTL PGA", "Mixer", "Left Bypass" },
2611
{ "HPOUTL PGA", "DAC", "DACL" },
2613
{ "HPOUTR PGA", "Mixer", "Right Bypass" },
2614
{ "HPOUTR PGA", "DAC", "DACR" },
2616
{ "HPOUT", NULL, "HPOUTL PGA" },
2617
{ "HPOUT", NULL, "HPOUTR PGA" },
2618
{ "HPOUT", NULL, "Charge Pump" },
2619
{ "HPOUT", NULL, "SYSCLK" },
2620
{ "HPOUT", NULL, "TOCLK" },
2622
{ "HPOUTL", NULL, "HPOUT" },
2623
{ "HPOUTR", NULL, "HPOUT" },
2626
static const struct snd_soc_dapm_route wm8962_spk_mono_intercon[] = {
2627
{ "Speaker Mixer", "IN4L Switch", "IN4L" },
2628
{ "Speaker Mixer", "IN4R Switch", "IN4R" },
2629
{ "Speaker Mixer", "DACL Switch", "DACL" },
2630
{ "Speaker Mixer", "DACR Switch", "DACR" },
2631
{ "Speaker Mixer", "MIXINL Switch", "MIXINL" },
2632
{ "Speaker Mixer", "MIXINR Switch", "MIXINR" },
2634
{ "Speaker PGA", "Mixer", "Speaker Mixer" },
2635
{ "Speaker PGA", "DAC", "DACL" },
2637
{ "Speaker Output", NULL, "Speaker PGA" },
2638
{ "Speaker Output", NULL, "SYSCLK" },
2639
{ "Speaker Output", NULL, "TOCLK" },
2641
{ "SPKOUT", NULL, "Speaker Output" },
2644
static const struct snd_soc_dapm_route wm8962_spk_stereo_intercon[] = {
2645
{ "SPKOUTL Mixer", "IN4L Switch", "IN4L" },
2646
{ "SPKOUTL Mixer", "IN4R Switch", "IN4R" },
2647
{ "SPKOUTL Mixer", "DACL Switch", "DACL" },
2648
{ "SPKOUTL Mixer", "DACR Switch", "DACR" },
2649
{ "SPKOUTL Mixer", "MIXINL Switch", "MIXINL" },
2650
{ "SPKOUTL Mixer", "MIXINR Switch", "MIXINR" },
2652
{ "SPKOUTR Mixer", "IN4L Switch", "IN4L" },
2653
{ "SPKOUTR Mixer", "IN4R Switch", "IN4R" },
2654
{ "SPKOUTR Mixer", "DACL Switch", "DACL" },
2655
{ "SPKOUTR Mixer", "DACR Switch", "DACR" },
2656
{ "SPKOUTR Mixer", "MIXINL Switch", "MIXINL" },
2657
{ "SPKOUTR Mixer", "MIXINR Switch", "MIXINR" },
2659
{ "SPKOUTL PGA", "Mixer", "SPKOUTL Mixer" },
2660
{ "SPKOUTL PGA", "DAC", "DACL" },
2662
{ "SPKOUTR PGA", "Mixer", "SPKOUTR Mixer" },
2663
{ "SPKOUTR PGA", "DAC", "DACR" },
2665
{ "SPKOUTL Output", NULL, "SPKOUTL PGA" },
2666
{ "SPKOUTL Output", NULL, "SYSCLK" },
2667
{ "SPKOUTL Output", NULL, "TOCLK" },
2669
{ "SPKOUTR Output", NULL, "SPKOUTR PGA" },
2670
{ "SPKOUTR Output", NULL, "SYSCLK" },
2671
{ "SPKOUTR Output", NULL, "TOCLK" },
2673
{ "SPKOUTL", NULL, "SPKOUTL Output" },
2674
{ "SPKOUTR", NULL, "SPKOUTR Output" },
2677
static int wm8962_add_widgets(struct snd_soc_codec *codec)
2679
struct wm8962_pdata *pdata = dev_get_platdata(codec->dev);
2680
struct snd_soc_dapm_context *dapm = &codec->dapm;
2682
snd_soc_add_controls(codec, wm8962_snd_controls,
2683
ARRAY_SIZE(wm8962_snd_controls));
2684
if (pdata && pdata->spk_mono)
2685
snd_soc_add_controls(codec, wm8962_spk_mono_controls,
2686
ARRAY_SIZE(wm8962_spk_mono_controls));
2688
snd_soc_add_controls(codec, wm8962_spk_stereo_controls,
2689
ARRAY_SIZE(wm8962_spk_stereo_controls));
2692
snd_soc_dapm_new_controls(dapm, wm8962_dapm_widgets,
2693
ARRAY_SIZE(wm8962_dapm_widgets));
2694
if (pdata && pdata->spk_mono)
2695
snd_soc_dapm_new_controls(dapm, wm8962_dapm_spk_mono_widgets,
2696
ARRAY_SIZE(wm8962_dapm_spk_mono_widgets));
2698
snd_soc_dapm_new_controls(dapm, wm8962_dapm_spk_stereo_widgets,
2699
ARRAY_SIZE(wm8962_dapm_spk_stereo_widgets));
2701
snd_soc_dapm_add_routes(dapm, wm8962_intercon,
2702
ARRAY_SIZE(wm8962_intercon));
2703
if (pdata && pdata->spk_mono)
2704
snd_soc_dapm_add_routes(dapm, wm8962_spk_mono_intercon,
2705
ARRAY_SIZE(wm8962_spk_mono_intercon));
2707
snd_soc_dapm_add_routes(dapm, wm8962_spk_stereo_intercon,
2708
ARRAY_SIZE(wm8962_spk_stereo_intercon));
2711
snd_soc_dapm_disable_pin(dapm, "Beep");
2716
static void wm8962_sync_cache(struct snd_soc_codec *codec)
2718
u16 *reg_cache = codec->reg_cache;
2721
if (!codec->cache_sync)
2724
dev_dbg(codec->dev, "Syncing cache\n");
2726
codec->cache_only = 0;
2728
/* Sync back cached values if they're different from the
2731
for (i = 1; i < codec->driver->reg_cache_size; i++) {
2732
if (i == WM8962_SOFTWARE_RESET)
2734
if (reg_cache[i] == wm8962_reg[i])
2737
snd_soc_write(codec, i, reg_cache[i]);
2740
codec->cache_sync = 0;
2743
/* -1 for reserved values */
2744
static const int bclk_divs[] = {
2745
1, -1, 2, 3, 4, -1, 6, 8, -1, 12, 16, 24, -1, 32, 32, 32
2748
static void wm8962_configure_bclk(struct snd_soc_codec *codec)
2750
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
2755
if (!wm8962->bclk) {
2756
dev_dbg(codec->dev, "No BCLK rate configured\n");
2760
dspclk = snd_soc_read(codec, WM8962_CLOCKING1);
2762
dev_err(codec->dev, "Failed to read DSPCLK: %d\n", dspclk);
2766
dspclk = (dspclk & WM8962_DSPCLK_DIV_MASK) >> WM8962_DSPCLK_DIV_SHIFT;
2769
dspclk = wm8962->sysclk_rate;
2772
dspclk = wm8962->sysclk_rate / 2;
2775
dspclk = wm8962->sysclk_rate / 4;
2778
dev_warn(codec->dev, "Unknown DSPCLK divisor read back\n");
2779
dspclk = wm8962->sysclk;
2782
dev_dbg(codec->dev, "DSPCLK is %dHz, BCLK %d\n", dspclk, wm8962->bclk);
2784
/* We're expecting an exact match */
2785
for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) {
2786
if (bclk_divs[i] < 0)
2789
if (dspclk / bclk_divs[i] == wm8962->bclk) {
2790
dev_dbg(codec->dev, "Selected BCLK_DIV %d for %dHz\n",
2791
bclk_divs[i], wm8962->bclk);
2796
if (i == ARRAY_SIZE(bclk_divs)) {
2797
dev_err(codec->dev, "Unsupported BCLK ratio %d\n",
2798
dspclk / wm8962->bclk);
2802
aif2 |= wm8962->bclk / wm8962->lrclk;
2803
dev_dbg(codec->dev, "Selected LRCLK divisor %d for %dHz\n",
2804
wm8962->bclk / wm8962->lrclk, wm8962->lrclk);
2806
snd_soc_update_bits(codec, WM8962_CLOCKING2,
2807
WM8962_BCLK_DIV_MASK, clocking2);
2808
snd_soc_update_bits(codec, WM8962_AUDIO_INTERFACE_2,
2809
WM8962_AIF_RATE_MASK, aif2);
2812
static int wm8962_set_bias_level(struct snd_soc_codec *codec,
2813
enum snd_soc_bias_level level)
2815
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
2818
if (level == codec->dapm.bias_level)
2822
case SND_SOC_BIAS_ON:
2825
case SND_SOC_BIAS_PREPARE:
2827
snd_soc_update_bits(codec, WM8962_PWR_MGMT_1,
2828
WM8962_VMID_SEL_MASK, 0x80);
2831
case SND_SOC_BIAS_STANDBY:
2832
if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
2833
ret = regulator_bulk_enable(ARRAY_SIZE(wm8962->supplies),
2837
"Failed to enable supplies: %d\n",
2842
wm8962_sync_cache(codec);
2844
snd_soc_update_bits(codec, WM8962_ANTI_POP,
2845
WM8962_STARTUP_BIAS_ENA |
2846
WM8962_VMID_BUF_ENA,
2847
WM8962_STARTUP_BIAS_ENA |
2848
WM8962_VMID_BUF_ENA);
2850
/* Bias enable at 2*50k for ramp */
2851
snd_soc_update_bits(codec, WM8962_PWR_MGMT_1,
2852
WM8962_VMID_SEL_MASK |
2854
WM8962_BIAS_ENA | 0x180);
2858
snd_soc_update_bits(codec, WM8962_CLOCKING2,
2862
wm8962_configure_bclk(codec);
2866
snd_soc_update_bits(codec, WM8962_PWR_MGMT_1,
2867
WM8962_VMID_SEL_MASK, 0x100);
2870
case SND_SOC_BIAS_OFF:
2871
snd_soc_update_bits(codec, WM8962_PWR_MGMT_1,
2872
WM8962_VMID_SEL_MASK | WM8962_BIAS_ENA, 0);
2874
snd_soc_update_bits(codec, WM8962_ANTI_POP,
2875
WM8962_STARTUP_BIAS_ENA |
2876
WM8962_VMID_BUF_ENA, 0);
2878
regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies),
2882
codec->dapm.bias_level = level;
2886
static const struct {
2903
static const int sysclk_rates[] = {
2904
64, 128, 192, 256, 384, 512, 768, 1024, 1408, 1536,
2907
static int wm8962_hw_params(struct snd_pcm_substream *substream,
2908
struct snd_pcm_hw_params *params,
2909
struct snd_soc_dai *dai)
2911
struct snd_soc_pcm_runtime *rtd = substream->private_data;
2912
struct snd_soc_codec *codec = rtd->codec;
2913
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
2914
int rate = params_rate(params);
2920
wm8962->bclk = snd_soc_params_to_bclk(params);
2921
wm8962->lrclk = params_rate(params);
2923
for (i = 0; i < ARRAY_SIZE(sr_vals); i++) {
2924
if (sr_vals[i].rate == rate) {
2925
adctl3 |= sr_vals[i].reg;
2929
if (i == ARRAY_SIZE(sr_vals)) {
2930
dev_err(codec->dev, "Unsupported rate %dHz\n", rate);
2934
if (rate % 8000 == 0)
2935
adctl3 |= WM8962_SAMPLE_RATE_INT_MODE;
2937
for (i = 0; i < ARRAY_SIZE(sysclk_rates); i++) {
2938
if (sysclk_rates[i] == wm8962->sysclk_rate / rate) {
2939
clocking4 |= i << WM8962_SYSCLK_RATE_SHIFT;
2943
if (i == ARRAY_SIZE(sysclk_rates)) {
2944
dev_err(codec->dev, "Unsupported sysclk ratio %d\n",
2945
wm8962->sysclk_rate / rate);
2949
switch (params_format(params)) {
2950
case SNDRV_PCM_FORMAT_S16_LE:
2952
case SNDRV_PCM_FORMAT_S20_3LE:
2955
case SNDRV_PCM_FORMAT_S24_LE:
2958
case SNDRV_PCM_FORMAT_S32_LE:
2965
snd_soc_update_bits(codec, WM8962_AUDIO_INTERFACE_0,
2966
WM8962_WL_MASK, aif0);
2967
snd_soc_update_bits(codec, WM8962_ADDITIONAL_CONTROL_3,
2968
WM8962_SAMPLE_RATE_INT_MODE |
2969
WM8962_SAMPLE_RATE_MASK, adctl3);
2970
snd_soc_update_bits(codec, WM8962_CLOCKING_4,
2971
WM8962_SYSCLK_RATE_MASK, clocking4);
2973
wm8962_configure_bclk(codec);
2978
static int wm8962_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
2979
unsigned int freq, int dir)
2981
struct snd_soc_codec *codec = dai->codec;
2982
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
2986
case WM8962_SYSCLK_MCLK:
2987
wm8962->sysclk = WM8962_SYSCLK_MCLK;
2990
case WM8962_SYSCLK_FLL:
2991
wm8962->sysclk = WM8962_SYSCLK_FLL;
2992
src = 1 << WM8962_SYSCLK_SRC_SHIFT;
2993
WARN_ON(freq != wm8962->fll_fout);
2999
snd_soc_update_bits(codec, WM8962_CLOCKING2, WM8962_SYSCLK_SRC_MASK,
3002
wm8962->sysclk_rate = freq;
3007
static int wm8962_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
3009
struct snd_soc_codec *codec = dai->codec;
3012
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
3013
case SND_SOC_DAIFMT_DSP_A:
3014
aif0 |= WM8962_LRCLK_INV;
3015
case SND_SOC_DAIFMT_DSP_B:
3018
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
3019
case SND_SOC_DAIFMT_NB_NF:
3020
case SND_SOC_DAIFMT_IB_NF:
3027
case SND_SOC_DAIFMT_RIGHT_J:
3029
case SND_SOC_DAIFMT_LEFT_J:
3032
case SND_SOC_DAIFMT_I2S:
3039
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
3040
case SND_SOC_DAIFMT_NB_NF:
3042
case SND_SOC_DAIFMT_IB_NF:
3043
aif0 |= WM8962_BCLK_INV;
3045
case SND_SOC_DAIFMT_NB_IF:
3046
aif0 |= WM8962_LRCLK_INV;
3048
case SND_SOC_DAIFMT_IB_IF:
3049
aif0 |= WM8962_BCLK_INV | WM8962_LRCLK_INV;
3055
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
3056
case SND_SOC_DAIFMT_CBM_CFM:
3057
aif0 |= WM8962_MSTR;
3059
case SND_SOC_DAIFMT_CBS_CFS:
3065
snd_soc_update_bits(codec, WM8962_AUDIO_INTERFACE_0,
3066
WM8962_FMT_MASK | WM8962_BCLK_INV | WM8962_MSTR |
3067
WM8962_LRCLK_INV, aif0);
3081
/* The size in bits of the FLL divide multiplied by 10
3082
* to allow rounding later */
3083
#define FIXED_FLL_SIZE ((1 << 16) * 10)
3091
{ 0, 64000, 4, 16 },
3092
{ 64000, 128000, 3, 8 },
3093
{ 128000, 256000, 2, 4 },
3094
{ 256000, 1000000, 1, 2 },
3095
{ 1000000, 13500000, 0, 1 },
3098
static int fll_factors(struct _fll_div *fll_div, unsigned int Fref,
3101
unsigned int target;
3103
unsigned int fratio, gcd_fll;
3106
/* Fref must be <=13.5MHz */
3108
fll_div->fll_refclk_div = 0;
3109
while ((Fref / div) > 13500000) {
3111
fll_div->fll_refclk_div++;
3114
pr_err("Can't scale %dMHz input down to <=13.5MHz\n",
3120
pr_debug("FLL Fref=%u Fout=%u\n", Fref, Fout);
3122
/* Apply the division for our remaining calculations */
3125
/* Fvco should be 90-100MHz; don't check the upper bound */
3127
while (Fout * div < 90000000) {
3130
pr_err("Unable to find FLL_OUTDIV for Fout=%uHz\n",
3135
target = Fout * div;
3136
fll_div->fll_outdiv = div - 1;
3138
pr_debug("FLL Fvco=%dHz\n", target);
3140
/* Find an appropraite FLL_FRATIO and factor it out of the target */
3141
for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) {
3142
if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) {
3143
fll_div->fll_fratio = fll_fratios[i].fll_fratio;
3144
fratio = fll_fratios[i].ratio;
3148
if (i == ARRAY_SIZE(fll_fratios)) {
3149
pr_err("Unable to find FLL_FRATIO for Fref=%uHz\n", Fref);
3153
fll_div->n = target / (fratio * Fref);
3155
if (target % Fref == 0) {
3157
fll_div->lambda = 0;
3159
gcd_fll = gcd(target, fratio * Fref);
3161
fll_div->theta = (target - (fll_div->n * fratio * Fref))
3163
fll_div->lambda = (fratio * Fref) / gcd_fll;
3166
pr_debug("FLL N=%x THETA=%x LAMBDA=%x\n",
3167
fll_div->n, fll_div->theta, fll_div->lambda);
3168
pr_debug("FLL_FRATIO=%x FLL_OUTDIV=%x FLL_REFCLK_DIV=%x\n",
3169
fll_div->fll_fratio, fll_div->fll_outdiv,
3170
fll_div->fll_refclk_div);
3175
static int wm8962_set_fll(struct snd_soc_dai *dai, int fll_id, int source,
3176
unsigned int Fref, unsigned int Fout)
3178
struct snd_soc_codec *codec = dai->codec;
3179
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
3180
struct _fll_div fll_div;
3182
int fll1 = snd_soc_read(codec, WM8962_FLL_CONTROL_1) & WM8962_FLL_ENA;
3185
if (source == wm8962->fll_src && Fref == wm8962->fll_fref &&
3186
Fout == wm8962->fll_fout)
3190
dev_dbg(codec->dev, "FLL disabled\n");
3192
wm8962->fll_fref = 0;
3193
wm8962->fll_fout = 0;
3195
snd_soc_update_bits(codec, WM8962_FLL_CONTROL_1,
3201
ret = fll_factors(&fll_div, Fref, Fout);
3206
case WM8962_FLL_MCLK:
3207
case WM8962_FLL_BCLK:
3208
case WM8962_FLL_OSC:
3209
fll1 |= (fll_id - 1) << WM8962_FLL_REFCLK_SRC_SHIFT;
3211
case WM8962_FLL_INT:
3212
snd_soc_update_bits(codec, WM8962_FLL_CONTROL_1,
3213
WM8962_FLL_OSC_ENA, WM8962_FLL_OSC_ENA);
3214
snd_soc_update_bits(codec, WM8962_FLL_CONTROL_5,
3215
WM8962_FLL_FRC_NCO, WM8962_FLL_FRC_NCO);
3218
dev_err(codec->dev, "Unknown FLL source %d\n", ret);
3222
if (fll_div.theta || fll_div.lambda)
3223
fll1 |= WM8962_FLL_FRAC;
3225
/* Stop the FLL while we reconfigure */
3226
snd_soc_update_bits(codec, WM8962_FLL_CONTROL_1, WM8962_FLL_ENA, 0);
3228
snd_soc_update_bits(codec, WM8962_FLL_CONTROL_2,
3229
WM8962_FLL_OUTDIV_MASK |
3230
WM8962_FLL_REFCLK_DIV_MASK,
3231
(fll_div.fll_outdiv << WM8962_FLL_OUTDIV_SHIFT) |
3232
(fll_div.fll_refclk_div));
3234
snd_soc_update_bits(codec, WM8962_FLL_CONTROL_3,
3235
WM8962_FLL_FRATIO_MASK, fll_div.fll_fratio);
3237
snd_soc_write(codec, WM8962_FLL_CONTROL_6, fll_div.theta);
3238
snd_soc_write(codec, WM8962_FLL_CONTROL_7, fll_div.lambda);
3239
snd_soc_write(codec, WM8962_FLL_CONTROL_8, fll_div.n);
3241
snd_soc_update_bits(codec, WM8962_FLL_CONTROL_1,
3242
WM8962_FLL_FRAC | WM8962_FLL_REFCLK_SRC_MASK |
3243
WM8962_FLL_ENA, fll1);
3245
dev_dbg(codec->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout);
3247
wm8962->fll_fref = Fref;
3248
wm8962->fll_fout = Fout;
3249
wm8962->fll_src = source;
3254
static int wm8962_mute(struct snd_soc_dai *dai, int mute)
3256
struct snd_soc_codec *codec = dai->codec;
3260
val = WM8962_DAC_MUTE;
3264
return snd_soc_update_bits(codec, WM8962_ADC_DAC_CONTROL_1,
3265
WM8962_DAC_MUTE, val);
3268
#define WM8962_RATES SNDRV_PCM_RATE_8000_96000
3270
#define WM8962_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
3271
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
3273
static struct snd_soc_dai_ops wm8962_dai_ops = {
3274
.hw_params = wm8962_hw_params,
3275
.set_sysclk = wm8962_set_dai_sysclk,
3276
.set_fmt = wm8962_set_dai_fmt,
3277
.set_pll = wm8962_set_fll,
3278
.digital_mute = wm8962_mute,
3281
static struct snd_soc_dai_driver wm8962_dai = {
3284
.stream_name = "Playback",
3287
.rates = WM8962_RATES,
3288
.formats = WM8962_FORMATS,
3291
.stream_name = "Capture",
3294
.rates = WM8962_RATES,
3295
.formats = WM8962_FORMATS,
3297
.ops = &wm8962_dai_ops,
3298
.symmetric_rates = 1,
3301
static void wm8962_mic_work(struct work_struct *work)
3303
struct wm8962_priv *wm8962 = container_of(work,
3306
struct snd_soc_codec *codec = wm8962->codec;
3311
reg = snd_soc_read(codec, WM8962_ADDITIONAL_CONTROL_4);
3313
if (reg & WM8962_MICDET_STS) {
3314
status |= SND_JACK_MICROPHONE;
3315
irq_pol |= WM8962_MICD_IRQ_POL;
3318
if (reg & WM8962_MICSHORT_STS) {
3319
status |= SND_JACK_BTN_0;
3320
irq_pol |= WM8962_MICSCD_IRQ_POL;
3323
snd_soc_jack_report(wm8962->jack, status,
3324
SND_JACK_MICROPHONE | SND_JACK_BTN_0);
3326
snd_soc_update_bits(codec, WM8962_MICINT_SOURCE_POL,
3327
WM8962_MICSCD_IRQ_POL |
3328
WM8962_MICD_IRQ_POL, irq_pol);
3331
static irqreturn_t wm8962_irq(int irq, void *data)
3333
struct snd_soc_codec *codec = data;
3334
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
3338
mask = snd_soc_read(codec, WM8962_INTERRUPT_STATUS_2_MASK);
3340
active = snd_soc_read(codec, WM8962_INTERRUPT_STATUS_2);
3343
if (active & WM8962_FIFOS_ERR_EINT)
3344
dev_err(codec->dev, "FIFO error\n");
3346
if (active & WM8962_TEMP_SHUT_EINT)
3347
dev_crit(codec->dev, "Thermal shutdown\n");
3349
if (active & (WM8962_MICSCD_EINT | WM8962_MICD_EINT)) {
3350
dev_dbg(codec->dev, "Microphone event detected\n");
3352
#ifndef CONFIG_SND_SOC_WM8962_MODULE
3353
trace_snd_soc_jack_irq(dev_name(codec->dev));
3356
pm_wakeup_event(codec->dev, 300);
3358
schedule_delayed_work(&wm8962->mic_work,
3359
msecs_to_jiffies(250));
3362
/* Acknowledge the interrupts */
3363
snd_soc_write(codec, WM8962_INTERRUPT_STATUS_2, active);
3369
* wm8962_mic_detect - Enable microphone detection via the WM8962 IRQ
3371
* @codec: WM8962 codec
3372
* @jack: jack to report detection events on
3374
* Enable microphone detection via IRQ on the WM8962. If GPIOs are
3375
* being used to bring out signals to the processor then only platform
3376
* data configuration is needed for WM8962 and processor GPIOs should
3377
* be configured using snd_soc_jack_add_gpios() instead.
3379
* If no jack is supplied detection will be disabled.
3381
int wm8962_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack)
3383
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
3384
int irq_mask, enable;
3386
wm8962->jack = jack;
3389
enable = WM8962_MICDET_ENA;
3391
irq_mask = WM8962_MICD_EINT | WM8962_MICSCD_EINT;
3395
snd_soc_update_bits(codec, WM8962_INTERRUPT_STATUS_2_MASK,
3396
WM8962_MICD_EINT | WM8962_MICSCD_EINT, irq_mask);
3397
snd_soc_update_bits(codec, WM8962_ADDITIONAL_CONTROL_4,
3398
WM8962_MICDET_ENA, enable);
3400
/* Send an initial empty report */
3401
snd_soc_jack_report(wm8962->jack, 0,
3402
SND_JACK_MICROPHONE | SND_JACK_BTN_0);
3406
EXPORT_SYMBOL_GPL(wm8962_mic_detect);
3409
static int wm8962_resume(struct snd_soc_codec *codec)
3411
u16 *reg_cache = codec->reg_cache;
3414
/* Restore the registers */
3415
for (i = 1; i < codec->driver->reg_cache_size; i++) {
3417
case WM8962_SOFTWARE_RESET:
3423
if (reg_cache[i] != wm8962_reg[i])
3424
snd_soc_write(codec, i, reg_cache[i]);
3430
#define wm8962_resume NULL
3433
#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
3434
static int beep_rates[] = {
3435
500, 1000, 2000, 4000,
3438
static void wm8962_beep_work(struct work_struct *work)
3440
struct wm8962_priv *wm8962 =
3441
container_of(work, struct wm8962_priv, beep_work);
3442
struct snd_soc_codec *codec = wm8962->codec;
3443
struct snd_soc_dapm_context *dapm = &codec->dapm;
3448
if (wm8962->beep_rate) {
3449
for (i = 0; i < ARRAY_SIZE(beep_rates); i++) {
3450
if (abs(wm8962->beep_rate - beep_rates[i]) <
3451
abs(wm8962->beep_rate - beep_rates[best]))
3455
dev_dbg(codec->dev, "Set beep rate %dHz for requested %dHz\n",
3456
beep_rates[best], wm8962->beep_rate);
3458
reg = WM8962_BEEP_ENA | (best << WM8962_BEEP_RATE_SHIFT);
3460
snd_soc_dapm_enable_pin(dapm, "Beep");
3462
dev_dbg(codec->dev, "Disabling beep\n");
3463
snd_soc_dapm_disable_pin(dapm, "Beep");
3466
snd_soc_update_bits(codec, WM8962_BEEP_GENERATOR_1,
3467
WM8962_BEEP_ENA | WM8962_BEEP_RATE_MASK, reg);
3469
snd_soc_dapm_sync(dapm);
3472
/* For usability define a way of injecting beep events for the device -
3473
* many systems will not have a keyboard.
3475
static int wm8962_beep_event(struct input_dev *dev, unsigned int type,
3476
unsigned int code, int hz)
3478
struct snd_soc_codec *codec = input_get_drvdata(dev);
3479
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
3481
dev_dbg(codec->dev, "Beep event %x %x\n", code, hz);
3493
/* Kick the beep from a workqueue */
3494
wm8962->beep_rate = hz;
3495
schedule_work(&wm8962->beep_work);
3499
static ssize_t wm8962_beep_set(struct device *dev,
3500
struct device_attribute *attr,
3501
const char *buf, size_t count)
3503
struct wm8962_priv *wm8962 = dev_get_drvdata(dev);
3507
ret = strict_strtol(buf, 10, &time);
3511
input_event(wm8962->beep, EV_SND, SND_TONE, time);
3516
static DEVICE_ATTR(beep, 0200, NULL, wm8962_beep_set);
3518
static void wm8962_init_beep(struct snd_soc_codec *codec)
3520
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
3523
wm8962->beep = input_allocate_device();
3524
if (!wm8962->beep) {
3525
dev_err(codec->dev, "Failed to allocate beep device\n");
3529
INIT_WORK(&wm8962->beep_work, wm8962_beep_work);
3530
wm8962->beep_rate = 0;
3532
wm8962->beep->name = "WM8962 Beep Generator";
3533
wm8962->beep->phys = dev_name(codec->dev);
3534
wm8962->beep->id.bustype = BUS_I2C;
3536
wm8962->beep->evbit[0] = BIT_MASK(EV_SND);
3537
wm8962->beep->sndbit[0] = BIT_MASK(SND_BELL) | BIT_MASK(SND_TONE);
3538
wm8962->beep->event = wm8962_beep_event;
3539
wm8962->beep->dev.parent = codec->dev;
3540
input_set_drvdata(wm8962->beep, codec);
3542
ret = input_register_device(wm8962->beep);
3544
input_free_device(wm8962->beep);
3545
wm8962->beep = NULL;
3546
dev_err(codec->dev, "Failed to register beep device\n");
3549
ret = device_create_file(codec->dev, &dev_attr_beep);
3551
dev_err(codec->dev, "Failed to create keyclick file: %d\n",
3556
static void wm8962_free_beep(struct snd_soc_codec *codec)
3558
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
3560
device_remove_file(codec->dev, &dev_attr_beep);
3561
input_unregister_device(wm8962->beep);
3562
cancel_work_sync(&wm8962->beep_work);
3563
wm8962->beep = NULL;
3565
snd_soc_update_bits(codec, WM8962_BEEP_GENERATOR_1, WM8962_BEEP_ENA,0);
3568
static void wm8962_init_beep(struct snd_soc_codec *codec)
3572
static void wm8962_free_beep(struct snd_soc_codec *codec)
3577
static void wm8962_set_gpio_mode(struct snd_soc_codec *codec, int gpio)
3582
/* Some of the GPIOs are behind MFP configuration and need to
3583
* be put into GPIO mode. */
3586
mask = WM8962_CLKOUT2_SEL_MASK;
3587
val = 1 << WM8962_CLKOUT2_SEL_SHIFT;
3590
mask = WM8962_CLKOUT3_SEL_MASK;
3591
val = 1 << WM8962_CLKOUT3_SEL_SHIFT;
3598
snd_soc_update_bits(codec, WM8962_ANALOGUE_CLOCKING1,
3602
#ifdef CONFIG_GPIOLIB
3603
static inline struct wm8962_priv *gpio_to_wm8962(struct gpio_chip *chip)
3605
return container_of(chip, struct wm8962_priv, gpio_chip);
3608
static int wm8962_gpio_request(struct gpio_chip *chip, unsigned offset)
3610
struct wm8962_priv *wm8962 = gpio_to_wm8962(chip);
3611
struct snd_soc_codec *codec = wm8962->codec;
3613
/* The WM8962 GPIOs aren't linearly numbered. For simplicity
3614
* we export linear numbers and error out if the unsupported
3615
* ones are requsted.
3617
switch (offset + 1) {
3627
wm8962_set_gpio_mode(codec, offset + 1);
3632
static void wm8962_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
3634
struct wm8962_priv *wm8962 = gpio_to_wm8962(chip);
3635
struct snd_soc_codec *codec = wm8962->codec;
3637
snd_soc_update_bits(codec, WM8962_GPIO_BASE + offset,
3638
WM8962_GP2_LVL, value << WM8962_GP2_LVL_SHIFT);
3641
static int wm8962_gpio_direction_out(struct gpio_chip *chip,
3642
unsigned offset, int value)
3644
struct wm8962_priv *wm8962 = gpio_to_wm8962(chip);
3645
struct snd_soc_codec *codec = wm8962->codec;
3648
/* Force function 1 (logic output) */
3649
val = (1 << WM8962_GP2_FN_SHIFT) | (value << WM8962_GP2_LVL_SHIFT);
3651
return snd_soc_update_bits(codec, WM8962_GPIO_BASE + offset,
3652
WM8962_GP2_FN_MASK | WM8962_GP2_LVL, val);
3655
static struct gpio_chip wm8962_template_chip = {
3657
.owner = THIS_MODULE,
3658
.request = wm8962_gpio_request,
3659
.direction_output = wm8962_gpio_direction_out,
3660
.set = wm8962_gpio_set,
3664
static void wm8962_init_gpio(struct snd_soc_codec *codec)
3666
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
3667
struct wm8962_pdata *pdata = dev_get_platdata(codec->dev);
3670
wm8962->gpio_chip = wm8962_template_chip;
3671
wm8962->gpio_chip.ngpio = WM8962_MAX_GPIO;
3672
wm8962->gpio_chip.dev = codec->dev;
3674
if (pdata && pdata->gpio_base)
3675
wm8962->gpio_chip.base = pdata->gpio_base;
3677
wm8962->gpio_chip.base = -1;
3679
ret = gpiochip_add(&wm8962->gpio_chip);
3681
dev_err(codec->dev, "Failed to add GPIOs: %d\n", ret);
3684
static void wm8962_free_gpio(struct snd_soc_codec *codec)
3686
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
3689
ret = gpiochip_remove(&wm8962->gpio_chip);
3691
dev_err(codec->dev, "Failed to remove GPIOs: %d\n", ret);
3694
static void wm8962_init_gpio(struct snd_soc_codec *codec)
3698
static void wm8962_free_gpio(struct snd_soc_codec *codec)
3703
static int wm8962_probe(struct snd_soc_codec *codec)
3706
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
3707
struct wm8962_pdata *pdata = dev_get_platdata(codec->dev);
3708
struct i2c_client *i2c = container_of(codec->dev, struct i2c_client,
3710
u16 *reg_cache = codec->reg_cache;
3711
int i, trigger, irq_pol;
3713
wm8962->codec = codec;
3714
INIT_DELAYED_WORK(&wm8962->mic_work, wm8962_mic_work);
3716
codec->cache_sync = 1;
3717
codec->dapm.idle_bias_off = 1;
3719
ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_I2C);
3721
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
3725
for (i = 0; i < ARRAY_SIZE(wm8962->supplies); i++)
3726
wm8962->supplies[i].supply = wm8962_supply_names[i];
3728
ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8962->supplies),
3731
dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
3735
wm8962->disable_nb[0].notifier_call = wm8962_regulator_event_0;
3736
wm8962->disable_nb[1].notifier_call = wm8962_regulator_event_1;
3737
wm8962->disable_nb[2].notifier_call = wm8962_regulator_event_2;
3738
wm8962->disable_nb[3].notifier_call = wm8962_regulator_event_3;
3739
wm8962->disable_nb[4].notifier_call = wm8962_regulator_event_4;
3740
wm8962->disable_nb[5].notifier_call = wm8962_regulator_event_5;
3741
wm8962->disable_nb[6].notifier_call = wm8962_regulator_event_6;
3742
wm8962->disable_nb[7].notifier_call = wm8962_regulator_event_7;
3744
/* This should really be moved into the regulator core */
3745
for (i = 0; i < ARRAY_SIZE(wm8962->supplies); i++) {
3746
ret = regulator_register_notifier(wm8962->supplies[i].consumer,
3747
&wm8962->disable_nb[i]);
3750
"Failed to register regulator notifier: %d\n",
3755
ret = regulator_bulk_enable(ARRAY_SIZE(wm8962->supplies),
3758
dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
3762
ret = snd_soc_read(codec, WM8962_SOFTWARE_RESET);
3764
dev_err(codec->dev, "Failed to read ID register\n");
3767
if (ret != wm8962_reg[WM8962_SOFTWARE_RESET]) {
3768
dev_err(codec->dev, "Device is not a WM8962, ID %x != %x\n",
3769
ret, wm8962_reg[WM8962_SOFTWARE_RESET]);
3774
ret = snd_soc_read(codec, WM8962_RIGHT_INPUT_VOLUME);
3776
dev_err(codec->dev, "Failed to read device revision: %d\n",
3781
dev_info(codec->dev, "customer id %x revision %c\n",
3782
(ret & WM8962_CUST_ID_MASK) >> WM8962_CUST_ID_SHIFT,
3783
((ret & WM8962_CHIP_REV_MASK) >> WM8962_CHIP_REV_SHIFT)
3786
ret = wm8962_reset(codec);
3788
dev_err(codec->dev, "Failed to issue reset\n");
3792
/* SYSCLK defaults to on; make sure it is off so we can safely
3793
* write to registers if the device is declocked.
3795
snd_soc_update_bits(codec, WM8962_CLOCKING2, WM8962_SYSCLK_ENA, 0);
3797
regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies);
3800
/* Apply static configuration for GPIOs */
3801
for (i = 0; i < ARRAY_SIZE(pdata->gpio_init); i++)
3802
if (pdata->gpio_init[i]) {
3803
wm8962_set_gpio_mode(codec, i + 1);
3804
snd_soc_write(codec, 0x200 + i,
3805
pdata->gpio_init[i] & 0xffff);
3808
/* Put the speakers into mono mode? */
3809
if (pdata->spk_mono)
3810
reg_cache[WM8962_CLASS_D_CONTROL_2]
3813
/* Micbias setup, detection enable and detection
3816
snd_soc_update_bits(codec, WM8962_ADDITIONAL_CONTROL_4,
3818
WM8962_MICDET_THR_MASK |
3819
WM8962_MICSHORT_THR_MASK |
3824
/* Latch volume update bits */
3825
snd_soc_update_bits(codec, WM8962_LEFT_INPUT_VOLUME,
3826
WM8962_IN_VU, WM8962_IN_VU);
3827
snd_soc_update_bits(codec, WM8962_RIGHT_INPUT_VOLUME,
3828
WM8962_IN_VU, WM8962_IN_VU);
3829
snd_soc_update_bits(codec, WM8962_LEFT_ADC_VOLUME,
3830
WM8962_ADC_VU, WM8962_ADC_VU);
3831
snd_soc_update_bits(codec, WM8962_RIGHT_ADC_VOLUME,
3832
WM8962_ADC_VU, WM8962_ADC_VU);
3833
snd_soc_update_bits(codec, WM8962_LEFT_DAC_VOLUME,
3834
WM8962_DAC_VU, WM8962_DAC_VU);
3835
snd_soc_update_bits(codec, WM8962_RIGHT_DAC_VOLUME,
3836
WM8962_DAC_VU, WM8962_DAC_VU);
3837
snd_soc_update_bits(codec, WM8962_SPKOUTL_VOLUME,
3838
WM8962_SPKOUT_VU, WM8962_SPKOUT_VU);
3839
snd_soc_update_bits(codec, WM8962_SPKOUTR_VOLUME,
3840
WM8962_SPKOUT_VU, WM8962_SPKOUT_VU);
3841
snd_soc_update_bits(codec, WM8962_HPOUTL_VOLUME,
3842
WM8962_HPOUT_VU, WM8962_HPOUT_VU);
3843
snd_soc_update_bits(codec, WM8962_HPOUTR_VOLUME,
3844
WM8962_HPOUT_VU, WM8962_HPOUT_VU);
3846
wm8962_add_widgets(codec);
3848
wm8962_init_beep(codec);
3849
wm8962_init_gpio(codec);
3852
if (pdata && pdata->irq_active_low) {
3853
trigger = IRQF_TRIGGER_LOW;
3854
irq_pol = WM8962_IRQ_POL;
3856
trigger = IRQF_TRIGGER_HIGH;
3860
snd_soc_update_bits(codec, WM8962_INTERRUPT_CONTROL,
3861
WM8962_IRQ_POL, irq_pol);
3863
ret = request_threaded_irq(i2c->irq, NULL, wm8962_irq,
3864
trigger | IRQF_ONESHOT,
3867
dev_err(codec->dev, "Failed to request IRQ %d: %d\n",
3871
/* Enable error reporting IRQs by default */
3872
snd_soc_update_bits(codec,
3873
WM8962_INTERRUPT_STATUS_2_MASK,
3874
WM8962_TEMP_SHUT_EINT |
3875
WM8962_FIFOS_ERR_EINT, 0);
3882
regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies);
3884
regulator_bulk_free(ARRAY_SIZE(wm8962->supplies), wm8962->supplies);
3889
static int wm8962_remove(struct snd_soc_codec *codec)
3891
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
3892
struct i2c_client *i2c = container_of(codec->dev, struct i2c_client,
3897
free_irq(i2c->irq, codec);
3899
cancel_delayed_work_sync(&wm8962->mic_work);
3901
wm8962_free_gpio(codec);
3902
wm8962_free_beep(codec);
3903
for (i = 0; i < ARRAY_SIZE(wm8962->supplies); i++)
3904
regulator_unregister_notifier(wm8962->supplies[i].consumer,
3905
&wm8962->disable_nb[i]);
3906
regulator_bulk_free(ARRAY_SIZE(wm8962->supplies), wm8962->supplies);
3911
static struct snd_soc_codec_driver soc_codec_dev_wm8962 = {
3912
.probe = wm8962_probe,
3913
.remove = wm8962_remove,
3914
.resume = wm8962_resume,
3915
.set_bias_level = wm8962_set_bias_level,
3916
.reg_cache_size = WM8962_MAX_REGISTER + 1,
3917
.reg_word_size = sizeof(u16),
3918
.reg_cache_default = wm8962_reg,
3919
.volatile_register = wm8962_volatile_register,
3920
.readable_register = wm8962_readable_register,
3923
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
3924
static __devinit int wm8962_i2c_probe(struct i2c_client *i2c,
3925
const struct i2c_device_id *id)
3927
struct wm8962_priv *wm8962;
3930
wm8962 = kzalloc(sizeof(struct wm8962_priv), GFP_KERNEL);
3934
i2c_set_clientdata(i2c, wm8962);
3936
ret = snd_soc_register_codec(&i2c->dev,
3937
&soc_codec_dev_wm8962, &wm8962_dai, 1);
3944
static __devexit int wm8962_i2c_remove(struct i2c_client *client)
3946
snd_soc_unregister_codec(&client->dev);
3947
kfree(i2c_get_clientdata(client));
3951
static const struct i2c_device_id wm8962_i2c_id[] = {
3955
MODULE_DEVICE_TABLE(i2c, wm8962_i2c_id);
3957
static struct i2c_driver wm8962_i2c_driver = {
3960
.owner = THIS_MODULE,
3962
.probe = wm8962_i2c_probe,
3963
.remove = __devexit_p(wm8962_i2c_remove),
3964
.id_table = wm8962_i2c_id,
3968
static int __init wm8962_modinit(void)
3971
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
3972
ret = i2c_add_driver(&wm8962_i2c_driver);
3974
printk(KERN_ERR "Failed to register WM8962 I2C driver: %d\n",
3980
module_init(wm8962_modinit);
3982
static void __exit wm8962_exit(void)
3984
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
3985
i2c_del_driver(&wm8962_i2c_driver);
3988
module_exit(wm8962_exit);
3990
MODULE_DESCRIPTION("ASoC WM8962 driver");
3991
MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
3992
MODULE_LICENSE("GPL");