← Back to branch summary

~ubuntu-branches/ubuntu/precise/alsa-driver/precise

« back to all changes in this revision

Viewing changes to alsa-kernel/soc/codecs/wm9090.h

  • Committer: Bazaar Package Importer
  • Author(s): Luke Yelavich
  • Date: 2011-02-21 18:06:40 UTC
  • mfrom: (1.1.15 upstream)
  • Revision ID: james.westby@ubuntu.com-20110221180640-a8p2yxtvgf7xbxub
Tags: 1.0.24+dfsg-0ubuntu1
* New upstream release
* Refreshed patches:
  - distinguish_kernel_makefile_and_source_dirs.patch
  - debian_dfsg_configure.patch
* debian/control: Update Vcs-bzr field to point to new branch location

Show diffs side-by-side

added added

removed removed

Lines of Context:
alsa-kernel/soc/codecs/wm9090.h
 
1
/*
 
2
 * ALSA SoC WM9090 driver
 
3
 *
 
4
 * Copyright 2009 Wolfson Microelectronics
 
5
 *
 
6
 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
 
7
 *
 
8
 * This program is free software; you can redistribute it and/or
 
9
 * modify it under the terms of the GNU General Public License
 
10
 * version 2 as published by the Free Software Foundation.
 
11
 *
 
12
 * This program is distributed in the hope that it will be useful, but
 
13
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 
14
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 
15
 * General Public License for more details.
 
16
 *
 
17
 * You should have received a copy of the GNU General Public License
 
18
 * along with this program; if not, write to the Free Software
 
19
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 
20
 * 02110-1301 USA
 
21
 */
 
22
 
 
23
#ifndef __WM9090_H
 
24
#define __WM9090_H
 
25
 
 
26
/*
 
27
 * Register values.
 
28
 */
 
29
#define WM9090_SOFTWARE_RESET                   0x00
 
30
#define WM9090_POWER_MANAGEMENT_1               0x01
 
31
#define WM9090_POWER_MANAGEMENT_2               0x02
 
32
#define WM9090_POWER_MANAGEMENT_3               0x03
 
33
#define WM9090_CLOCKING_1                       0x06
 
34
#define WM9090_IN1_LINE_CONTROL                 0x16
 
35
#define WM9090_IN2_LINE_CONTROL                 0x17
 
36
#define WM9090_IN1_LINE_INPUT_A_VOLUME          0x18
 
37
#define WM9090_IN1_LINE_INPUT_B_VOLUME          0x19
 
38
#define WM9090_IN2_LINE_INPUT_A_VOLUME          0x1A
 
39
#define WM9090_IN2_LINE_INPUT_B_VOLUME          0x1B
 
40
#define WM9090_LEFT_OUTPUT_VOLUME               0x1C
 
41
#define WM9090_RIGHT_OUTPUT_VOLUME              0x1D
 
42
#define WM9090_SPKMIXL_ATTENUATION              0x22
 
43
#define WM9090_SPKOUT_MIXERS                    0x24
 
44
#define WM9090_CLASSD3                          0x25
 
45
#define WM9090_SPEAKER_VOLUME_LEFT              0x26
 
46
#define WM9090_OUTPUT_MIXER1                    0x2D
 
47
#define WM9090_OUTPUT_MIXER2                    0x2E
 
48
#define WM9090_OUTPUT_MIXER3                    0x2F
 
49
#define WM9090_OUTPUT_MIXER4                    0x30
 
50
#define WM9090_SPEAKER_MIXER                    0x36
 
51
#define WM9090_ANTIPOP2                         0x39
 
52
#define WM9090_WRITE_SEQUENCER_0                0x46
 
53
#define WM9090_WRITE_SEQUENCER_1                0x47
 
54
#define WM9090_WRITE_SEQUENCER_2                0x48
 
55
#define WM9090_WRITE_SEQUENCER_3                0x49
 
56
#define WM9090_WRITE_SEQUENCER_4                0x4A
 
57
#define WM9090_WRITE_SEQUENCER_5                0x4B
 
58
#define WM9090_CHARGE_PUMP_1                    0x4C
 
59
#define WM9090_DC_SERVO_0                       0x54
 
60
#define WM9090_DC_SERVO_1                       0x55
 
61
#define WM9090_DC_SERVO_3                       0x57
 
62
#define WM9090_DC_SERVO_READBACK_0              0x58
 
63
#define WM9090_DC_SERVO_READBACK_1              0x59
 
64
#define WM9090_DC_SERVO_READBACK_2              0x5A
 
65
#define WM9090_ANALOGUE_HP_0                    0x60
 
66
#define WM9090_AGC_CONTROL_0                    0x62
 
67
#define WM9090_AGC_CONTROL_1                    0x63
 
68
#define WM9090_AGC_CONTROL_2                    0x64
 
69
 
 
70
#define WM9090_REGISTER_COUNT                   40
 
71
#define WM9090_MAX_REGISTER                     0x64
 
72
 
 
73
/*
 
74
 * Field Definitions.
 
75
 */
 
76
 
 
77
/*
 
78
 * R0 (0x00) - Software Reset
 
79
 */
 
80
#define WM9090_SW_RESET_MASK                    0xFFFF  /* SW_RESET - [15:0] */
 
81
#define WM9090_SW_RESET_SHIFT                        0  /* SW_RESET - [15:0] */
 
82
#define WM9090_SW_RESET_WIDTH                       16  /* SW_RESET - [15:0] */
 
83
 
 
84
/*
 
85
 * R1 (0x01) - Power Management (1)
 
86
 */
 
87
#define WM9090_SPKOUTL_ENA                      0x1000  /* SPKOUTL_ENA */
 
88
#define WM9090_SPKOUTL_ENA_MASK                 0x1000  /* SPKOUTL_ENA */
 
89
#define WM9090_SPKOUTL_ENA_SHIFT                    12  /* SPKOUTL_ENA */
 
90
#define WM9090_SPKOUTL_ENA_WIDTH                     1  /* SPKOUTL_ENA */
 
91
#define WM9090_HPOUT1L_ENA                      0x0200  /* HPOUT1L_ENA */
 
92
#define WM9090_HPOUT1L_ENA_MASK                 0x0200  /* HPOUT1L_ENA */
 
93
#define WM9090_HPOUT1L_ENA_SHIFT                     9  /* HPOUT1L_ENA */
 
94
#define WM9090_HPOUT1L_ENA_WIDTH                     1  /* HPOUT1L_ENA */
 
95
#define WM9090_HPOUT1R_ENA                      0x0100  /* HPOUT1R_ENA */
 
96
#define WM9090_HPOUT1R_ENA_MASK                 0x0100  /* HPOUT1R_ENA */
 
97
#define WM9090_HPOUT1R_ENA_SHIFT                     8  /* HPOUT1R_ENA */
 
98
#define WM9090_HPOUT1R_ENA_WIDTH                     1  /* HPOUT1R_ENA */
 
99
#define WM9090_OSC_ENA                          0x0008  /* OSC_ENA */
 
100
#define WM9090_OSC_ENA_MASK                     0x0008  /* OSC_ENA */
 
101
#define WM9090_OSC_ENA_SHIFT                         3  /* OSC_ENA */
 
102
#define WM9090_OSC_ENA_WIDTH                         1  /* OSC_ENA */
 
103
#define WM9090_VMID_RES_MASK                    0x0006  /* VMID_RES - [2:1] */
 
104
#define WM9090_VMID_RES_SHIFT                        1  /* VMID_RES - [2:1] */
 
105
#define WM9090_VMID_RES_WIDTH                        2  /* VMID_RES - [2:1] */
 
106
#define WM9090_BIAS_ENA                         0x0001  /* BIAS_ENA */
 
107
#define WM9090_BIAS_ENA_MASK                    0x0001  /* BIAS_ENA */
 
108
#define WM9090_BIAS_ENA_SHIFT                        0  /* BIAS_ENA */
 
109
#define WM9090_BIAS_ENA_WIDTH                        1  /* BIAS_ENA */
 
110
 
 
111
/*
 
112
 * R2 (0x02) - Power Management (2)
 
113
 */
 
114
#define WM9090_TSHUT                            0x8000  /* TSHUT */
 
115
#define WM9090_TSHUT_MASK                       0x8000  /* TSHUT */
 
116
#define WM9090_TSHUT_SHIFT                          15  /* TSHUT */
 
117
#define WM9090_TSHUT_WIDTH                           1  /* TSHUT */
 
118
#define WM9090_TSHUT_ENA                        0x4000  /* TSHUT_ENA */
 
119
#define WM9090_TSHUT_ENA_MASK                   0x4000  /* TSHUT_ENA */
 
120
#define WM9090_TSHUT_ENA_SHIFT                      14  /* TSHUT_ENA */
 
121
#define WM9090_TSHUT_ENA_WIDTH                       1  /* TSHUT_ENA */
 
122
#define WM9090_TSHUT_OPDIS                      0x2000  /* TSHUT_OPDIS */
 
123
#define WM9090_TSHUT_OPDIS_MASK                 0x2000  /* TSHUT_OPDIS */
 
124
#define WM9090_TSHUT_OPDIS_SHIFT                    13  /* TSHUT_OPDIS */
 
125
#define WM9090_TSHUT_OPDIS_WIDTH                     1  /* TSHUT_OPDIS */
 
126
#define WM9090_IN1A_ENA                         0x0080  /* IN1A_ENA */
 
127
#define WM9090_IN1A_ENA_MASK                    0x0080  /* IN1A_ENA */
 
128
#define WM9090_IN1A_ENA_SHIFT                        7  /* IN1A_ENA */
 
129
#define WM9090_IN1A_ENA_WIDTH                        1  /* IN1A_ENA */
 
130
#define WM9090_IN1B_ENA                         0x0040  /* IN1B_ENA */
 
131
#define WM9090_IN1B_ENA_MASK                    0x0040  /* IN1B_ENA */
 
132
#define WM9090_IN1B_ENA_SHIFT                        6  /* IN1B_ENA */
 
133
#define WM9090_IN1B_ENA_WIDTH                        1  /* IN1B_ENA */
 
134
#define WM9090_IN2A_ENA                         0x0020  /* IN2A_ENA */
 
135
#define WM9090_IN2A_ENA_MASK                    0x0020  /* IN2A_ENA */
 
136
#define WM9090_IN2A_ENA_SHIFT                        5  /* IN2A_ENA */
 
137
#define WM9090_IN2A_ENA_WIDTH                        1  /* IN2A_ENA */
 
138
#define WM9090_IN2B_ENA                         0x0010  /* IN2B_ENA */
 
139
#define WM9090_IN2B_ENA_MASK                    0x0010  /* IN2B_ENA */
 
140
#define WM9090_IN2B_ENA_SHIFT                        4  /* IN2B_ENA */
 
141
#define WM9090_IN2B_ENA_WIDTH                        1  /* IN2B_ENA */
 
142
 
 
143
/*
 
144
 * R3 (0x03) - Power Management (3)
 
145
 */
 
146
#define WM9090_AGC_ENA                          0x4000  /* AGC_ENA */
 
147
#define WM9090_AGC_ENA_MASK                     0x4000  /* AGC_ENA */
 
148
#define WM9090_AGC_ENA_SHIFT                        14  /* AGC_ENA */
 
149
#define WM9090_AGC_ENA_WIDTH                         1  /* AGC_ENA */
 
150
#define WM9090_SPKLVOL_ENA                      0x0100  /* SPKLVOL_ENA */
 
151
#define WM9090_SPKLVOL_ENA_MASK                 0x0100  /* SPKLVOL_ENA */
 
152
#define WM9090_SPKLVOL_ENA_SHIFT                     8  /* SPKLVOL_ENA */
 
153
#define WM9090_SPKLVOL_ENA_WIDTH                     1  /* SPKLVOL_ENA */
 
154
#define WM9090_MIXOUTL_ENA                      0x0020  /* MIXOUTL_ENA */
 
155
#define WM9090_MIXOUTL_ENA_MASK                 0x0020  /* MIXOUTL_ENA */
 
156
#define WM9090_MIXOUTL_ENA_SHIFT                     5  /* MIXOUTL_ENA */
 
157
#define WM9090_MIXOUTL_ENA_WIDTH                     1  /* MIXOUTL_ENA */
 
158
#define WM9090_MIXOUTR_ENA                      0x0010  /* MIXOUTR_ENA */
 
159
#define WM9090_MIXOUTR_ENA_MASK                 0x0010  /* MIXOUTR_ENA */
 
160
#define WM9090_MIXOUTR_ENA_SHIFT                     4  /* MIXOUTR_ENA */
 
161
#define WM9090_MIXOUTR_ENA_WIDTH                     1  /* MIXOUTR_ENA */
 
162
#define WM9090_SPKMIX_ENA                       0x0008  /* SPKMIX_ENA */
 
163
#define WM9090_SPKMIX_ENA_MASK                  0x0008  /* SPKMIX_ENA */
 
164
#define WM9090_SPKMIX_ENA_SHIFT                      3  /* SPKMIX_ENA */
 
165
#define WM9090_SPKMIX_ENA_WIDTH                      1  /* SPKMIX_ENA */
 
166
 
 
167
/*
 
168
 * R6 (0x06) - Clocking 1
 
169
 */
 
170
#define WM9090_TOCLK_RATE                       0x8000  /* TOCLK_RATE */
 
171
#define WM9090_TOCLK_RATE_MASK                  0x8000  /* TOCLK_RATE */
 
172
#define WM9090_TOCLK_RATE_SHIFT                     15  /* TOCLK_RATE */
 
173
#define WM9090_TOCLK_RATE_WIDTH                      1  /* TOCLK_RATE */
 
174
#define WM9090_TOCLK_ENA                        0x4000  /* TOCLK_ENA */
 
175
#define WM9090_TOCLK_ENA_MASK                   0x4000  /* TOCLK_ENA */
 
176
#define WM9090_TOCLK_ENA_SHIFT                      14  /* TOCLK_ENA */
 
177
#define WM9090_TOCLK_ENA_WIDTH                       1  /* TOCLK_ENA */
 
178
 
 
179
/*
 
180
 * R22 (0x16) - IN1 Line Control
 
181
 */
 
182
#define WM9090_IN1_DIFF                         0x0002  /* IN1_DIFF */
 
183
#define WM9090_IN1_DIFF_MASK                    0x0002  /* IN1_DIFF */
 
184
#define WM9090_IN1_DIFF_SHIFT                        1  /* IN1_DIFF */
 
185
#define WM9090_IN1_DIFF_WIDTH                        1  /* IN1_DIFF */
 
186
#define WM9090_IN1_CLAMP                        0x0001  /* IN1_CLAMP */
 
187
#define WM9090_IN1_CLAMP_MASK                   0x0001  /* IN1_CLAMP */
 
188
#define WM9090_IN1_CLAMP_SHIFT                       0  /* IN1_CLAMP */
 
189
#define WM9090_IN1_CLAMP_WIDTH                       1  /* IN1_CLAMP */
 
190
 
 
191
/*
 
192
 * R23 (0x17) - IN2 Line Control
 
193
 */
 
194
#define WM9090_IN2_DIFF                         0x0002  /* IN2_DIFF */
 
195
#define WM9090_IN2_DIFF_MASK                    0x0002  /* IN2_DIFF */
 
196
#define WM9090_IN2_DIFF_SHIFT                        1  /* IN2_DIFF */
 
197
#define WM9090_IN2_DIFF_WIDTH                        1  /* IN2_DIFF */
 
198
#define WM9090_IN2_CLAMP                        0x0001  /* IN2_CLAMP */
 
199
#define WM9090_IN2_CLAMP_MASK                   0x0001  /* IN2_CLAMP */
 
200
#define WM9090_IN2_CLAMP_SHIFT                       0  /* IN2_CLAMP */
 
201
#define WM9090_IN2_CLAMP_WIDTH                       1  /* IN2_CLAMP */
 
202
 
 
203
/*
 
204
 * R24 (0x18) - IN1 Line Input A Volume
 
205
 */
 
206
#define WM9090_IN1_VU                           0x0100  /* IN1_VU */
 
207
#define WM9090_IN1_VU_MASK                      0x0100  /* IN1_VU */
 
208
#define WM9090_IN1_VU_SHIFT                          8  /* IN1_VU */
 
209
#define WM9090_IN1_VU_WIDTH                          1  /* IN1_VU */
 
210
#define WM9090_IN1A_MUTE                        0x0080  /* IN1A_MUTE */
 
211
#define WM9090_IN1A_MUTE_MASK                   0x0080  /* IN1A_MUTE */
 
212
#define WM9090_IN1A_MUTE_SHIFT                       7  /* IN1A_MUTE */
 
213
#define WM9090_IN1A_MUTE_WIDTH                       1  /* IN1A_MUTE */
 
214
#define WM9090_IN1A_ZC                          0x0040  /* IN1A_ZC */
 
215
#define WM9090_IN1A_ZC_MASK                     0x0040  /* IN1A_ZC */
 
216
#define WM9090_IN1A_ZC_SHIFT                         6  /* IN1A_ZC */
 
217
#define WM9090_IN1A_ZC_WIDTH                         1  /* IN1A_ZC */
 
218
#define WM9090_IN1A_VOL_MASK                    0x0007  /* IN1A_VOL - [2:0] */
 
219
#define WM9090_IN1A_VOL_SHIFT                        0  /* IN1A_VOL - [2:0] */
 
220
#define WM9090_IN1A_VOL_WIDTH                        3  /* IN1A_VOL - [2:0] */
 
221
 
 
222
/*
 
223
 * R25 (0x19) - IN1  Line Input B Volume
 
224
 */
 
225
#define WM9090_IN1_VU                           0x0100  /* IN1_VU */
 
226
#define WM9090_IN1_VU_MASK                      0x0100  /* IN1_VU */
 
227
#define WM9090_IN1_VU_SHIFT                          8  /* IN1_VU */
 
228
#define WM9090_IN1_VU_WIDTH                          1  /* IN1_VU */
 
229
#define WM9090_IN1B_MUTE                        0x0080  /* IN1B_MUTE */
 
230
#define WM9090_IN1B_MUTE_MASK                   0x0080  /* IN1B_MUTE */
 
231
#define WM9090_IN1B_MUTE_SHIFT                       7  /* IN1B_MUTE */
 
232
#define WM9090_IN1B_MUTE_WIDTH                       1  /* IN1B_MUTE */
 
233
#define WM9090_IN1B_ZC                          0x0040  /* IN1B_ZC */
 
234
#define WM9090_IN1B_ZC_MASK                     0x0040  /* IN1B_ZC */
 
235
#define WM9090_IN1B_ZC_SHIFT                         6  /* IN1B_ZC */
 
236
#define WM9090_IN1B_ZC_WIDTH                         1  /* IN1B_ZC */
 
237
#define WM9090_IN1B_VOL_MASK                    0x0007  /* IN1B_VOL - [2:0] */
 
238
#define WM9090_IN1B_VOL_SHIFT                        0  /* IN1B_VOL - [2:0] */
 
239
#define WM9090_IN1B_VOL_WIDTH                        3  /* IN1B_VOL - [2:0] */
 
240
 
 
241
/*
 
242
 * R26 (0x1A) - IN2 Line Input A Volume
 
243
 */
 
244
#define WM9090_IN2_VU                           0x0100  /* IN2_VU */
 
245
#define WM9090_IN2_VU_MASK                      0x0100  /* IN2_VU */
 
246
#define WM9090_IN2_VU_SHIFT                          8  /* IN2_VU */
 
247
#define WM9090_IN2_VU_WIDTH                          1  /* IN2_VU */
 
248
#define WM9090_IN2A_MUTE                        0x0080  /* IN2A_MUTE */
 
249
#define WM9090_IN2A_MUTE_MASK                   0x0080  /* IN2A_MUTE */
 
250
#define WM9090_IN2A_MUTE_SHIFT                       7  /* IN2A_MUTE */
 
251
#define WM9090_IN2A_MUTE_WIDTH                       1  /* IN2A_MUTE */
 
252
#define WM9090_IN2A_ZC                          0x0040  /* IN2A_ZC */
 
253
#define WM9090_IN2A_ZC_MASK                     0x0040  /* IN2A_ZC */
 
254
#define WM9090_IN2A_ZC_SHIFT                         6  /* IN2A_ZC */
 
255
#define WM9090_IN2A_ZC_WIDTH                         1  /* IN2A_ZC */
 
256
#define WM9090_IN2A_VOL_MASK                    0x0007  /* IN2A_VOL - [2:0] */
 
257
#define WM9090_IN2A_VOL_SHIFT                        0  /* IN2A_VOL - [2:0] */
 
258
#define WM9090_IN2A_VOL_WIDTH                        3  /* IN2A_VOL - [2:0] */
 
259
 
 
260
/*
 
261
 * R27 (0x1B) - IN2 Line Input B Volume
 
262
 */
 
263
#define WM9090_IN2_VU                           0x0100  /* IN2_VU */
 
264
#define WM9090_IN2_VU_MASK                      0x0100  /* IN2_VU */
 
265
#define WM9090_IN2_VU_SHIFT                          8  /* IN2_VU */
 
266
#define WM9090_IN2_VU_WIDTH                          1  /* IN2_VU */
 
267
#define WM9090_IN2B_MUTE                        0x0080  /* IN2B_MUTE */
 
268
#define WM9090_IN2B_MUTE_MASK                   0x0080  /* IN2B_MUTE */
 
269
#define WM9090_IN2B_MUTE_SHIFT                       7  /* IN2B_MUTE */
 
270
#define WM9090_IN2B_MUTE_WIDTH                       1  /* IN2B_MUTE */
 
271
#define WM9090_IN2B_ZC                          0x0040  /* IN2B_ZC */
 
272
#define WM9090_IN2B_ZC_MASK                     0x0040  /* IN2B_ZC */
 
273
#define WM9090_IN2B_ZC_SHIFT                         6  /* IN2B_ZC */
 
274
#define WM9090_IN2B_ZC_WIDTH                         1  /* IN2B_ZC */
 
275
#define WM9090_IN2B_VOL_MASK                    0x0007  /* IN2B_VOL - [2:0] */
 
276
#define WM9090_IN2B_VOL_SHIFT                        0  /* IN2B_VOL - [2:0] */
 
277
#define WM9090_IN2B_VOL_WIDTH                        3  /* IN2B_VOL - [2:0] */
 
278
 
 
279
/*
 
280
 * R28 (0x1C) - Left Output Volume
 
281
 */
 
282
#define WM9090_HPOUT1_VU                        0x0100  /* HPOUT1_VU */
 
283
#define WM9090_HPOUT1_VU_MASK                   0x0100  /* HPOUT1_VU */
 
284
#define WM9090_HPOUT1_VU_SHIFT                       8  /* HPOUT1_VU */
 
285
#define WM9090_HPOUT1_VU_WIDTH                       1  /* HPOUT1_VU */
 
286
#define WM9090_HPOUT1L_ZC                       0x0080  /* HPOUT1L_ZC */
 
287
#define WM9090_HPOUT1L_ZC_MASK                  0x0080  /* HPOUT1L_ZC */
 
288
#define WM9090_HPOUT1L_ZC_SHIFT                      7  /* HPOUT1L_ZC */
 
289
#define WM9090_HPOUT1L_ZC_WIDTH                      1  /* HPOUT1L_ZC */
 
290
#define WM9090_HPOUT1L_MUTE                     0x0040  /* HPOUT1L_MUTE */
 
291
#define WM9090_HPOUT1L_MUTE_MASK                0x0040  /* HPOUT1L_MUTE */
 
292
#define WM9090_HPOUT1L_MUTE_SHIFT                    6  /* HPOUT1L_MUTE */
 
293
#define WM9090_HPOUT1L_MUTE_WIDTH                    1  /* HPOUT1L_MUTE */
 
294
#define WM9090_HPOUT1L_VOL_MASK                 0x003F  /* HPOUT1L_VOL - [5:0] */
 
295
#define WM9090_HPOUT1L_VOL_SHIFT                     0  /* HPOUT1L_VOL - [5:0] */
 
296
#define WM9090_HPOUT1L_VOL_WIDTH                     6  /* HPOUT1L_VOL - [5:0] */
 
297
 
 
298
/*
 
299
 * R29 (0x1D) - Right Output Volume
 
300
 */
 
301
#define WM9090_HPOUT1_VU                        0x0100  /* HPOUT1_VU */
 
302
#define WM9090_HPOUT1_VU_MASK                   0x0100  /* HPOUT1_VU */
 
303
#define WM9090_HPOUT1_VU_SHIFT                       8  /* HPOUT1_VU */
 
304
#define WM9090_HPOUT1_VU_WIDTH                       1  /* HPOUT1_VU */
 
305
#define WM9090_HPOUT1R_ZC                       0x0080  /* HPOUT1R_ZC */
 
306
#define WM9090_HPOUT1R_ZC_MASK                  0x0080  /* HPOUT1R_ZC */
 
307
#define WM9090_HPOUT1R_ZC_SHIFT                      7  /* HPOUT1R_ZC */
 
308
#define WM9090_HPOUT1R_ZC_WIDTH                      1  /* HPOUT1R_ZC */
 
309
#define WM9090_HPOUT1R_MUTE                     0x0040  /* HPOUT1R_MUTE */
 
310
#define WM9090_HPOUT1R_MUTE_MASK                0x0040  /* HPOUT1R_MUTE */
 
311
#define WM9090_HPOUT1R_MUTE_SHIFT                    6  /* HPOUT1R_MUTE */
 
312
#define WM9090_HPOUT1R_MUTE_WIDTH                    1  /* HPOUT1R_MUTE */
 
313
#define WM9090_HPOUT1R_VOL_MASK                 0x003F  /* HPOUT1R_VOL - [5:0] */
 
314
#define WM9090_HPOUT1R_VOL_SHIFT                     0  /* HPOUT1R_VOL - [5:0] */
 
315
#define WM9090_HPOUT1R_VOL_WIDTH                     6  /* HPOUT1R_VOL - [5:0] */
 
316
 
 
317
/*
 
318
 * R34 (0x22) - SPKMIXL Attenuation
 
319
 */
 
320
#define WM9090_SPKMIX_MUTE                      0x0100  /* SPKMIX_MUTE */
 
321
#define WM9090_SPKMIX_MUTE_MASK                 0x0100  /* SPKMIX_MUTE */
 
322
#define WM9090_SPKMIX_MUTE_SHIFT                     8  /* SPKMIX_MUTE */
 
323
#define WM9090_SPKMIX_MUTE_WIDTH                     1  /* SPKMIX_MUTE */
 
324
#define WM9090_IN1A_SPKMIX_VOL_MASK             0x00C0  /* IN1A_SPKMIX_VOL - [7:6] */
 
325
#define WM9090_IN1A_SPKMIX_VOL_SHIFT                 6  /* IN1A_SPKMIX_VOL - [7:6] */
 
326
#define WM9090_IN1A_SPKMIX_VOL_WIDTH                 2  /* IN1A_SPKMIX_VOL - [7:6] */
 
327
#define WM9090_IN1B_SPKMIX_VOL_MASK             0x0030  /* IN1B_SPKMIX_VOL - [5:4] */
 
328
#define WM9090_IN1B_SPKMIX_VOL_SHIFT                 4  /* IN1B_SPKMIX_VOL - [5:4] */
 
329
#define WM9090_IN1B_SPKMIX_VOL_WIDTH                 2  /* IN1B_SPKMIX_VOL - [5:4] */
 
330
#define WM9090_IN2A_SPKMIX_VOL_MASK             0x000C  /* IN2A_SPKMIX_VOL - [3:2] */
 
331
#define WM9090_IN2A_SPKMIX_VOL_SHIFT                 2  /* IN2A_SPKMIX_VOL - [3:2] */
 
332
#define WM9090_IN2A_SPKMIX_VOL_WIDTH                 2  /* IN2A_SPKMIX_VOL - [3:2] */
 
333
#define WM9090_IN2B_SPKMIX_VOL_MASK             0x0003  /* IN2B_SPKMIX_VOL - [1:0] */
 
334
#define WM9090_IN2B_SPKMIX_VOL_SHIFT                 0  /* IN2B_SPKMIX_VOL - [1:0] */
 
335
#define WM9090_IN2B_SPKMIX_VOL_WIDTH                 2  /* IN2B_SPKMIX_VOL - [1:0] */
 
336
 
 
337
/*
 
338
 * R36 (0x24) - SPKOUT Mixers
 
339
 */
 
340
#define WM9090_SPKMIXL_TO_SPKOUTL               0x0010  /* SPKMIXL_TO_SPKOUTL */
 
341
#define WM9090_SPKMIXL_TO_SPKOUTL_MASK          0x0010  /* SPKMIXL_TO_SPKOUTL */
 
342
#define WM9090_SPKMIXL_TO_SPKOUTL_SHIFT              4  /* SPKMIXL_TO_SPKOUTL */
 
343
#define WM9090_SPKMIXL_TO_SPKOUTL_WIDTH              1  /* SPKMIXL_TO_SPKOUTL */
 
344
 
 
345
/*
 
346
 * R37 (0x25) - ClassD3
 
347
 */
 
348
#define WM9090_SPKOUTL_BOOST_MASK               0x0038  /* SPKOUTL_BOOST - [5:3] */
 
349
#define WM9090_SPKOUTL_BOOST_SHIFT                   3  /* SPKOUTL_BOOST - [5:3] */
 
350
#define WM9090_SPKOUTL_BOOST_WIDTH                   3  /* SPKOUTL_BOOST - [5:3] */
 
351
 
 
352
/*
 
353
 * R38 (0x26) - Speaker Volume Left
 
354
 */
 
355
#define WM9090_SPKOUT_VU                        0x0100  /* SPKOUT_VU */
 
356
#define WM9090_SPKOUT_VU_MASK                   0x0100  /* SPKOUT_VU */
 
357
#define WM9090_SPKOUT_VU_SHIFT                       8  /* SPKOUT_VU */
 
358
#define WM9090_SPKOUT_VU_WIDTH                       1  /* SPKOUT_VU */
 
359
#define WM9090_SPKOUTL_ZC                       0x0080  /* SPKOUTL_ZC */
 
360
#define WM9090_SPKOUTL_ZC_MASK                  0x0080  /* SPKOUTL_ZC */
 
361
#define WM9090_SPKOUTL_ZC_SHIFT                      7  /* SPKOUTL_ZC */
 
362
#define WM9090_SPKOUTL_ZC_WIDTH                      1  /* SPKOUTL_ZC */
 
363
#define WM9090_SPKOUTL_MUTE                     0x0040  /* SPKOUTL_MUTE */
 
364
#define WM9090_SPKOUTL_MUTE_MASK                0x0040  /* SPKOUTL_MUTE */
 
365
#define WM9090_SPKOUTL_MUTE_SHIFT                    6  /* SPKOUTL_MUTE */
 
366
#define WM9090_SPKOUTL_MUTE_WIDTH                    1  /* SPKOUTL_MUTE */
 
367
#define WM9090_SPKOUTL_VOL_MASK                 0x003F  /* SPKOUTL_VOL - [5:0] */
 
368
#define WM9090_SPKOUTL_VOL_SHIFT                     0  /* SPKOUTL_VOL - [5:0] */
 
369
#define WM9090_SPKOUTL_VOL_WIDTH                     6  /* SPKOUTL_VOL - [5:0] */
 
370
 
 
371
/*
 
372
 * R45 (0x2D) - Output Mixer1
 
373
 */
 
374
#define WM9090_IN1A_TO_MIXOUTL                  0x0040  /* IN1A_TO_MIXOUTL */
 
375
#define WM9090_IN1A_TO_MIXOUTL_MASK             0x0040  /* IN1A_TO_MIXOUTL */
 
376
#define WM9090_IN1A_TO_MIXOUTL_SHIFT                 6  /* IN1A_TO_MIXOUTL */
 
377
#define WM9090_IN1A_TO_MIXOUTL_WIDTH                 1  /* IN1A_TO_MIXOUTL */
 
378
#define WM9090_IN2A_TO_MIXOUTL                  0x0004  /* IN2A_TO_MIXOUTL */
 
379
#define WM9090_IN2A_TO_MIXOUTL_MASK             0x0004  /* IN2A_TO_MIXOUTL */
 
380
#define WM9090_IN2A_TO_MIXOUTL_SHIFT                 2  /* IN2A_TO_MIXOUTL */
 
381
#define WM9090_IN2A_TO_MIXOUTL_WIDTH                 1  /* IN2A_TO_MIXOUTL */
 
382
 
 
383
/*
 
384
 * R46 (0x2E) - Output Mixer2
 
385
 */
 
386
#define WM9090_IN1A_TO_MIXOUTR                  0x0040  /* IN1A_TO_MIXOUTR */
 
387
#define WM9090_IN1A_TO_MIXOUTR_MASK             0x0040  /* IN1A_TO_MIXOUTR */
 
388
#define WM9090_IN1A_TO_MIXOUTR_SHIFT                 6  /* IN1A_TO_MIXOUTR */
 
389
#define WM9090_IN1A_TO_MIXOUTR_WIDTH                 1  /* IN1A_TO_MIXOUTR */
 
390
#define WM9090_IN1B_TO_MIXOUTR                  0x0010  /* IN1B_TO_MIXOUTR */
 
391
#define WM9090_IN1B_TO_MIXOUTR_MASK             0x0010  /* IN1B_TO_MIXOUTR */
 
392
#define WM9090_IN1B_TO_MIXOUTR_SHIFT                 4  /* IN1B_TO_MIXOUTR */
 
393
#define WM9090_IN1B_TO_MIXOUTR_WIDTH                 1  /* IN1B_TO_MIXOUTR */
 
394
#define WM9090_IN2A_TO_MIXOUTR                  0x0004  /* IN2A_TO_MIXOUTR */
 
395
#define WM9090_IN2A_TO_MIXOUTR_MASK             0x0004  /* IN2A_TO_MIXOUTR */
 
396
#define WM9090_IN2A_TO_MIXOUTR_SHIFT                 2  /* IN2A_TO_MIXOUTR */
 
397
#define WM9090_IN2A_TO_MIXOUTR_WIDTH                 1  /* IN2A_TO_MIXOUTR */
 
398
#define WM9090_IN2B_TO_MIXOUTR                  0x0001  /* IN2B_TO_MIXOUTR */
 
399
#define WM9090_IN2B_TO_MIXOUTR_MASK             0x0001  /* IN2B_TO_MIXOUTR */
 
400
#define WM9090_IN2B_TO_MIXOUTR_SHIFT                 0  /* IN2B_TO_MIXOUTR */
 
401
#define WM9090_IN2B_TO_MIXOUTR_WIDTH                 1  /* IN2B_TO_MIXOUTR */
 
402
 
 
403
/*
 
404
 * R47 (0x2F) - Output Mixer3
 
405
 */
 
406
#define WM9090_MIXOUTL_MUTE                     0x0100  /* MIXOUTL_MUTE */
 
407
#define WM9090_MIXOUTL_MUTE_MASK                0x0100  /* MIXOUTL_MUTE */
 
408
#define WM9090_MIXOUTL_MUTE_SHIFT                    8  /* MIXOUTL_MUTE */
 
409
#define WM9090_MIXOUTL_MUTE_WIDTH                    1  /* MIXOUTL_MUTE */
 
410
#define WM9090_IN1A_MIXOUTL_VOL_MASK            0x00C0  /* IN1A_MIXOUTL_VOL - [7:6] */
 
411
#define WM9090_IN1A_MIXOUTL_VOL_SHIFT                6  /* IN1A_MIXOUTL_VOL - [7:6] */
 
412
#define WM9090_IN1A_MIXOUTL_VOL_WIDTH                2  /* IN1A_MIXOUTL_VOL - [7:6] */
 
413
#define WM9090_IN2A_MIXOUTL_VOL_MASK            0x000C  /* IN2A_MIXOUTL_VOL - [3:2] */
 
414
#define WM9090_IN2A_MIXOUTL_VOL_SHIFT                2  /* IN2A_MIXOUTL_VOL - [3:2] */
 
415
#define WM9090_IN2A_MIXOUTL_VOL_WIDTH                2  /* IN2A_MIXOUTL_VOL - [3:2] */
 
416
 
 
417
/*
 
418
 * R48 (0x30) - Output Mixer4
 
419
 */
 
420
#define WM9090_MIXOUTR_MUTE                     0x0100  /* MIXOUTR_MUTE */
 
421
#define WM9090_MIXOUTR_MUTE_MASK                0x0100  /* MIXOUTR_MUTE */
 
422
#define WM9090_MIXOUTR_MUTE_SHIFT                    8  /* MIXOUTR_MUTE */
 
423
#define WM9090_MIXOUTR_MUTE_WIDTH                    1  /* MIXOUTR_MUTE */
 
424
#define WM9090_IN1A_MIXOUTR_VOL_MASK            0x00C0  /* IN1A_MIXOUTR_VOL - [7:6] */
 
425
#define WM9090_IN1A_MIXOUTR_VOL_SHIFT                6  /* IN1A_MIXOUTR_VOL - [7:6] */
 
426
#define WM9090_IN1A_MIXOUTR_VOL_WIDTH                2  /* IN1A_MIXOUTR_VOL - [7:6] */
 
427
#define WM9090_IN1B_MIXOUTR_VOL_MASK            0x0030  /* IN1B_MIXOUTR_VOL - [5:4] */
 
428
#define WM9090_IN1B_MIXOUTR_VOL_SHIFT                4  /* IN1B_MIXOUTR_VOL - [5:4] */
 
429
#define WM9090_IN1B_MIXOUTR_VOL_WIDTH                2  /* IN1B_MIXOUTR_VOL - [5:4] */
 
430
#define WM9090_IN2A_MIXOUTR_VOL_MASK            0x000C  /* IN2A_MIXOUTR_VOL - [3:2] */
 
431
#define WM9090_IN2A_MIXOUTR_VOL_SHIFT                2  /* IN2A_MIXOUTR_VOL - [3:2] */
 
432
#define WM9090_IN2A_MIXOUTR_VOL_WIDTH                2  /* IN2A_MIXOUTR_VOL - [3:2] */
 
433
#define WM9090_IN2B_MIXOUTR_VOL_MASK            0x0003  /* IN2B_MIXOUTR_VOL - [1:0] */
 
434
#define WM9090_IN2B_MIXOUTR_VOL_SHIFT                0  /* IN2B_MIXOUTR_VOL - [1:0] */
 
435
#define WM9090_IN2B_MIXOUTR_VOL_WIDTH                2  /* IN2B_MIXOUTR_VOL - [1:0] */
 
436
 
 
437
/*
 
438
 * R54 (0x36) - Speaker Mixer
 
439
 */
 
440
#define WM9090_IN1A_TO_SPKMIX                   0x0040  /* IN1A_TO_SPKMIX */
 
441
#define WM9090_IN1A_TO_SPKMIX_MASK              0x0040  /* IN1A_TO_SPKMIX */
 
442
#define WM9090_IN1A_TO_SPKMIX_SHIFT                  6  /* IN1A_TO_SPKMIX */
 
443
#define WM9090_IN1A_TO_SPKMIX_WIDTH                  1  /* IN1A_TO_SPKMIX */
 
444
#define WM9090_IN1B_TO_SPKMIX                   0x0010  /* IN1B_TO_SPKMIX */
 
445
#define WM9090_IN1B_TO_SPKMIX_MASK              0x0010  /* IN1B_TO_SPKMIX */
 
446
#define WM9090_IN1B_TO_SPKMIX_SHIFT                  4  /* IN1B_TO_SPKMIX */
 
447
#define WM9090_IN1B_TO_SPKMIX_WIDTH                  1  /* IN1B_TO_SPKMIX */
 
448
#define WM9090_IN2A_TO_SPKMIX                   0x0004  /* IN2A_TO_SPKMIX */
 
449
#define WM9090_IN2A_TO_SPKMIX_MASK              0x0004  /* IN2A_TO_SPKMIX */
 
450
#define WM9090_IN2A_TO_SPKMIX_SHIFT                  2  /* IN2A_TO_SPKMIX */
 
451
#define WM9090_IN2A_TO_SPKMIX_WIDTH                  1  /* IN2A_TO_SPKMIX */
 
452
#define WM9090_IN2B_TO_SPKMIX                   0x0001  /* IN2B_TO_SPKMIX */
 
453
#define WM9090_IN2B_TO_SPKMIX_MASK              0x0001  /* IN2B_TO_SPKMIX */
 
454
#define WM9090_IN2B_TO_SPKMIX_SHIFT                  0  /* IN2B_TO_SPKMIX */
 
455
#define WM9090_IN2B_TO_SPKMIX_WIDTH                  1  /* IN2B_TO_SPKMIX */
 
456
 
 
457
/*
 
458
 * R57 (0x39) - AntiPOP2
 
459
 */
 
460
#define WM9090_VMID_BUF_ENA                     0x0008  /* VMID_BUF_ENA */
 
461
#define WM9090_VMID_BUF_ENA_MASK                0x0008  /* VMID_BUF_ENA */
 
462
#define WM9090_VMID_BUF_ENA_SHIFT                    3  /* VMID_BUF_ENA */
 
463
#define WM9090_VMID_BUF_ENA_WIDTH                    1  /* VMID_BUF_ENA */
 
464
#define WM9090_VMID_ENA                         0x0001  /* VMID_ENA */
 
465
#define WM9090_VMID_ENA_MASK                    0x0001  /* VMID_ENA */
 
466
#define WM9090_VMID_ENA_SHIFT                        0  /* VMID_ENA */
 
467
#define WM9090_VMID_ENA_WIDTH                        1  /* VMID_ENA */
 
468
 
 
469
/*
 
470
 * R70 (0x46) - Write Sequencer 0
 
471
 */
 
472
#define WM9090_WSEQ_ENA                         0x0100  /* WSEQ_ENA */
 
473
#define WM9090_WSEQ_ENA_MASK                    0x0100  /* WSEQ_ENA */
 
474
#define WM9090_WSEQ_ENA_SHIFT                        8  /* WSEQ_ENA */
 
475
#define WM9090_WSEQ_ENA_WIDTH                        1  /* WSEQ_ENA */
 
476
#define WM9090_WSEQ_WRITE_INDEX_MASK            0x000F  /* WSEQ_WRITE_INDEX - [3:0] */
 
477
#define WM9090_WSEQ_WRITE_INDEX_SHIFT                0  /* WSEQ_WRITE_INDEX - [3:0] */
 
478
#define WM9090_WSEQ_WRITE_INDEX_WIDTH                4  /* WSEQ_WRITE_INDEX - [3:0] */
 
479
 
 
480
/*
 
481
 * R71 (0x47) - Write Sequencer 1
 
482
 */
 
483
#define WM9090_WSEQ_DATA_WIDTH_MASK             0x7000  /* WSEQ_DATA_WIDTH - [14:12] */
 
484
#define WM9090_WSEQ_DATA_WIDTH_SHIFT                12  /* WSEQ_DATA_WIDTH - [14:12] */
 
485
#define WM9090_WSEQ_DATA_WIDTH_WIDTH                 3  /* WSEQ_DATA_WIDTH - [14:12] */
 
486
#define WM9090_WSEQ_DATA_START_MASK             0x0F00  /* WSEQ_DATA_START - [11:8] */
 
487
#define WM9090_WSEQ_DATA_START_SHIFT                 8  /* WSEQ_DATA_START - [11:8] */
 
488
#define WM9090_WSEQ_DATA_START_WIDTH                 4  /* WSEQ_DATA_START - [11:8] */
 
489
#define WM9090_WSEQ_ADDR_MASK                   0x00FF  /* WSEQ_ADDR - [7:0] */
 
490
#define WM9090_WSEQ_ADDR_SHIFT                       0  /* WSEQ_ADDR - [7:0] */
 
491
#define WM9090_WSEQ_ADDR_WIDTH                       8  /* WSEQ_ADDR - [7:0] */
 
492
 
 
493
/*
 
494
 * R72 (0x48) - Write Sequencer 2
 
495
 */
 
496
#define WM9090_WSEQ_EOS                         0x4000  /* WSEQ_EOS */
 
497
#define WM9090_WSEQ_EOS_MASK                    0x4000  /* WSEQ_EOS */
 
498
#define WM9090_WSEQ_EOS_SHIFT                       14  /* WSEQ_EOS */
 
499
#define WM9090_WSEQ_EOS_WIDTH                        1  /* WSEQ_EOS */
 
500
#define WM9090_WSEQ_DELAY_MASK                  0x0F00  /* WSEQ_DELAY - [11:8] */
 
501
#define WM9090_WSEQ_DELAY_SHIFT                      8  /* WSEQ_DELAY - [11:8] */
 
502
#define WM9090_WSEQ_DELAY_WIDTH                      4  /* WSEQ_DELAY - [11:8] */
 
503
#define WM9090_WSEQ_DATA_MASK                   0x00FF  /* WSEQ_DATA - [7:0] */
 
504
#define WM9090_WSEQ_DATA_SHIFT                       0  /* WSEQ_DATA - [7:0] */
 
505
#define WM9090_WSEQ_DATA_WIDTH                       8  /* WSEQ_DATA - [7:0] */
 
506
 
 
507
/*
 
508
 * R73 (0x49) - Write Sequencer 3
 
509
 */
 
510
#define WM9090_WSEQ_ABORT                       0x0200  /* WSEQ_ABORT */
 
511
#define WM9090_WSEQ_ABORT_MASK                  0x0200  /* WSEQ_ABORT */
 
512
#define WM9090_WSEQ_ABORT_SHIFT                      9  /* WSEQ_ABORT */
 
513
#define WM9090_WSEQ_ABORT_WIDTH                      1  /* WSEQ_ABORT */
 
514
#define WM9090_WSEQ_START                       0x0100  /* WSEQ_START */
 
515
#define WM9090_WSEQ_START_MASK                  0x0100  /* WSEQ_START */
 
516
#define WM9090_WSEQ_START_SHIFT                      8  /* WSEQ_START */
 
517
#define WM9090_WSEQ_START_WIDTH                      1  /* WSEQ_START */
 
518
#define WM9090_WSEQ_START_INDEX_MASK            0x003F  /* WSEQ_START_INDEX - [5:0] */
 
519
#define WM9090_WSEQ_START_INDEX_SHIFT                0  /* WSEQ_START_INDEX - [5:0] */
 
520
#define WM9090_WSEQ_START_INDEX_WIDTH                6  /* WSEQ_START_INDEX - [5:0] */
 
521
 
 
522
/*
 
523
 * R74 (0x4A) - Write Sequencer 4
 
524
 */
 
525
#define WM9090_WSEQ_BUSY                        0x0001  /* WSEQ_BUSY */
 
526
#define WM9090_WSEQ_BUSY_MASK                   0x0001  /* WSEQ_BUSY */
 
527
#define WM9090_WSEQ_BUSY_SHIFT                       0  /* WSEQ_BUSY */
 
528
#define WM9090_WSEQ_BUSY_WIDTH                       1  /* WSEQ_BUSY */
 
529
 
 
530
/*
 
531
 * R75 (0x4B) - Write Sequencer 5
 
532
 */
 
533
#define WM9090_WSEQ_CURRENT_INDEX_MASK          0x003F  /* WSEQ_CURRENT_INDEX - [5:0] */
 
534
#define WM9090_WSEQ_CURRENT_INDEX_SHIFT              0  /* WSEQ_CURRENT_INDEX - [5:0] */
 
535
#define WM9090_WSEQ_CURRENT_INDEX_WIDTH              6  /* WSEQ_CURRENT_INDEX - [5:0] */
 
536
 
 
537
/*
 
538
 * R76 (0x4C) - Charge Pump 1
 
539
 */
 
540
#define WM9090_CP_ENA                           0x8000  /* CP_ENA */
 
541
#define WM9090_CP_ENA_MASK                      0x8000  /* CP_ENA */
 
542
#define WM9090_CP_ENA_SHIFT                         15  /* CP_ENA */
 
543
#define WM9090_CP_ENA_WIDTH                          1  /* CP_ENA */
 
544
 
 
545
/*
 
546
 * R84 (0x54) - DC Servo 0
 
547
 */
 
548
#define WM9090_DCS_TRIG_SINGLE_1                0x2000  /* DCS_TRIG_SINGLE_1 */
 
549
#define WM9090_DCS_TRIG_SINGLE_1_MASK           0x2000  /* DCS_TRIG_SINGLE_1 */
 
550
#define WM9090_DCS_TRIG_SINGLE_1_SHIFT              13  /* DCS_TRIG_SINGLE_1 */
 
551
#define WM9090_DCS_TRIG_SINGLE_1_WIDTH               1  /* DCS_TRIG_SINGLE_1 */
 
552
#define WM9090_DCS_TRIG_SINGLE_0                0x1000  /* DCS_TRIG_SINGLE_0 */
 
553
#define WM9090_DCS_TRIG_SINGLE_0_MASK           0x1000  /* DCS_TRIG_SINGLE_0 */
 
554
#define WM9090_DCS_TRIG_SINGLE_0_SHIFT              12  /* DCS_TRIG_SINGLE_0 */
 
555
#define WM9090_DCS_TRIG_SINGLE_0_WIDTH               1  /* DCS_TRIG_SINGLE_0 */
 
556
#define WM9090_DCS_TRIG_SERIES_1                0x0200  /* DCS_TRIG_SERIES_1 */
 
557
#define WM9090_DCS_TRIG_SERIES_1_MASK           0x0200  /* DCS_TRIG_SERIES_1 */
 
558
#define WM9090_DCS_TRIG_SERIES_1_SHIFT               9  /* DCS_TRIG_SERIES_1 */
 
559
#define WM9090_DCS_TRIG_SERIES_1_WIDTH               1  /* DCS_TRIG_SERIES_1 */
 
560
#define WM9090_DCS_TRIG_SERIES_0                0x0100  /* DCS_TRIG_SERIES_0 */
 
561
#define WM9090_DCS_TRIG_SERIES_0_MASK           0x0100  /* DCS_TRIG_SERIES_0 */
 
562
#define WM9090_DCS_TRIG_SERIES_0_SHIFT               8  /* DCS_TRIG_SERIES_0 */
 
563
#define WM9090_DCS_TRIG_SERIES_0_WIDTH               1  /* DCS_TRIG_SERIES_0 */
 
564
#define WM9090_DCS_TRIG_STARTUP_1               0x0020  /* DCS_TRIG_STARTUP_1 */
 
565
#define WM9090_DCS_TRIG_STARTUP_1_MASK          0x0020  /* DCS_TRIG_STARTUP_1 */
 
566
#define WM9090_DCS_TRIG_STARTUP_1_SHIFT              5  /* DCS_TRIG_STARTUP_1 */
 
567
#define WM9090_DCS_TRIG_STARTUP_1_WIDTH              1  /* DCS_TRIG_STARTUP_1 */
 
568
#define WM9090_DCS_TRIG_STARTUP_0               0x0010  /* DCS_TRIG_STARTUP_0 */
 
569
#define WM9090_DCS_TRIG_STARTUP_0_MASK          0x0010  /* DCS_TRIG_STARTUP_0 */
 
570
#define WM9090_DCS_TRIG_STARTUP_0_SHIFT              4  /* DCS_TRIG_STARTUP_0 */
 
571
#define WM9090_DCS_TRIG_STARTUP_0_WIDTH              1  /* DCS_TRIG_STARTUP_0 */
 
572
#define WM9090_DCS_TRIG_DAC_WR_1                0x0008  /* DCS_TRIG_DAC_WR_1 */
 
573
#define WM9090_DCS_TRIG_DAC_WR_1_MASK           0x0008  /* DCS_TRIG_DAC_WR_1 */
 
574
#define WM9090_DCS_TRIG_DAC_WR_1_SHIFT               3  /* DCS_TRIG_DAC_WR_1 */
 
575
#define WM9090_DCS_TRIG_DAC_WR_1_WIDTH               1  /* DCS_TRIG_DAC_WR_1 */
 
576
#define WM9090_DCS_TRIG_DAC_WR_0                0x0004  /* DCS_TRIG_DAC_WR_0 */
 
577
#define WM9090_DCS_TRIG_DAC_WR_0_MASK           0x0004  /* DCS_TRIG_DAC_WR_0 */
 
578
#define WM9090_DCS_TRIG_DAC_WR_0_SHIFT               2  /* DCS_TRIG_DAC_WR_0 */
 
579
#define WM9090_DCS_TRIG_DAC_WR_0_WIDTH               1  /* DCS_TRIG_DAC_WR_0 */
 
580
#define WM9090_DCS_ENA_CHAN_1                   0x0002  /* DCS_ENA_CHAN_1 */
 
581
#define WM9090_DCS_ENA_CHAN_1_MASK              0x0002  /* DCS_ENA_CHAN_1 */
 
582
#define WM9090_DCS_ENA_CHAN_1_SHIFT                  1  /* DCS_ENA_CHAN_1 */
 
583
#define WM9090_DCS_ENA_CHAN_1_WIDTH                  1  /* DCS_ENA_CHAN_1 */
 
584
#define WM9090_DCS_ENA_CHAN_0                   0x0001  /* DCS_ENA_CHAN_0 */
 
585
#define WM9090_DCS_ENA_CHAN_0_MASK              0x0001  /* DCS_ENA_CHAN_0 */
 
586
#define WM9090_DCS_ENA_CHAN_0_SHIFT                  0  /* DCS_ENA_CHAN_0 */
 
587
#define WM9090_DCS_ENA_CHAN_0_WIDTH                  1  /* DCS_ENA_CHAN_0 */
 
588
 
 
589
/*
 
590
 * R85 (0x55) - DC Servo 1
 
591
 */
 
592
#define WM9090_DCS_SERIES_NO_01_MASK            0x0FE0  /* DCS_SERIES_NO_01 - [11:5] */
 
593
#define WM9090_DCS_SERIES_NO_01_SHIFT                5  /* DCS_SERIES_NO_01 - [11:5] */
 
594
#define WM9090_DCS_SERIES_NO_01_WIDTH                7  /* DCS_SERIES_NO_01 - [11:5] */
 
595
#define WM9090_DCS_TIMER_PERIOD_01_MASK         0x000F  /* DCS_TIMER_PERIOD_01 - [3:0] */
 
596
#define WM9090_DCS_TIMER_PERIOD_01_SHIFT             0  /* DCS_TIMER_PERIOD_01 - [3:0] */
 
597
#define WM9090_DCS_TIMER_PERIOD_01_WIDTH             4  /* DCS_TIMER_PERIOD_01 - [3:0] */
 
598
 
 
599
/*
 
600
 * R87 (0x57) - DC Servo 3
 
601
 */
 
602
#define WM9090_DCS_DAC_WR_VAL_1_MASK            0xFF00  /* DCS_DAC_WR_VAL_1 - [15:8] */
 
603
#define WM9090_DCS_DAC_WR_VAL_1_SHIFT                8  /* DCS_DAC_WR_VAL_1 - [15:8] */
 
604
#define WM9090_DCS_DAC_WR_VAL_1_WIDTH                8  /* DCS_DAC_WR_VAL_1 - [15:8] */
 
605
#define WM9090_DCS_DAC_WR_VAL_0_MASK            0x00FF  /* DCS_DAC_WR_VAL_0 - [7:0] */
 
606
#define WM9090_DCS_DAC_WR_VAL_0_SHIFT                0  /* DCS_DAC_WR_VAL_0 - [7:0] */
 
607
#define WM9090_DCS_DAC_WR_VAL_0_WIDTH                8  /* DCS_DAC_WR_VAL_0 - [7:0] */
 
608
 
 
609
/*
 
610
 * R88 (0x58) - DC Servo Readback 0
 
611
 */
 
612
#define WM9090_DCS_CAL_COMPLETE_MASK            0x0300  /* DCS_CAL_COMPLETE - [9:8] */
 
613
#define WM9090_DCS_CAL_COMPLETE_SHIFT                8  /* DCS_CAL_COMPLETE - [9:8] */
 
614
#define WM9090_DCS_CAL_COMPLETE_WIDTH                2  /* DCS_CAL_COMPLETE - [9:8] */
 
615
#define WM9090_DCS_DAC_WR_COMPLETE_MASK         0x0030  /* DCS_DAC_WR_COMPLETE - [5:4] */
 
616
#define WM9090_DCS_DAC_WR_COMPLETE_SHIFT             4  /* DCS_DAC_WR_COMPLETE - [5:4] */
 
617
#define WM9090_DCS_DAC_WR_COMPLETE_WIDTH             2  /* DCS_DAC_WR_COMPLETE - [5:4] */
 
618
#define WM9090_DCS_STARTUP_COMPLETE_MASK        0x0003  /* DCS_STARTUP_COMPLETE - [1:0] */
 
619
#define WM9090_DCS_STARTUP_COMPLETE_SHIFT            0  /* DCS_STARTUP_COMPLETE - [1:0] */
 
620
#define WM9090_DCS_STARTUP_COMPLETE_WIDTH            2  /* DCS_STARTUP_COMPLETE - [1:0] */
 
621
 
 
622
/*
 
623
 * R89 (0x59) - DC Servo Readback 1
 
624
 */
 
625
#define WM9090_DCS_DAC_WR_VAL_1_RD_MASK         0x00FF  /* DCS_DAC_WR_VAL_1_RD - [7:0] */
 
626
#define WM9090_DCS_DAC_WR_VAL_1_RD_SHIFT             0  /* DCS_DAC_WR_VAL_1_RD - [7:0] */
 
627
#define WM9090_DCS_DAC_WR_VAL_1_RD_WIDTH             8  /* DCS_DAC_WR_VAL_1_RD - [7:0] */
 
628
 
 
629
/*
 
630
 * R90 (0x5A) - DC Servo Readback 2
 
631
 */
 
632
#define WM9090_DCS_DAC_WR_VAL_0_RD_MASK         0x00FF  /* DCS_DAC_WR_VAL_0_RD - [7:0] */
 
633
#define WM9090_DCS_DAC_WR_VAL_0_RD_SHIFT             0  /* DCS_DAC_WR_VAL_0_RD - [7:0] */
 
634
#define WM9090_DCS_DAC_WR_VAL_0_RD_WIDTH             8  /* DCS_DAC_WR_VAL_0_RD - [7:0] */
 
635
 
 
636
/*
 
637
 * R96 (0x60) - Analogue HP 0
 
638
 */
 
639
#define WM9090_HPOUT1L_RMV_SHORT                0x0080  /* HPOUT1L_RMV_SHORT */
 
640
#define WM9090_HPOUT1L_RMV_SHORT_MASK           0x0080  /* HPOUT1L_RMV_SHORT */
 
641
#define WM9090_HPOUT1L_RMV_SHORT_SHIFT               7  /* HPOUT1L_RMV_SHORT */
 
642
#define WM9090_HPOUT1L_RMV_SHORT_WIDTH               1  /* HPOUT1L_RMV_SHORT */
 
643
#define WM9090_HPOUT1L_OUTP                     0x0040  /* HPOUT1L_OUTP */
 
644
#define WM9090_HPOUT1L_OUTP_MASK                0x0040  /* HPOUT1L_OUTP */
 
645
#define WM9090_HPOUT1L_OUTP_SHIFT                    6  /* HPOUT1L_OUTP */
 
646
#define WM9090_HPOUT1L_OUTP_WIDTH                    1  /* HPOUT1L_OUTP */
 
647
#define WM9090_HPOUT1L_DLY                      0x0020  /* HPOUT1L_DLY */
 
648
#define WM9090_HPOUT1L_DLY_MASK                 0x0020  /* HPOUT1L_DLY */
 
649
#define WM9090_HPOUT1L_DLY_SHIFT                     5  /* HPOUT1L_DLY */
 
650
#define WM9090_HPOUT1L_DLY_WIDTH                     1  /* HPOUT1L_DLY */
 
651
#define WM9090_HPOUT1R_RMV_SHORT                0x0008  /* HPOUT1R_RMV_SHORT */
 
652
#define WM9090_HPOUT1R_RMV_SHORT_MASK           0x0008  /* HPOUT1R_RMV_SHORT */
 
653
#define WM9090_HPOUT1R_RMV_SHORT_SHIFT               3  /* HPOUT1R_RMV_SHORT */
 
654
#define WM9090_HPOUT1R_RMV_SHORT_WIDTH               1  /* HPOUT1R_RMV_SHORT */
 
655
#define WM9090_HPOUT1R_OUTP                     0x0004  /* HPOUT1R_OUTP */
 
656
#define WM9090_HPOUT1R_OUTP_MASK                0x0004  /* HPOUT1R_OUTP */
 
657
#define WM9090_HPOUT1R_OUTP_SHIFT                    2  /* HPOUT1R_OUTP */
 
658
#define WM9090_HPOUT1R_OUTP_WIDTH                    1  /* HPOUT1R_OUTP */
 
659
#define WM9090_HPOUT1R_DLY                      0x0002  /* HPOUT1R_DLY */
 
660
#define WM9090_HPOUT1R_DLY_MASK                 0x0002  /* HPOUT1R_DLY */
 
661
#define WM9090_HPOUT1R_DLY_SHIFT                     1  /* HPOUT1R_DLY */
 
662
#define WM9090_HPOUT1R_DLY_WIDTH                     1  /* HPOUT1R_DLY */
 
663
 
 
664
/*
 
665
 * R98 (0x62) - AGC Control 0
 
666
 */
 
667
#define WM9090_AGC_CLIP_ENA                     0x8000  /* AGC_CLIP_ENA */
 
668
#define WM9090_AGC_CLIP_ENA_MASK                0x8000  /* AGC_CLIP_ENA */
 
669
#define WM9090_AGC_CLIP_ENA_SHIFT                   15  /* AGC_CLIP_ENA */
 
670
#define WM9090_AGC_CLIP_ENA_WIDTH                    1  /* AGC_CLIP_ENA */
 
671
#define WM9090_AGC_CLIP_THR_MASK                0x0F00  /* AGC_CLIP_THR - [11:8] */
 
672
#define WM9090_AGC_CLIP_THR_SHIFT                    8  /* AGC_CLIP_THR - [11:8] */
 
673
#define WM9090_AGC_CLIP_THR_WIDTH                    4  /* AGC_CLIP_THR - [11:8] */
 
674
#define WM9090_AGC_CLIP_ATK_MASK                0x0070  /* AGC_CLIP_ATK - [6:4] */
 
675
#define WM9090_AGC_CLIP_ATK_SHIFT                    4  /* AGC_CLIP_ATK - [6:4] */
 
676
#define WM9090_AGC_CLIP_ATK_WIDTH                    3  /* AGC_CLIP_ATK - [6:4] */
 
677
#define WM9090_AGC_CLIP_DCY_MASK                0x0007  /* AGC_CLIP_DCY - [2:0] */
 
678
#define WM9090_AGC_CLIP_DCY_SHIFT                    0  /* AGC_CLIP_DCY - [2:0] */
 
679
#define WM9090_AGC_CLIP_DCY_WIDTH                    3  /* AGC_CLIP_DCY - [2:0] */
 
680
 
 
681
/*
 
682
 * R99 (0x63) - AGC Control 1
 
683
 */
 
684
#define WM9090_AGC_PWR_ENA                      0x8000  /* AGC_PWR_ENA */
 
685
#define WM9090_AGC_PWR_ENA_MASK                 0x8000  /* AGC_PWR_ENA */
 
686
#define WM9090_AGC_PWR_ENA_SHIFT                    15  /* AGC_PWR_ENA */
 
687
#define WM9090_AGC_PWR_ENA_WIDTH                     1  /* AGC_PWR_ENA */
 
688
#define WM9090_AGC_PWR_AVG                      0x1000  /* AGC_PWR_AVG */
 
689
#define WM9090_AGC_PWR_AVG_MASK                 0x1000  /* AGC_PWR_AVG */
 
690
#define WM9090_AGC_PWR_AVG_SHIFT                    12  /* AGC_PWR_AVG */
 
691
#define WM9090_AGC_PWR_AVG_WIDTH                     1  /* AGC_PWR_AVG */
 
692
#define WM9090_AGC_PWR_THR_MASK                 0x0F00  /* AGC_PWR_THR - [11:8] */
 
693
#define WM9090_AGC_PWR_THR_SHIFT                     8  /* AGC_PWR_THR - [11:8] */
 
694
#define WM9090_AGC_PWR_THR_WIDTH                     4  /* AGC_PWR_THR - [11:8] */
 
695
#define WM9090_AGC_PWR_ATK_MASK                 0x0070  /* AGC_PWR_ATK - [6:4] */
 
696
#define WM9090_AGC_PWR_ATK_SHIFT                     4  /* AGC_PWR_ATK - [6:4] */
 
697
#define WM9090_AGC_PWR_ATK_WIDTH                     3  /* AGC_PWR_ATK - [6:4] */
 
698
#define WM9090_AGC_PWR_DCY_MASK                 0x0007  /* AGC_PWR_DCY - [2:0] */
 
699
#define WM9090_AGC_PWR_DCY_SHIFT                     0  /* AGC_PWR_DCY - [2:0] */
 
700
#define WM9090_AGC_PWR_DCY_WIDTH                     3  /* AGC_PWR_DCY - [2:0] */
 
701
 
 
702
/*
 
703
 * R100 (0x64) - AGC Control 2
 
704
 */
 
705
#define WM9090_AGC_RAMP                         0x0100  /* AGC_RAMP */
 
706
#define WM9090_AGC_RAMP_MASK                    0x0100  /* AGC_RAMP */
 
707
#define WM9090_AGC_RAMP_SHIFT                        8  /* AGC_RAMP */
 
708
#define WM9090_AGC_RAMP_WIDTH                        1  /* AGC_RAMP */
 
709
#define WM9090_AGC_MINGAIN_MASK                 0x003F  /* AGC_MINGAIN - [5:0] */
 
710
#define WM9090_AGC_MINGAIN_SHIFT                     0  /* AGC_MINGAIN - [5:0] */
 
711
#define WM9090_AGC_MINGAIN_WIDTH                     6  /* AGC_MINGAIN - [5:0] */
 
712
 
 
713
#endif