1
2011-08-09 Chao-ying Fu <fu@mips.com>
2
Maciej W. Rozycki <macro@codesourcery.com>
4
* mips.h (OP_MASK_3BITPOS, OP_SH_3BITPOS): New macros.
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(OP_MASK_OFFSET12, OP_SH_OFFSET12): Redefine.
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(INSN_ASE_MASK): Add the MCU bit.
8
(M_ACLR_AB, M_ACLR_OB, M_ASET_AB, M_ASET_OB): New enum values.
9
(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): New macros.
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2011-08-09 Maciej W. Rozycki <macro@codesourcery.com>
13
* mips.h (INSN_WRITE_GPR_S, INSN2_WRITE_GPR_MB): New macros.
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(INSN2_READ_GPR_MC, INSN2_READ_GPR_ME): Likewise.
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(INSN2_WRITE_GPR_MF, INSN2_READ_GPR_MG): Likewise.
16
(INSN2_READ_GPR_MJ, INSN2_WRITE_GPR_MJ): Likewise.
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(INSN2_READ_GPR_MP, INSN2_WRITE_GPR_MP): Likewise.
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(INSN2_READ_GPR_MQ, INSN2_WRITE_GPR_MHI): Likewise.
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(INSN2_READ_GPR_MMN): Likewise.
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(INSN2_READ_FPR_D): Change the bit used.
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(INSN2_MOD_GPR_MD, INSN2_MOD_GPR_MF): Likewise.
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(INSN2_MOD_SP, INSN2_READ_GPR_31, INSN2_READ_GP): Likewise.
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(INSN2_READ_PC, INSN2_UNCOND_BRANCH): Likewise.
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(INSN2_COND_BRANCH): Likewise.
25
(INSN2_WRITE_GPR_S, INSN2_MOD_GPR_MB): Remove macros.
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(INSN2_MOD_GPR_MC, INSN2_MOD_GPR_ME, INSN2_MOD_GPR_MG): Likewise.
27
(INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP, INSN2_MOD_GPR_MQ): Likewise.
28
(INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM): Likewise.
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(INSN2_MOD_GPR_MN): Likewise.
31
2011-08-05 David S. Miller <davem@davemloft.net>
33
* sparc.h: Document new format codes '4', '5', and '('.
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(OPF_LOW4, RS3): New macros.
1
36
2011-08-03 Maciej W. Rozycki <macro@codesourcery.com>
3
38
* mips.h: Document the use of FP_D in MIPS16 mode. Adjust the