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Viewing changes to opcodes/micromips-opc.c

  • Committer: Bazaar Package Importer
  • Author(s): Matthias Klose
  • Date: 2011-08-11 22:51:48 UTC
  • mfrom: (1.7.2 upstream)
  • Revision ID: james.westby@ubuntu.com-20110811225148-y61bcrw1ukl0z2k2
Tags: 2.21.53.20110810-0ubuntu1
Snapshot, taken from the trunk 20110810.

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opcodes/micromips-opc.c
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/* For 16-bit/32-bit microMIPS instructions.  They are used in pinfo2.  */
35
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#define UBR     INSN2_UNCOND_BRANCH
36
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#define CBR     INSN2_COND_BRANCH
37
 
#define MOD_mb  INSN2_MOD_GPR_MB
38
 
#define MOD_mc  INSN2_MOD_GPR_MC
39
 
#define MOD_md  INSN2_MOD_GPR_MD
40
 
#define MOD_me  INSN2_MOD_GPR_ME
41
 
#define MOD_mf  INSN2_MOD_GPR_MF
42
 
#define MOD_mg  INSN2_MOD_GPR_MG
43
 
#define MOD_mhi INSN2_MOD_GPR_MHI
44
 
#define MOD_mj  INSN2_MOD_GPR_MJ
45
 
#define MOD_ml  MOD_mc  /* Reuse, since the bit position is the same.  */
46
 
#define MOD_mm  INSN2_MOD_GPR_MM
47
 
#define MOD_mn  INSN2_MOD_GPR_MN
48
 
#define MOD_mp  INSN2_MOD_GPR_MP
49
 
#define MOD_mq  INSN2_MOD_GPR_MQ
50
 
#define MOD_sp  INSN2_MOD_SP
 
37
#define WR_mb   INSN2_WRITE_GPR_MB
 
38
#define RD_mc   INSN2_READ_GPR_MC
 
39
#define RD_md   INSN2_MOD_GPR_MD
 
40
#define WR_md   INSN2_MOD_GPR_MD
 
41
#define RD_me   INSN2_READ_GPR_ME
 
42
#define RD_mf   INSN2_MOD_GPR_MF
 
43
#define WR_mf   INSN2_MOD_GPR_MF
 
44
#define RD_mg   INSN2_READ_GPR_MG
 
45
#define WR_mhi  INSN2_WRITE_GPR_MHI
 
46
#define RD_mj   INSN2_READ_GPR_MJ
 
47
#define WR_mj   INSN2_WRITE_GPR_MJ
 
48
#define RD_ml   RD_mc   /* Reuse, since the bit position is the same.  */
 
49
#define RD_mmn  INSN2_READ_GPR_MMN
 
50
#define RD_mp   INSN2_READ_GPR_MP
 
51
#define WR_mp   INSN2_WRITE_GPR_MP
 
52
#define RD_mq   INSN2_READ_GPR_MQ
 
53
#define RD_sp   INSN2_MOD_SP
 
54
#define WR_sp   INSN2_MOD_SP
51
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#define RD_31   INSN2_READ_GPR_31
52
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#define RD_gp   INSN2_READ_GP
53
57
#define RD_pc   INSN2_READ_PC
54
58
 
55
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/* For 32-bit microMIPS instructions.  */
56
 
#define WR_s    INSN2_WRITE_GPR_S       /* Used in pinfo2.  */
 
60
#define WR_s    INSN_WRITE_GPR_S
57
61
#define WR_d    INSN_WRITE_GPR_D
58
62
#define WR_t    INSN_WRITE_GPR_T
59
63
#define WR_31   INSN_WRITE_GPR_31
95
99
#define I1      INSN_ISA1
96
100
#define I3      INSN_ISA3
97
101
 
 
102
/* MIPS MCU (MicroController) ASE support.  */
 
103
#define MC      INSN_MCU
 
104
 
98
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const struct mips_opcode micromips_opcodes[] =
99
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{
100
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/* These instructions appear first so that the disassembler will find
110
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{"ssnop",   "",         0x00000800, 0xffffffff, 0,                      INSN2_ALIAS,    I1      }, /* sll */
111
118
{"ehb",     "",         0x00001800, 0xffffffff, 0,                      INSN2_ALIAS,    I1      }, /* sll */
112
119
{"pause",   "",         0x00002800, 0xffffffff, 0,                      INSN2_ALIAS,    I1      }, /* sll */
113
 
{"li",      "md,mI",        0xec00,     0xfc00, 0,                      MOD_md,         I1      },
 
120
{"li",      "md,mI",        0xec00,     0xfc00, 0,                      WR_md,          I1      },
114
121
{"li",      "t,j",      0x30000000, 0xfc1f0000, WR_t,                   INSN2_ALIAS,    I1      }, /* addiu */
115
122
{"li",      "t,i",      0x50000000, 0xfc1f0000, WR_t,                   INSN2_ALIAS,    I1      }, /* ori */
116
123
#if 0
119
126
#endif
120
127
{"li",      "t,I",      0,    (int) M_LI,       INSN_MACRO,             0,              I1      },
121
128
{"move",    "d,s",      0,    (int) M_MOVE,     INSN_MACRO,             0,              I1      },
122
 
{"move",    "mp,mj",        0x0c00,     0xfc00, 0,                      MOD_mp|MOD_mj,  I1      },
 
129
{"move",    "mp,mj",        0x0c00,     0xfc00, 0,                      WR_mp|RD_mj,    I1      },
123
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{"move",    "d,s",      0x58000150, 0xffe007ff, WR_d|RD_s,              INSN2_ALIAS,    I3      }, /* daddu */
124
131
{"move",    "d,s",      0x00000150, 0xffe007ff, WR_d|RD_s,              INSN2_ALIAS,    I1      }, /* addu */
125
132
{"move",    "d,s",      0x00000290, 0xffe007ff, WR_d|RD_s,              INSN2_ALIAS,    I1      }, /* or */
134
141
{"abs.d",   "T,V",      0x5400237b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
135
142
{"abs.s",   "T,V",      0x5400037b, 0xfc00ffff, WR_T|RD_S|FP_S,         0,              I1      },
136
143
{"abs.ps",  "T,V",      0x5400437b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
 
144
{"aclr",    "\\,~(b)",  0x2000b000, 0xff00f000, SM|RD_b|NODS,           0,              MC      },
 
145
{"aclr",    "\\,o(b)",  0,    (int) M_ACLR_OB,  INSN_MACRO,             0,              MC      },
 
146
{"aclr",    "\\,A(b)",  0,    (int) M_ACLR_AB,  INSN_MACRO,             0,              MC      },
137
147
{"add",     "d,v,t",    0x00000110, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
138
148
{"add",     "t,r,I",    0,    (int) M_ADD_I,    INSN_MACRO,             0,              I1      },
139
149
{"add.d",   "D,V,T",    0x54000130, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
140
150
{"add.s",   "D,V,T",    0x54000030, 0xfc0007ff, WR_D|RD_S|RD_T|FP_S,    0,              I1      },
141
151
{"add.ps",  "D,V,T",    0x54000230, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
142
152
{"addi",    "t,r,j",    0x10000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
143
 
{"addiu",   "mp,mj,mZ",     0x0c00,     0xfc00, 0,                      MOD_mp|MOD_mj,  I1      }, /* move */
144
 
{"addiu",   "md,ms,mW",     0x6c01,     0xfc01, 0,                      MOD_md|MOD_sp,  I1      }, /* addiur1sp */
145
 
{"addiu",   "md,mc,mB",     0x6c00,     0xfc01, 0,                      MOD_md|MOD_mc,  I1      }, /* addiur2 */
146
 
{"addiu",   "ms,mt,mY",     0x4c01,     0xfc01, 0,                      MOD_sp,         I1      }, /* addiusp */
147
 
{"addiu",   "mp,mt,mX",     0x4c00,     0xfc01, 0,                      MOD_mp,         I1      }, /* addius5 */
148
 
{"addiu",   "mb,mr,mQ", 0x78000000, 0xfc000000, 0,                      MOD_mb|RD_pc,   I1      }, /* addiupc */
 
153
{"addiu",   "mp,mj,mZ",     0x0c00,     0xfc00, 0,                      WR_mp|RD_mj,    I1      }, /* move */
 
154
{"addiu",   "md,ms,mW",     0x6c01,     0xfc01, 0,                      WR_md|RD_sp,    I1      }, /* addiur1sp */
 
155
{"addiu",   "md,mc,mB",     0x6c00,     0xfc01, 0,                      WR_md|RD_mc,    I1      }, /* addiur2 */
 
156
{"addiu",   "ms,mt,mY",     0x4c01,     0xfc01, 0,                      WR_sp|RD_sp,            I1      }, /* addiusp */
 
157
{"addiu",   "mp,mt,mX",     0x4c00,     0xfc01, 0,                      WR_mp|RD_mp,            I1      }, /* addius5 */
 
158
{"addiu",   "mb,mr,mQ", 0x78000000, 0xfc000000, 0,                      WR_mb|RD_pc,    I1      }, /* addiupc */
149
159
{"addiu",   "t,r,j",    0x30000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
150
 
{"addiupc", "mb,mQ",    0x78000000, 0xfc000000, 0,                      MOD_mb|RD_pc,   I1      },
151
 
{"addiur1sp", "md,mW",      0x6c01,     0xfc01, 0,                      MOD_md|MOD_sp,  I1      },
152
 
{"addiur2", "md,mc,mB",     0x6c00,     0xfc01, 0,                      MOD_md|MOD_mc,  I1      },
153
 
{"addiusp", "mY",           0x4c01,     0xfc01, 0,                      MOD_sp,         I1      },
154
 
{"addius5", "mp,mX",        0x4c00,     0xfc01, 0,                      MOD_mp,         I1      },
155
 
{"addu",    "mp,mj,mz",     0x0c00,     0xfc00, 0,                      MOD_mp|MOD_mj,  I1      }, /* move */
156
 
{"addu",    "mp,mz,mj",     0x0c00,     0xfc00, 0,                      MOD_mp|MOD_mj,  I1      }, /* move */
157
 
{"addu",    "md,me,ml",     0x0400,     0xfc01, 0,                      MOD_md|MOD_me|MOD_ml,   I1      },
 
160
{"addiupc", "mb,mQ",    0x78000000, 0xfc000000, 0,                      WR_mb|RD_pc,    I1      },
 
161
{"addiur1sp", "md,mW",      0x6c01,     0xfc01, 0,                      WR_md|RD_sp,    I1      },
 
162
{"addiur2", "md,mc,mB",     0x6c00,     0xfc01, 0,                      WR_md|RD_mc,    I1      },
 
163
{"addiusp", "mY",           0x4c01,     0xfc01, 0,                      WR_sp|RD_sp,            I1      },
 
164
{"addius5", "mp,mX",        0x4c00,     0xfc01, 0,                      WR_mp|RD_mp,            I1      },
 
165
{"addu",    "mp,mj,mz",     0x0c00,     0xfc00, 0,                      WR_mp|RD_mj,    I1      }, /* move */
 
166
{"addu",    "mp,mz,mj",     0x0c00,     0xfc00, 0,                      WR_mp|RD_mj,    I1      }, /* move */
 
167
{"addu",    "md,me,ml",     0x0400,     0xfc01, 0,                      WR_md|RD_me|RD_ml,      I1      },
158
168
{"addu",    "d,v,t",    0x00000150, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
159
169
{"addu",    "t,r,I",    0,    (int) M_ADDU_I,   INSN_MACRO,             0,              I1      },
160
170
/* We have no flag to mark the read from "y", so we use TRAP to disable
161
171
   delay slot scheduling of ALNV.PS altogether.  */
162
172
{"alnv.ps", "D,V,T,y",  0x54000019, 0xfc00003f, TRAP|WR_D|RD_S|RD_T|FP_D, 0,            I1      },
163
 
{"and",     "mf,mt,mg",     0x4480,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      },
164
 
{"and",     "mf,mg,mx",     0x4480,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      },
 
173
{"and",     "mf,mt,mg",     0x4480,     0xffc0, 0,                      WR_mf|RD_mf|RD_mg,      I1      },
 
174
{"and",     "mf,mg,mx",     0x4480,     0xffc0, 0,                      WR_mf|RD_mf|RD_mg,      I1      },
165
175
{"and",     "d,v,t",    0x00000250, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
166
176
{"and",     "t,r,I",    0,    (int) M_AND_I,    INSN_MACRO,             0,              I1      },
167
 
{"andi",    "md,mc,mC",     0x2c00,     0xfc00, 0,                      MOD_md|MOD_mc,  I1      },
 
177
{"andi",    "md,mc,mC",     0x2c00,     0xfc00, 0,                      WR_md|RD_mc,    I1      },
168
178
{"andi",    "t,r,i",    0xd0000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
 
179
{"aset",    "\\,~(b)",  0x20003000, 0xff00f000, SM|RD_b|NODS,           0,              MC      },
 
180
{"aset",    "\\,o(b)",  0,    (int) M_ASET_OB,  INSN_MACRO,             0,              MC      },
 
181
{"aset",    "\\,A(b)",  0,    (int) M_ASET_AB,  INSN_MACRO,             0,              MC      },
169
182
/* b is at the top of the table.  */
170
183
/* bal is at the top of the table.  */
171
184
{"bc1f",    "p",        0x43800000, 0xffff0000, CBD|RD_CC|FP_S,         0,              I1      },
184
197
{"bc2t",    "N,p",      0x42a00000, 0xffe30000, CBD|RD_CC,              0,              I1      },
185
198
{"bc2tl",   "p",        0,    (int) M_BC2TL,    INSN_MACRO,             0,              I1      },
186
199
{"bc2tl",   "N,p",      0,    (int) M_BC2TL,    INSN_MACRO,             0,              I1      },
187
 
{"beqz",    "md,mE",        0x8c00,     0xfc00, CBD,                    MOD_md,         I1      },
 
200
{"beqz",    "md,mE",        0x8c00,     0xfc00, CBD,                    RD_md,          I1      },
188
201
{"beqz",    "s,p",      0x94000000, 0xffe00000, CBD|RD_s,               0,              I1      },
189
202
{"beqzc",   "s,p",      0x40e00000, 0xffe00000, NODS|RD_s,              CBR,            I1      },
190
203
{"beqzl",   "s,p",      0,    (int) M_BEQL,     INSN_MACRO,             0,              I1      },
191
 
{"beq",     "md,mz,mE",     0x8c00,     0xfc00, CBD,                    MOD_md,         I1      }, /* beqz */
192
 
{"beq",     "mz,md,mE",     0x8c00,     0xfc00, CBD,                    MOD_md,         I1      }, /* beqz */
 
204
{"beq",     "md,mz,mE",     0x8c00,     0xfc00, CBD,                    RD_md,          I1      }, /* beqz */
 
205
{"beq",     "mz,md,mE",     0x8c00,     0xfc00, CBD,                    RD_md,          I1      }, /* beqz */
193
206
{"beq",     "s,t,p",    0x94000000, 0xfc000000, CBD|RD_s|RD_t,          0,              I1      },
194
207
{"beq",     "s,I,p",    0,    (int) M_BEQ_I,    INSN_MACRO,             0,              I1      },
195
208
{"beql",    "s,t,p",    0,    (int) M_BEQL,     INSN_MACRO,             0,              I1      },
240
253
{"bltzal",  "s,p",      0x40200000, 0xffe00000, CBD|RD_s|WR_31,         BD32,           I1      },
241
254
{"bltzals", "s,p",      0x42200000, 0xffe00000, CBD|RD_s|WR_31,         BD16,           I1      },
242
255
{"bltzall", "s,p",      0,    (int) M_BLTZALL,  INSN_MACRO,             0,              I1      },
243
 
{"bnez",    "md,mE",        0xac00,     0xfc00, CBD,                    MOD_md,         I1      },
 
256
{"bnez",    "md,mE",        0xac00,     0xfc00, CBD,                    RD_md,          I1      },
244
257
{"bnez",    "s,p",      0xb4000000, 0xffe00000, CBD|RD_s,               0,              I1      },
245
258
{"bnezc",   "s,p",      0x40a00000, 0xffe00000, NODS|RD_s,              CBR,            I1      },
246
259
{"bnezl",   "s,p",      0,    (int) M_BNEL,     INSN_MACRO,             0,              I1      },
247
 
{"bne",     "md,mz,mE",     0xac00,     0xfc00, CBD,                    MOD_md,         I1      }, /* bnez */
248
 
{"bne",     "mz,md,mE",     0xac00,     0xfc00, CBD,                    MOD_md,         I1      }, /* bnez */
 
260
{"bne",     "md,mz,mE",     0xac00,     0xfc00, CBD,                    RD_md,          I1      }, /* bnez */
 
261
{"bne",     "mz,md,mE",     0xac00,     0xfc00, CBD,                    RD_md,          I1      }, /* bnez */
249
262
{"bne",     "s,t,p",    0xb4000000, 0xfc000000, CBD|RD_s|RD_t,          0,              I1      },
250
263
{"bne",     "s,I,p",    0,    (int) M_BNE_I,    INSN_MACRO,             0,              I1      },
251
264
{"bnel",    "s,t,p",    0,    (int) M_BNEL,     INSN_MACRO,             0,              I1      },
405
418
{"ddivu",   "z,t",      0x5800bb3c, 0xfc1fffff, RD_s|RD_t|WR_HILO,      0,              I3      },
406
419
{"ddivu",   "d,v,t",    0,    (int) M_DDIVU_3,  INSN_MACRO,             0,              I3      },
407
420
{"ddivu",   "d,v,I",    0,    (int) M_DDIVU_3I, INSN_MACRO,             0,              I3      },
408
 
{"di",      "",         0x0000477c, 0xffffffff, RD_C0,                  WR_s,           I1      },
409
 
{"di",      "s",        0x0000477c, 0xffe0ffff, RD_C0,                  WR_s,           I1      },
 
421
{"di",      "",         0x0000477c, 0xffffffff, WR_s|RD_C0,             0,              I1      },
 
422
{"di",      "s",        0x0000477c, 0xffe0ffff, WR_s|RD_C0,             0,              I1      },
410
423
{"dins",    "t,r,I,+I", 0,    (int) M_DINS,     INSN_MACRO,             0,              I3      },
411
424
{"dins",    "t,r,+A,+B",0x5800000c, 0xfc00003f, WR_t|RD_s,              0,              I3      },
412
425
{"dinsm",   "t,r,+A,+F",0x58000004, 0xfc00003f, WR_t|RD_s,              0,              I3      },
495
508
{"dsub",    "d,v,I",    0,    (int) M_DSUB_I,   INSN_MACRO,             0,              I3      },
496
509
{"dsubu",   "d,v,t",    0x580001d0, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I3      },
497
510
{"dsubu",   "d,v,I",    0,    (int) M_DSUBU_I,  INSN_MACRO,             0,              I3      },
498
 
{"ei",      "",         0x0000577c, 0xffffffff, WR_C0,                  WR_s,           I1      },
499
 
{"ei",      "s",        0x0000577c, 0xffe0ffff, WR_C0,                  WR_s,           I1      },
 
511
{"ei",      "",         0x0000577c, 0xffffffff, WR_s|WR_C0,             0,              I1      },
 
512
{"ei",      "s",        0x0000577c, 0xffe0ffff, WR_s|WR_C0,             0,              I1      },
500
513
{"eret",    "",         0x0000f37c, 0xffffffff, NODS,                   0,              I1      },
501
514
{"ext",     "t,r,+A,+C", 0x0000002c, 0xfc00003f, WR_t|RD_s,             0,              I1      },
502
515
{"floor.l.d", "T,V",    0x5400433b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
504
517
{"floor.w.d", "T,V",    0x54004b3b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D,    0,              I1      },
505
518
{"floor.w.s", "T,V",    0x54000b3b, 0xfc00ffff, WR_T|RD_S|FP_S,         0,              I1      },
506
519
{"ins",     "t,r,+A,+B", 0x0000000c, 0xfc00003f, WR_t|RD_s,             0,              I1      },
507
 
{"jr",      "mj",           0x4580,     0xffe0, UBD,                    MOD_mj,         I1      },
 
520
{"iret",    "",         0x0000d37c, 0xffffffff, NODS,                   0,              MC      },
 
521
{"jr",      "mj",           0x4580,     0xffe0, UBD,                    RD_mj,          I1      },
508
522
{"jr",      "s",        0x00000f3c, 0xffe0ffff, UBD|RD_s,               BD32,           I1      }, /* jalr */
509
523
{"jrs",     "s",        0x00004f3c, 0xffe0ffff, UBD|RD_s,               BD16,           I1      }, /* jalrs */
510
 
{"jraddiusp", "mP",         0x4700,     0xffe0, NODS,                   UBR|RD_31|MOD_sp,       I1      },
511
 
{"jrc",     "mj",           0x45a0,     0xffe0, NODS,                   UBR|MOD_mj,             I1      },
 
524
{"jraddiusp", "mP",         0x4700,     0xffe0, NODS,                   UBR|RD_31|WR_sp|RD_sp,  I1      },
 
525
{"jrc",     "mj",           0x45a0,     0xffe0, NODS,                   UBR|RD_mj,              I1      },
512
526
{"jr.hb",   "s",        0x00001f3c, 0xffe0ffff, UBD|RD_s,               BD32,           I1      }, /* jalr.hb */
513
527
{"jrs.hb",  "s",        0x00005f3c, 0xffe0ffff, UBD|RD_s,               BD16,           I1      }, /* jalrs.hb */
514
 
{"j",       "mj",           0x4580,     0xffe0, UBD,                    MOD_mj,         I1      }, /* jr */
 
528
{"j",       "mj",           0x4580,     0xffe0, UBD,                    RD_mj,          I1      }, /* jr */
515
529
{"j",       "s",        0x00000f3c, 0xffe0ffff, UBD|RD_s,               BD32,           I1      }, /* jr */
516
530
/* SVR4 PIC code requires special handling for j, so it must be a
517
531
   macro.  */
520
534
   assembler, but will never match user input (because the line above
521
535
   will match first).  */
522
536
{"j",       "a",        0xd4000000, 0xfc000000, UBD,                    0,              I1      },
523
 
{"jalr",    "mj",           0x45c0,     0xffe0, UBD|WR_31,              MOD_mj|BD32,    I1      },
524
 
{"jalr",    "my,mj",        0x45c0,     0xffe0, UBD|WR_31,              MOD_mj|BD32,    I1      },
 
537
{"jalr",    "mj",           0x45c0,     0xffe0, UBD|WR_31,              RD_mj|BD32,     I1      },
 
538
{"jalr",    "my,mj",        0x45c0,     0xffe0, UBD|WR_31,              RD_mj|BD32,     I1      },
525
539
{"jalr",    "s",        0x03e00f3c, 0xffe0ffff, UBD|RD_s|WR_t,          BD32,           I1      },
526
540
{"jalr",    "t,s",      0x00000f3c, 0xfc00ffff, UBD|RD_s|WR_t,          BD32,           I1      },
527
541
{"jalr.hb", "s",        0x03e01f3c, 0xffe0ffff, UBD|RD_s|WR_t,          BD32,           I1      },
528
542
{"jalr.hb", "t,s",      0x00001f3c, 0xfc00ffff, UBD|RD_s|WR_t,          BD32,           I1      },
529
 
{"jalrs",   "mj",           0x45e0,     0xffe0, UBD|WR_31,              MOD_mj|BD16,    I1      },
530
 
{"jalrs",   "my,mj",        0x45e0,     0xffe0, UBD|WR_31,              MOD_mj|BD16,    I1      },
 
543
{"jalrs",   "mj",           0x45e0,     0xffe0, UBD|WR_31,              RD_mj|BD16,     I1      },
 
544
{"jalrs",   "my,mj",        0x45e0,     0xffe0, UBD|WR_31,              RD_mj|BD16,     I1      },
531
545
{"jalrs",   "s",        0x03e04f3c, 0xffe0ffff, UBD|RD_s|WR_t,          BD16,           I1      },
532
546
{"jalrs",   "t,s",      0x00004f3c, 0xfc00ffff, UBD|RD_s|WR_t,          BD16,           I1      },
533
547
{"jalrs.hb", "s",       0x03e05f3c, 0xffe0ffff, UBD|RD_s|WR_t,          BD16,           I1      },
549
563
{"la",      "t,A(b)",   0,    (int) M_LA_AB,    INSN_MACRO,             0,              I1      },
550
564
{"lb",      "t,o(b)",   0x1c000000, 0xfc000000, RD_b|WR_t,              0,              I1      },
551
565
{"lb",      "t,A(b)",   0,    (int) M_LB_AB,    INSN_MACRO,             0,              I1      },
552
 
{"lbu",     "md,mG(ml)",    0x0800,     0xfc00, 0,                      MOD_md|MOD_ml,  I1      },
 
566
{"lbu",     "md,mG(ml)",    0x0800,     0xfc00, 0,                      WR_md|RD_ml,    I1      },
553
567
{"lbu",     "t,o(b)",   0x14000000, 0xfc000000, RD_b|WR_t,              0,              I1      },
554
568
{"lbu",     "t,A(b)",   0,    (int) M_LBU_AB,   INSN_MACRO,             0,              I1      },
555
569
{"lca",     "t,A(b)",   0,    (int) M_LCA_AB,   INSN_MACRO,             0,              I1      },
581
595
{"ldxc1",   "D,t(b)",   0x540000c8, 0xfc0007ff, WR_D|RD_t|RD_b|FP_D,    0,              I1      },
582
596
{"lh",      "t,o(b)",   0x3c000000, 0xfc000000, RD_b|WR_t,              0,              I1      },
583
597
{"lh",      "t,A(b)",   0,    (int) M_LH_AB,    INSN_MACRO,             0,              I1      },
584
 
{"lhu",     "md,mH(ml)",    0x2800,     0xfc00, 0,                      MOD_md|MOD_ml,  I1      },
 
598
{"lhu",     "md,mH(ml)",    0x2800,     0xfc00, 0,                      WR_md|RD_ml,    I1      },
585
599
{"lhu",     "t,o(b)",   0x34000000, 0xfc000000, RD_b|WR_t,              0,              I1      },
586
600
{"lhu",     "t,A(b)",   0,    (int) M_LHU_AB,   INSN_MACRO,             0,              I1      },
587
601
/* li is at the start of the table.  */
595
609
{"lld",     "t,~(b)",   0x60007000, 0xfc00f000, RD_b|WR_t,              0,              I3      },
596
610
{"lld",     "t,o(b)",   0,    (int) M_LLD_OB,   INSN_MACRO,             0,              I3      },
597
611
{"lld",     "t,A(b)",   0,    (int) M_LLD_AB,   INSN_MACRO,             0,              I3      },
598
 
{"lui",     "s,u",      0x41a00000, 0xffe00000, 0,                      WR_s,           I1      },
 
612
{"lui",     "s,u",      0x41a00000, 0xffe00000, WR_s,                   0,              I1      },
599
613
{"luxc1",   "D,t(b)",   0x54000148, 0xfc0007ff, WR_D|RD_t|RD_b|FP_D,    0,              I1      },
600
 
{"lw",      "md,mJ(ml)",    0x6800,     0xfc00, 0,                      MOD_md|MOD_ml,  I1      },
601
 
{"lw",      "mp,mU(ms)",    0x4800,     0xfc00, 0,                      MOD_mp|MOD_sp,  I1      }, /* lwsp */
602
 
{"lw",      "md,mA(ma)",    0x6400,     0xfc00, 0,                      MOD_md|RD_gp,   I1      }, /* lwgp */
 
614
{"lw",      "md,mJ(ml)",    0x6800,     0xfc00, 0,                      WR_md|RD_ml,    I1      },
 
615
{"lw",      "mp,mU(ms)",    0x4800,     0xfc00, 0,                      WR_mp|RD_sp,    I1      }, /* lwsp */
 
616
{"lw",      "md,mA(ma)",    0x6400,     0xfc00, 0,                      WR_md|RD_gp,    I1      }, /* lwgp */
603
617
{"lw",      "t,o(b)",   0xfc000000, 0xfc000000, RD_b|WR_t,              0,              I1      },
604
618
{"lw",      "t,A(b)",   0,    (int) M_LW_AB,    INSN_MACRO,             0,              I1      },
605
619
{"lwc1",    "T,o(b)",   0x9c000000, 0xfc000000, RD_b|WR_T|FP_S,         0,              I1      },
617
631
{"lcache",  "t,~(b)",   0x60000000, 0xfc00f000, RD_b|WR_t,              0,              I1      }, /* same */
618
632
{"lcache",  "t,o(b)",   0,    (int) M_LWL_OB,   INSN_MACRO,             0,              I1      },
619
633
{"lcache",  "t,A(b)",   0,    (int) M_LWL_AB,   INSN_MACRO,             0,              I1      },
620
 
{"lwm",     "mN,mJ(ms)",    0x4500,     0xffc0, NODS,                   MOD_sp,         I1      },
 
634
{"lwm",     "mN,mJ(ms)",    0x4500,     0xffc0, NODS,                   RD_sp,          I1      },
621
635
{"lwm",     "n,~(b)",   0x20005000, 0xfc00f000, RD_b|NODS,              0,              I1      },
622
636
{"lwm",     "n,o(b)",   0,    (int) M_LWM_OB,   INSN_MACRO,             0,              I1      },
623
637
{"lwm",     "n,A(b)",   0,    (int) M_LWM_AB,   INSN_MACRO,             0,              I1      },
649
663
{"mfhc1",   "t,S",      0x5400303b, 0xfc00ffff, WR_t|RD_S|FP_D,         0,              I1      },
650
664
{"mfhc1",   "t,G",      0x5400303b, 0xfc00ffff, WR_t|RD_S|FP_D,         0,              I1      },
651
665
{"mfhc2",   "t,G",      0x00008d3c, 0xfc00ffff, WR_t|RD_C2,             0,              I1      },
652
 
{"mfhi",    "mj",           0x4600,     0xffe0, RD_HI,                  MOD_mj,         I1      },
653
 
{"mfhi",    "s",        0x00000d7c, 0xffe0ffff, RD_HI,                  WR_s,           I1      },
654
 
{"mflo",    "mj",           0x4640,     0xffe0, RD_LO,                  MOD_mj,         I1      },
655
 
{"mflo",    "s",        0x00001d7c, 0xffe0ffff, RD_LO,                  WR_s,           I1      },
 
666
{"mfhi",    "mj",           0x4600,     0xffe0, RD_HI,                  WR_mj,          I1      },
 
667
{"mfhi",    "s",        0x00000d7c, 0xffe0ffff, WR_s|RD_HI,             0,              I1      },
 
668
{"mflo",    "mj",           0x4640,     0xffe0, RD_LO,                  WR_mj,          I1      },
 
669
{"mflo",    "s",        0x00001d7c, 0xffe0ffff, WR_s|RD_LO,             0,              I1      },
656
670
{"mov.d",   "T,S",      0x5400207b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
657
671
{"mov.s",   "T,S",      0x5400007b, 0xfc00ffff, WR_T|RD_S|FP_S,         0,              I1      },
658
672
{"mov.ps",  "T,S",      0x5400407b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
659
 
{"movep",   "mh,mi,mm,mn",  0x8400,     0xfc01, NODS,                   MOD_mhi|MOD_mm|MOD_mn,  I1      },
 
673
{"movep",   "mh,mi,mm,mn",  0x8400,     0xfc01, NODS,                   WR_mhi|RD_mmn,  I1      },
660
674
{"movf",    "t,s,M",    0x5400017b, 0xfc001fff, WR_t|RD_s|RD_CC|FP_S|FP_D, 0,           I1      },
661
675
{"movf.d",  "T,S,M",    0x54000220, 0xfc001fff, WR_T|RD_S|RD_CC|FP_D,   0,              I1      },
662
676
{"movf.s",  "T,S,M",    0x54000020, 0xfc001fff, WR_T|RD_S|RD_CC|FP_S,   0,              I1      },
712
726
{"nmsub.s", "D,R,S,T",  0x54000022, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0,            I1      },
713
727
{"nmsub.ps", "D,R,S,T", 0x54000032, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0,            I1      },
714
728
/* nop is at the start of the table.  */
715
 
{"not",     "mf,mg",        0x4400,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      }, /* put not before nor */
 
729
{"not",     "mf,mg",        0x4400,     0xffc0, 0,                      WR_mf|RD_mg,    I1      }, /* put not before nor */
716
730
{"not",     "d,v",      0x000002d0, 0xffe007ff, WR_d|RD_s|RD_t,         0,              I1      }, /* nor d,s,0 */
717
 
{"nor",     "mf,mz,mg",     0x4400,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      }, /* not */
718
 
{"nor",     "mf,mg,mz",     0x4400,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      }, /* not */
 
731
{"nor",     "mf,mz,mg",     0x4400,     0xffc0, 0,                      WR_mf|RD_mg,    I1      }, /* not */
 
732
{"nor",     "mf,mg,mz",     0x4400,     0xffc0, 0,                      WR_mf|RD_mg,    I1      }, /* not */
719
733
{"nor",     "d,v,t",    0x000002d0, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
720
734
{"nor",     "t,r,I",    0,    (int) M_NOR_I,    INSN_MACRO,             0,              I1      },
721
 
{"or",      "mp,mj,mz",     0x0c00,     0xfc00, 0,                      MOD_mp|MOD_mj,  I1      }, /* move */
722
 
{"or",      "mp,mz,mj",     0x0c00,     0xfc00, 0,                      MOD_mp|MOD_mj,  I1      }, /* move */
723
 
{"or",      "mf,mt,mg",     0x44c0,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      },
724
 
{"or",      "mf,mg,mx",     0x44c0,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      },
 
735
{"or",      "mp,mj,mz",     0x0c00,     0xfc00, 0,                      WR_mp|RD_mj,    I1      }, /* move */
 
736
{"or",      "mp,mz,mj",     0x0c00,     0xfc00, 0,                      WR_mp|RD_mj,    I1      }, /* move */
 
737
{"or",      "mf,mt,mg",     0x44c0,     0xffc0, 0,                      WR_mf|RD_mf|RD_mg,      I1      },
 
738
{"or",      "mf,mg,mx",     0x44c0,     0xffc0, 0,                      WR_mf|RD_mf|RD_mg,      I1      },
725
739
{"or",      "d,v,t",    0x00000290, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
726
740
{"or",      "t,r,I",    0,    (int) M_OR_I,     INSN_MACRO,             0,              I1      },
727
 
{"ori",     "mp,mj,mZ",     0x0c00,     0xfc00, 0,                      MOD_mp|MOD_mj,  I1      }, /* move */
 
741
{"ori",     "mp,mj,mZ",     0x0c00,     0xfc00, 0,                      WR_mp|RD_mj,    I1      }, /* move */
728
742
{"ori",     "t,r,i",    0x50000000, 0xfc000000, WR_t|RD_s,              0,              I1      },
729
743
{"pll.ps",  "D,V,T",    0x54000080, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
730
744
{"plu.ps",  "D,V,T",    0x540000c0, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
758
772
{"round.w.s", "T,S",    0x54003b3b, 0xfc00ffff, WR_T|RD_S|FP_S,         0,              I1      },
759
773
{"rsqrt.d", "T,S",      0x5400423b, 0xfc00ffff, WR_T|RD_S|FP_D,         0,              I1      },
760
774
{"rsqrt.s", "T,S",      0x5400023b, 0xfc00ffff, WR_T|RD_S|FP_S,         0,              I1      },
761
 
{"sb",      "mq,mL(ml)",    0x8800,     0xfc00, SM,                     MOD_mq|MOD_ml,          I1      },
 
775
{"sb",      "mq,mL(ml)",    0x8800,     0xfc00, SM,                     RD_mq|RD_ml,            I1      },
762
776
{"sb",      "t,o(b)",   0x18000000, 0xfc000000, SM|RD_t|RD_b,           0,              I1      },
763
777
{"sb",      "t,A(b)",   0,    (int) M_SB_AB,    INSN_MACRO,             0,              I1      },
764
778
{"sc",      "t,~(b)",   0x6000b000, 0xfc00f000, SM|RD_t|WR_t|RD_b,      0,              I1      },
809
823
{"sgt",     "d,v,I",    0,    (int) M_SGT_I,    INSN_MACRO,             0,              I1      },
810
824
{"sgtu",    "d,v,t",    0,    (int) M_SGTU,     INSN_MACRO,             0,              I1      },
811
825
{"sgtu",    "d,v,I",    0,    (int) M_SGTU_I,   INSN_MACRO,             0,              I1      },
812
 
{"sh",      "mq,mH(ml)",    0xa800,     0xfc00, SM,                     MOD_mq|MOD_ml,  I1      },
 
826
{"sh",      "mq,mH(ml)",    0xa800,     0xfc00, SM,                     RD_mq|RD_ml,    I1      },
813
827
{"sh",      "t,o(b)",   0x38000000, 0xfc000000, SM|RD_t|RD_b,           0,              I1      },
814
828
{"sh",      "t,A(b)",   0,    (int) M_SH_AB,    INSN_MACRO,             0,              I1      },
815
829
{"sle",     "d,v,t",    0,    (int) M_SLE,      INSN_MACRO,             0,              I1      },
817
831
{"sleu",    "d,v,t",    0,    (int) M_SLEU,     INSN_MACRO,             0,              I1      },
818
832
{"sleu",    "d,v,I",    0,    (int) M_SLEU_I,   INSN_MACRO,             0,              I1      },
819
833
{"sllv",    "d,t,s",    0x00000010, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
820
 
{"sll",     "md,mc,mM",     0x2400,     0xfc01, 0,                      MOD_md|MOD_mc,  I1      },
 
834
{"sll",     "md,mc,mM",     0x2400,     0xfc01, 0,                      WR_md|RD_mc,    I1      },
821
835
{"sll",     "d,w,s",    0x00000010, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      }, /* sllv */
822
836
{"sll",     "t,r,<",    0x00000000, 0xfc0007ff, WR_t|RD_s,              0,              I1      },
823
837
{"slt",     "d,v,t",    0x00000350, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
834
848
{"sra",     "d,w,s",    0x00000090, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I1      }, /* srav */
835
849
{"sra",     "t,r,<",    0x00000080, 0xfc0007ff, WR_t|RD_s,              0,              I1      },
836
850
{"srlv",    "d,t,s",    0x00000050, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I1      },
837
 
{"srl",     "md,mc,mM",     0x2401,     0xfc01, 0,                      MOD_md|MOD_mc,  I1      },
 
851
{"srl",     "md,mc,mM",     0x2401,     0xfc01, 0,                      WR_md|RD_mc,    I1      },
838
852
{"srl",     "d,w,s",    0x00000050, 0xfc0007ff, WR_d|RD_t|RD_s,         0,              I1      }, /* srlv */
839
853
{"srl",     "t,r,<",    0x00000040, 0xfc0007ff, WR_t|RD_s,              0,              I1      },
840
854
/* ssnop is at the start of the table.  */
843
857
{"sub.d",   "D,V,T",    0x54000170, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
844
858
{"sub.s",   "D,V,T",    0x54000070, 0xfc0007ff, WR_D|RD_S|RD_T|FP_S,    0,              I1      },
845
859
{"sub.ps",  "D,V,T",    0x54000270, 0xfc0007ff, WR_D|RD_S|RD_T|FP_D,    0,              I1      },
846
 
{"subu",    "md,me,ml",     0x0401,     0xfc01, 0,                      MOD_md|MOD_me|MOD_ml,   I1      },
 
860
{"subu",    "md,me,ml",     0x0401,     0xfc01, 0,                      WR_md|RD_me|RD_ml,      I1      },
847
861
{"subu",    "d,v,t",    0x000001d0, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
848
862
{"subu",    "d,v,I",    0,    (int) M_SUBU_I,   INSN_MACRO,             0,              I1      },
849
863
{"suxc1",   "D,t(b)",   0x54000188, 0xfc0007ff, SM|RD_t|RD_b|FP_D,      RD_D,           I1      },
850
 
{"sw",      "mq,mJ(ml)",    0xe800,     0xfc00, SM,                     MOD_mq|MOD_ml,  I1      },
851
 
{"sw",      "mp,mU(ms)",    0xc800,     0xfc00, SM,                     MOD_mp|MOD_sp,  I1      }, /* swsp */
 
864
{"sw",      "mq,mJ(ml)",    0xe800,     0xfc00, SM,                     RD_mq|RD_ml,    I1      },
 
865
{"sw",      "mp,mU(ms)",    0xc800,     0xfc00, SM,                     RD_mp|RD_sp,    I1      }, /* swsp */
852
866
{"sw",      "t,o(b)",   0xf8000000, 0xfc000000, SM|RD_t|RD_b,           0,              I1      },
853
867
{"sw",      "t,A(b)",   0,    (int) M_SW_AB,    INSN_MACRO,             0,              I1      },
854
868
{"swc1",    "T,o(b)",   0x98000000, 0xfc000000, SM|RD_T|RD_b|FP_S,      0,              I1      },
866
880
{"scache",  "t,~(b)",   0x60008000, 0xfc00f000, SM|RD_t|RD_b,           0,              I1      }, /* same */
867
881
{"scache",  "t,o(b)",   0,    (int) M_SWL_OB,   INSN_MACRO,             0,              I1      },
868
882
{"scache",  "t,A(b)",   0,    (int) M_SWL_AB,   INSN_MACRO,             0,              I1      },
869
 
{"swm",     "mN,mJ(ms)",    0x4540,     0xffc0, NODS,                   MOD_sp,         I1      },
 
883
{"swm",     "mN,mJ(ms)",    0x4540,     0xffc0, NODS,                   RD_sp,          I1      },
870
884
{"swm",     "n,~(b)",   0x2000d000, 0xfc00f000, SM|RD_b|NODS,           0,              I1      },
871
885
{"swm",     "n,o(b)",   0,    (int) M_SWM_OB,   INSN_MACRO,             0,              I1      },
872
886
{"swm",     "n,A(b)",   0,    (int) M_SWM_AB,   INSN_MACRO,             0,              I1      },
946
960
{"wait",    "B",        0x0000937c, 0xfc00ffff, NODS,                   0,              I1      },
947
961
{"wrpgpr",  "t,r",      0x0000f17c, 0xfc00ffff, RD_s,                   0,              I1      },
948
962
{"wsbh",    "t,r",      0x00007b3c, 0xfc00ffff, WR_t|RD_s,              0,              I1      },
949
 
{"xor",     "mf,mt,mg",     0x4440,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      },
950
 
{"xor",     "mf,mg,mx",     0x4440,     0xffc0, 0,                      MOD_mf|MOD_mg,  I1      },
 
963
{"xor",     "mf,mt,mg",     0x4440,     0xffc0, 0,                      WR_mf|RD_mf|RD_mg,      I1      },
 
964
{"xor",     "mf,mg,mx",     0x4440,     0xffc0, 0,                      WR_mf|RD_mf|RD_mg,      I1      },
951
965
{"xor",     "d,v,t",    0x00000310, 0xfc0007ff, WR_d|RD_s|RD_t,         0,              I1      },
952
966
{"xor",     "t,r,I",    0,    (int) M_XOR_I,    INSN_MACRO,             0,              I1      },
953
967
{"xori",    "t,r,i",    0x70000000, 0xfc000000, WR_t|RD_s,              0,              I1      },