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/**************************************************************************
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* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
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* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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**************************************************************************/
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#include "tnl/t_context.h"
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#include "intel_fbo.h"
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#include "intel_screen.h"
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#include "intel_batchbuffer.h"
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#include "i915_context.h"
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#define FILE_DEBUG_FLAG DEBUG_STATE
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i915StencilFuncSeparate(GLcontext * ctx, GLenum face, GLenum func, GLint ref,
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struct i915_context *i915 = I915_CONTEXT(ctx);
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int test = intel_translate_compare_func(func);
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DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__,
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_mesa_lookup_enum_by_nr(func), ref, mask);
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I915_STATECHANGE(i915, I915_UPLOAD_CTX);
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i915->state.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
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i915->state.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
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STENCIL_TEST_MASK(mask));
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i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_REF_MASK |
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S5_STENCIL_TEST_FUNC_MASK);
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i915->state.Ctx[I915_CTXREG_LIS5] |= ((ref << S5_STENCIL_REF_SHIFT) |
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S5_STENCIL_TEST_FUNC_SHIFT));
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i915StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask)
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struct i915_context *i915 = I915_CONTEXT(ctx);
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DBG("%s : mask 0x%x\n", __FUNCTION__, mask);
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I915_STATECHANGE(i915, I915_UPLOAD_CTX);
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i915->state.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
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i915->state.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
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STENCIL_WRITE_MASK(mask));
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i915StencilOpSeparate(GLcontext * ctx, GLenum face, GLenum fail, GLenum zfail,
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struct i915_context *i915 = I915_CONTEXT(ctx);
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int fop = intel_translate_stencil_op(fail);
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int dfop = intel_translate_stencil_op(zfail);
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int dpop = intel_translate_stencil_op(zpass);
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DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__,
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_mesa_lookup_enum_by_nr(fail),
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_mesa_lookup_enum_by_nr(zfail), _mesa_lookup_enum_by_nr(zpass));
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I915_STATECHANGE(i915, I915_UPLOAD_CTX);
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i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_FAIL_MASK |
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S5_STENCIL_PASS_Z_FAIL_MASK |
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S5_STENCIL_PASS_Z_PASS_MASK);
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i915->state.Ctx[I915_CTXREG_LIS5] |= ((fop << S5_STENCIL_FAIL_SHIFT) |
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S5_STENCIL_PASS_Z_FAIL_SHIFT) |
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S5_STENCIL_PASS_Z_PASS_SHIFT));
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i915AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
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struct i915_context *i915 = I915_CONTEXT(ctx);
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int test = intel_translate_compare_func(func);
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UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
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I915_STATECHANGE(i915, I915_UPLOAD_CTX);
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i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_ALPHA_TEST_FUNC_MASK |
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i915->state.Ctx[I915_CTXREG_LIS6] |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
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(((GLuint) refByte) <<
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S6_ALPHA_REF_SHIFT));
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/* This function makes sure that the proper enables are
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* set for LogicOp, Independant Alpha Blend, and Blending.
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* It needs to be called from numerous places where we
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* could change the LogicOp or Independant Alpha Blend without subsequent
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i915EvalLogicOpBlendState(GLcontext * ctx)
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struct i915_context *i915 = I915_CONTEXT(ctx);
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I915_STATECHANGE(i915, I915_UPLOAD_CTX);
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if (RGBA_LOGICOP_ENABLED(ctx)) {
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i915->state.Ctx[I915_CTXREG_LIS5] |= S5_LOGICOP_ENABLE;
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i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
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i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_LOGICOP_ENABLE;
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if (ctx->Color.BlendEnabled) {
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i915->state.Ctx[I915_CTXREG_LIS6] |= S6_CBUF_BLEND_ENABLE;
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i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
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i915BlendColor(GLcontext * ctx, const GLfloat color[4])
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struct i915_context *i915 = I915_CONTEXT(ctx);
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DBG("%s\n", __FUNCTION__);
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UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
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UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
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UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
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UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
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I915_STATECHANGE(i915, I915_UPLOAD_CTX);
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i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] =
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(a << 24) | (r << 16) | (g << 8) | b;
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#define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
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#define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
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#define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
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#define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
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translate_blend_equation(GLenum mode)
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return BLENDFUNC_ADD;
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return BLENDFUNC_MIN;
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return BLENDFUNC_MAX;
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case GL_FUNC_SUBTRACT:
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return BLENDFUNC_SUBTRACT;
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case GL_FUNC_REVERSE_SUBTRACT:
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return BLENDFUNC_REVERSE_SUBTRACT;
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i915UpdateBlendState(GLcontext * ctx)
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struct i915_context *i915 = I915_CONTEXT(ctx);
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GLuint iab = (i915->state.Ctx[I915_CTXREG_IAB] &
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~(IAB_SRC_FACTOR_MASK |
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IAB_DST_FACTOR_MASK |
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(BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
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GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] &
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~(S6_CBUF_SRC_BLEND_FACT_MASK |
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S6_CBUF_DST_BLEND_FACT_MASK | S6_CBUF_BLEND_FUNC_MASK));
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GLuint eqRGB = ctx->Color.BlendEquationRGB;
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GLuint eqA = ctx->Color.BlendEquationA;
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GLuint srcRGB = ctx->Color.BlendSrcRGB;
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GLuint dstRGB = ctx->Color.BlendDstRGB;
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GLuint srcA = ctx->Color.BlendSrcA;
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GLuint dstA = ctx->Color.BlendDstA;
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if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
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srcRGB = dstRGB = GL_ONE;
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if (eqA == GL_MIN || eqA == GL_MAX) {
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srcA = dstA = GL_ONE;
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lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB));
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lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB));
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lis6 |= translate_blend_equation(eqRGB) << S6_CBUF_BLEND_FUNC_SHIFT;
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iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA));
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iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA));
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iab |= translate_blend_equation(eqA) << IAB_FUNC_SHIFT;
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if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
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if (iab != i915->state.Ctx[I915_CTXREG_IAB] ||
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lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
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I915_STATECHANGE(i915, I915_UPLOAD_CTX);
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i915->state.Ctx[I915_CTXREG_IAB] = iab;
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i915->state.Ctx[I915_CTXREG_LIS6] = lis6;
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/* This will catch a logicop blend equation */
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i915EvalLogicOpBlendState(ctx);
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i915BlendFuncSeparate(GLcontext * ctx, GLenum srcRGB,
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GLenum dstRGB, GLenum srcA, GLenum dstA)
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i915UpdateBlendState(ctx);
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i915BlendEquationSeparate(GLcontext * ctx, GLenum eqRGB, GLenum eqA)
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i915UpdateBlendState(ctx);
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i915DepthFunc(GLcontext * ctx, GLenum func)
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struct i915_context *i915 = I915_CONTEXT(ctx);
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int test = intel_translate_compare_func(func);
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DBG("%s\n", __FUNCTION__);
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I915_STATECHANGE(i915, I915_UPLOAD_CTX);
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i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_FUNC_MASK;
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i915->state.Ctx[I915_CTXREG_LIS6] |= test << S6_DEPTH_TEST_FUNC_SHIFT;
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i915DepthMask(GLcontext * ctx, GLboolean flag)
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struct i915_context *i915 = I915_CONTEXT(ctx);
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DBG("%s flag (%d)\n", __FUNCTION__, flag);
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I915_STATECHANGE(i915, I915_UPLOAD_CTX);
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if (flag && ctx->Depth.Test)
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i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_WRITE_ENABLE;
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i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_WRITE_ENABLE;
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/* =============================================================
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* The i915 supports a 4x4 stipple natively, GL wants 32x32.
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* Fortunately stipple is usually a repeating pattern.
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i915PolygonStipple(GLcontext * ctx, const GLubyte * mask)
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struct i915_context *i915 = I915_CONTEXT(ctx);
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const GLubyte *m = mask;
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int active = (ctx->Polygon.StippleFlag &&
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i915->intel.reduced_primitive == GL_TRIANGLES);
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I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
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i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
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p[0] = mask[12] & 0xf;
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p[1] = mask[8] & 0xf;
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p[2] = mask[4] & 0xf;
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p[3] = mask[0] & 0xf;
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for (k = 0; k < 8; k++)
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for (j = 3; j >= 0; j--)
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for (i = 0; i < 4; i++, m++)
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i915->intel.hw_stipple = 0;
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newMask = (((p[0] & 0xf) << 0) |
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((p[1] & 0xf) << 4) |
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((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
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if (newMask == 0xffff || newMask == 0x0) {
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/* this is needed to make conform pass */
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i915->intel.hw_stipple = 0;
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i915->state.Stipple[I915_STPREG_ST1] &= ~0xffff;
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i915->state.Stipple[I915_STPREG_ST1] |= newMask;
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i915->intel.hw_stipple = 1;
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i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
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/* =============================================================
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i915Scissor(GLcontext * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
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struct i915_context *i915 = I915_CONTEXT(ctx);
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if (!ctx->DrawBuffer)
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DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
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if (ctx->DrawBuffer->Name == 0) {
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y1 = ctx->DrawBuffer->Height - (y + h);
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DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
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/* FBO - not inverted
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DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
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x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
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y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
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x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
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y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
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DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
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I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
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i915->state.Buffer[I915_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
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i915->state.Buffer[I915_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
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i915LogicOp(GLcontext * ctx, GLenum opcode)
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struct i915_context *i915 = I915_CONTEXT(ctx);
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int tmp = intel_translate_logic_op(opcode);
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DBG("%s\n", __FUNCTION__);
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I915_STATECHANGE(i915, I915_UPLOAD_CTX);
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i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
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i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
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i915CullFaceFrontFace(GLcontext * ctx, GLenum unused)
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struct i915_context *i915 = I915_CONTEXT(ctx);
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DBG("%s %d\n", __FUNCTION__,
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ctx->DrawBuffer ? ctx->DrawBuffer->Name : 0);
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if (!ctx->Polygon.CullFlag) {
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mode = S4_CULLMODE_NONE;
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else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
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mode = S4_CULLMODE_CW;
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if (ctx->DrawBuffer && ctx->DrawBuffer->Name != 0)
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mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
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if (ctx->Polygon.CullFaceMode == GL_FRONT)
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mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
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if (ctx->Polygon.FrontFace != GL_CCW)
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mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
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mode = S4_CULLMODE_BOTH;
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I915_STATECHANGE(i915, I915_UPLOAD_CTX);
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i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_CULLMODE_MASK;
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i915->state.Ctx[I915_CTXREG_LIS4] |= mode;
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i915LineWidth(GLcontext * ctx, GLfloat widthf)
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struct i915_context *i915 = I915_CONTEXT(ctx);
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int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_LINE_WIDTH_MASK;
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DBG("%s\n", __FUNCTION__);
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width = (int) (widthf * 2);
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CLAMP_SELF(width, 1, 0xf);
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lis4 |= width << S4_LINE_WIDTH_SHIFT;
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if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
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I915_STATECHANGE(i915, I915_UPLOAD_CTX);
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i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
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i915PointSize(GLcontext * ctx, GLfloat size)
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struct i915_context *i915 = I915_CONTEXT(ctx);
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int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_POINT_WIDTH_MASK;
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GLint point_size = (int) size;
476
DBG("%s\n", __FUNCTION__);
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CLAMP_SELF(point_size, 1, 255);
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lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
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if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
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I915_STATECHANGE(i915, I915_UPLOAD_CTX);
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i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
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/* =============================================================
493
i915ColorMask(GLcontext * ctx,
494
GLboolean r, GLboolean g, GLboolean b, GLboolean a)
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struct i915_context *i915 = I915_CONTEXT(ctx);
497
GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK;
499
DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b,
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tmp |= S5_WRITEDISABLE_RED;
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tmp |= S5_WRITEDISABLE_GREEN;
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tmp |= S5_WRITEDISABLE_BLUE;
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tmp |= S5_WRITEDISABLE_ALPHA;
511
if (tmp != i915->state.Ctx[I915_CTXREG_LIS5]) {
512
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
513
i915->state.Ctx[I915_CTXREG_LIS5] = tmp;
518
update_specular(GLcontext * ctx)
520
/* A hack to trigger the rebuild of the fragment program.
522
intel_context(ctx)->NewGLState |= _NEW_TEXTURE;
523
I915_CONTEXT(ctx)->tex_program.translated = 0;
527
i915LightModelfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
529
DBG("%s\n", __FUNCTION__);
531
if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
532
update_specular(ctx);
537
i915ShadeModel(GLcontext * ctx, GLenum mode)
539
struct i915_context *i915 = I915_CONTEXT(ctx);
540
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
542
if (mode == GL_SMOOTH) {
543
i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA |
545
S4_FLATSHADE_SPECULAR);
548
i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA |
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S4_FLATSHADE_SPECULAR);
554
/* =============================================================
558
i915_update_fog(GLcontext * ctx)
560
struct i915_context *i915 = I915_CONTEXT(ctx);
563
GLboolean try_pixel_fog;
565
if (ctx->FragmentProgram._Active) {
566
/* Pull in static fog state from program */
568
mode = ctx->FragmentProgram._Current->FogOption;
569
enabled = (mode != GL_NONE);
573
enabled = ctx->Fog.Enabled;
574
mode = ctx->Fog.Mode;
576
try_pixel_fog = (ctx->Fog.FogCoordinateSource == GL_FRAGMENT_DEPTH_EXT && ctx->Hint.Fog == GL_NICEST && 0); /* XXX - DISABLE -- Need ortho fallback */
580
i915->vertex_fog = I915_FOG_NONE;
582
else if (try_pixel_fog) {
584
I915_STATECHANGE(i915, I915_UPLOAD_FOG);
585
i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
586
i915->vertex_fog = I915_FOG_PIXEL;
590
if (ctx->Fog.End <= ctx->Fog.Start) {
591
/* XXX - this won't work with fragment programs. Need to
592
* either fallback or append fog instructions to end of
593
* program in the case of linear fog.
595
i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
596
i915->vertex_fog = I915_FOG_VERTEX;
599
GLfloat c1 = ctx->Fog.End / (ctx->Fog.End - ctx->Fog.Start);
600
GLfloat c2 = 1.0 / (ctx->Fog.End - ctx->Fog.Start);
602
i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_C1_MASK;
603
i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_LINEAR;
604
i915->state.Fog[I915_FOGREG_MODE1] |=
605
((GLuint) (c1 * FMC1_C1_ONE)) & FMC1_C1_MASK;
607
if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
608
i915->state.Fog[I915_FOGREG_MODE2] =
609
(GLuint) (c2 * FMC2_C2_ONE);
618
i915->state.Fog[I915_FOGREG_MODE2] = fi.i;
623
i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP;
626
i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP2;
632
else { /* if (i915->vertex_fog != I915_FOG_VERTEX) */
634
I915_STATECHANGE(i915, I915_UPLOAD_FOG);
635
i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
636
i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
637
i915->vertex_fog = I915_FOG_VERTEX;
641
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
642
I915_ACTIVESTATE(i915, I915_UPLOAD_FOG, enabled);
644
i915->state.Ctx[I915_CTXREG_LIS5] |= S5_FOG_ENABLE;
646
i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_FOG_ENABLE;
650
_tnl_allow_vertex_fog(ctx, (i915->vertex_fog == I915_FOG_VERTEX));
651
_tnl_allow_pixel_fog(ctx, (i915->vertex_fog != I915_FOG_VERTEX));
656
i915Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
658
struct i915_context *i915 = I915_CONTEXT(ctx);
661
case GL_FOG_COORDINATE_SOURCE_EXT:
668
I915_STATECHANGE(i915, I915_UPLOAD_FOG);
670
if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
671
i915->state.Fog[I915_FOGREG_MODE3] = (GLuint) (ctx->Fog.Density *
680
fi.f = ctx->Fog.Density;
681
i915->state.Fog[I915_FOGREG_MODE3] = fi.i;
686
I915_STATECHANGE(i915, I915_UPLOAD_FOG);
687
i915->state.Fog[I915_FOGREG_COLOR] =
688
(_3DSTATE_FOG_COLOR_CMD |
689
((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
690
((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
691
((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
700
i915Hint(GLcontext * ctx, GLenum target, GLenum state)
710
/* =============================================================
714
i915Enable(GLcontext * ctx, GLenum cap, GLboolean state)
716
struct i915_context *i915 = I915_CONTEXT(ctx);
724
update_specular(ctx);
728
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
730
i915->state.Ctx[I915_CTXREG_LIS6] |= S6_ALPHA_TEST_ENABLE;
732
i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_ALPHA_TEST_ENABLE;
736
i915EvalLogicOpBlendState(ctx);
739
case GL_COLOR_LOGIC_OP:
740
i915EvalLogicOpBlendState(ctx);
742
/* Logicop doesn't seem to work at 16bpp:
744
if (i915->intel.intelScreen->cpp == 2) /* XXX FBO fix */
745
FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
748
case GL_FRAGMENT_PROGRAM_ARB:
752
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
754
i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
756
i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_COLOR_DITHER_ENABLE;
760
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
762
i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_TEST_ENABLE;
764
i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_ENABLE;
766
i915DepthMask(ctx, ctx->Depth.Mask);
769
case GL_SCISSOR_TEST:
770
I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
772
i915->state.Buffer[I915_DESTREG_SENABLE] =
773
(_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
775
i915->state.Buffer[I915_DESTREG_SENABLE] =
776
(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
780
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
782
i915->state.Ctx[I915_CTXREG_LIS4] |= S4_LINE_ANTIALIAS_ENABLE;
784
i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_LINE_ANTIALIAS_ENABLE;
791
i915CullFaceFrontFace(ctx, 0);
794
case GL_STENCIL_TEST:
796
GLboolean hw_stencil = GL_FALSE;
797
if (ctx->DrawBuffer) {
798
struct intel_renderbuffer *irbStencil
799
= intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
800
hw_stencil = (irbStencil && irbStencil->region);
803
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
805
i915->state.Ctx[I915_CTXREG_LIS5] |= (S5_STENCIL_TEST_ENABLE |
806
S5_STENCIL_WRITE_ENABLE);
808
i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_TEST_ENABLE |
809
S5_STENCIL_WRITE_ENABLE);
812
FALLBACK(&i915->intel, I915_FALLBACK_STENCIL, state);
817
case GL_POLYGON_STIPPLE:
818
/* The stipple command worked on my 855GM box, but not my 845G.
819
* I'll do more testing later to find out exactly which hardware
820
* supports it. Disabled for now.
822
if (i915->intel.hw_stipple &&
823
i915->intel.reduced_primitive == GL_TRIANGLES) {
824
I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
826
i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
828
i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
832
case GL_POLYGON_SMOOTH:
835
case GL_POINT_SMOOTH:
845
i915_init_packets(struct i915_context *i915)
847
intelScreenPrivate *screen = i915->intel.intelScreen;
850
memset(&i915->state, 0, sizeof(i915->state));
854
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
855
/* Probably don't want to upload all this stuff every time one
858
i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
861
I1_LOAD_S(5) | I1_LOAD_S(6) | (4));
862
i915->state.Ctx[I915_CTXREG_LIS2] = 0;
863
i915->state.Ctx[I915_CTXREG_LIS4] = 0;
864
i915->state.Ctx[I915_CTXREG_LIS5] = 0;
866
if (screen->cpp == 2) /* XXX FBO fix */
867
i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
870
i915->state.Ctx[I915_CTXREG_LIS6] = (S6_COLOR_WRITE_ENABLE |
871
(2 << S6_TRISTRIP_PV_SHIFT));
873
i915->state.Ctx[I915_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
874
ENABLE_LOGIC_OP_FUNC |
875
LOGIC_OP_FUNC(LOGICOP_COPY) |
876
ENABLE_STENCIL_TEST_MASK |
877
STENCIL_TEST_MASK(0xff) |
878
ENABLE_STENCIL_WRITE_MASK |
879
STENCIL_WRITE_MASK(0xff));
881
i915->state.Ctx[I915_CTXREG_IAB] =
882
(_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE |
883
IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR);
885
i915->state.Ctx[I915_CTXREG_BLENDCOLOR0] =
886
_3DSTATE_CONST_BLEND_COLOR_CMD;
887
i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] = 0;
892
I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
893
i915->state.Stipple[I915_STPREG_ST0] = _3DSTATE_STIPPLE;
898
I915_STATECHANGE(i915, I915_UPLOAD_FOG);
899
i915->state.Fog[I915_FOGREG_MODE0] = _3DSTATE_FOG_MODE_CMD;
900
i915->state.Fog[I915_FOGREG_MODE1] = (FMC1_FOGFUNC_MODIFY_ENABLE |
901
FMC1_FOGFUNC_VERTEX |
902
FMC1_FOGINDEX_MODIFY_ENABLE |
904
FMC1_C1_C2_MODIFY_ENABLE |
905
FMC1_DENSITY_MODIFY_ENABLE);
906
i915->state.Fog[I915_FOGREG_COLOR] = _3DSTATE_FOG_COLOR_CMD;
911
I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
912
/* color buffer offset/stride */
913
i915->state.Buffer[I915_DESTREG_CBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
914
/* XXX FBO: remove this? Also get set in i915_set_draw_region() */
915
i915->state.Buffer[I915_DESTREG_CBUFADDR1] = (BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(screen->front.pitch) | /* pitch in bytes */
918
i915->state.Buffer[I915_DESTREG_DBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
919
/* XXX FBO: remove this? Also get set in i915_set_draw_region() */
920
i915->state.Buffer[I915_DESTREG_DBUFADDR1] = (BUF_3D_ID_DEPTH | BUF_3D_PITCH(screen->depth.pitch) | /* pitch in bytes */
923
i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
925
/* XXX FBO: remove this? Also get set in i915_set_draw_region() */
926
#if 0 /* seems we don't need this */
927
switch (screen->fbFormat) {
929
i915->state.Buffer[I915_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */
930
DSTORG_VERT_BIAS(0x8) | /* .5 */
932
TEX_DEFAULT_COLOR_OGL |
935
DEPTH_FRMT_16_FIXED);
938
i915->state.Buffer[I915_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */
939
DSTORG_VERT_BIAS(0x8) | /* .5 */
941
TEX_DEFAULT_COLOR_OGL |
943
DEPTH_FRMT_24_FIXED_8_OTHER);
950
i915->state.Buffer[I915_DESTREG_SENABLE] =
951
(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
952
i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
953
i915->state.Buffer[I915_DESTREG_SR1] = 0;
954
i915->state.Buffer[I915_DESTREG_SR2] = 0;
960
I915_STATECHANGE(i915, I915_UPLOAD_DEFAULTS);
961
i915->state.Default[I915_DEFREG_C0] = _3DSTATE_DEFAULT_DIFFUSE;
962
i915->state.Default[I915_DEFREG_C1] = 0;
963
i915->state.Default[I915_DEFREG_S0] = _3DSTATE_DEFAULT_SPECULAR;
964
i915->state.Default[I915_DEFREG_S1] = 0;
965
i915->state.Default[I915_DEFREG_Z0] = _3DSTATE_DEFAULT_Z;
966
i915->state.Default[I915_DEFREG_Z1] = 0;
971
/* These will be emitted every at the head of every buffer, unless
972
* we get hardware contexts working.
974
i915->state.active = (I915_UPLOAD_PROGRAM |
975
I915_UPLOAD_STIPPLE |
977
I915_UPLOAD_BUFFERS | I915_UPLOAD_INVARIENT);
981
i915InitStateFunctions(struct dd_function_table *functions)
983
functions->AlphaFunc = i915AlphaFunc;
984
functions->BlendColor = i915BlendColor;
985
functions->BlendEquationSeparate = i915BlendEquationSeparate;
986
functions->BlendFuncSeparate = i915BlendFuncSeparate;
987
functions->ColorMask = i915ColorMask;
988
functions->CullFace = i915CullFaceFrontFace;
989
functions->DepthFunc = i915DepthFunc;
990
functions->DepthMask = i915DepthMask;
991
functions->Enable = i915Enable;
992
functions->Fogfv = i915Fogfv;
993
functions->FrontFace = i915CullFaceFrontFace;
994
functions->Hint = i915Hint;
995
functions->LightModelfv = i915LightModelfv;
996
functions->LineWidth = i915LineWidth;
997
functions->LogicOpcode = i915LogicOp;
998
functions->PointSize = i915PointSize;
999
functions->PolygonStipple = i915PolygonStipple;
1000
functions->Scissor = i915Scissor;
1001
functions->ShadeModel = i915ShadeModel;
1002
functions->StencilFuncSeparate = i915StencilFuncSeparate;
1003
functions->StencilMaskSeparate = i915StencilMaskSeparate;
1004
functions->StencilOpSeparate = i915StencilOpSeparate;
1009
i915InitState(struct i915_context *i915)
1011
GLcontext *ctx = &i915->intel.ctx;
1013
i915_init_packets(i915);
1015
intelInitState(ctx);
1017
memcpy(&i915->initial, &i915->state, sizeof(i915->state));
1018
i915->current = &i915->state;