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FILE_LICENCE ( GPL2_OR_LATER );
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#include <gpxe/bitbash.h>
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* An I2C device represents a specific slave device on an I2C bus. It
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* is accessed via an I2C interface.
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/** Address of this device
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* The actual address sent on the bus will look like
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* <start> <device address> <word address overflow> <r/w>
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* The "word address overflow" is any excess bits from the
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* word address, i.e. any portion that does not fit within the
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* defined word address length.
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unsigned int dev_addr;
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/** Device address length, in bytes
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* This is the number of bytes that comprise the device
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* address, defined to be the portion that terminates with the
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unsigned int dev_addr_len;
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/** Word adddress length, in bytes
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* This is the number of bytes that comprise the word address,
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* defined to be the portion that starts after the read/write
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* bit and ends before the first data byte.
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* For some devices, this length will be zero (i.e. the word
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* address is contained entirely within the "word address
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unsigned int word_addr_len;
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* An I2C interface provides access to an I2C bus, via which I2C
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* devices may be reached.
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struct i2c_interface {
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* Read data from I2C device
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* @v i2c I2C interface
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* @v i2cdev I2C device
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* @v offset Starting offset within the device
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* @v len Length of data buffer
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* @ret rc Return status code
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int ( * read ) ( struct i2c_interface *i2c, struct i2c_device *i2cdev,
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unsigned int offset, uint8_t *data,
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* Write data to I2C device
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* @v i2c I2C interface
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* @v i2cdev I2C device
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* @v offset Starting offset within the device
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* @v len Length of data buffer
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* @ret rc Return status code
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int ( * write ) ( struct i2c_interface *i2c, struct i2c_device *i2cdev,
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unsigned int offset, const uint8_t *data,
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/** A bit-bashing I2C interface
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* This provides a standardised way to construct I2C buses via a
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* bit-bashing interface.
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struct i2c_bit_basher {
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struct i2c_interface i2c;
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/** Bit-bashing interface */
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struct bit_basher basher;
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/** Ten-bit address marker
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* This value is ORed with the I2C device address to indicate a
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* ten-bit address format on the bus.
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#define I2C_TENBIT_ADDRESS 0x7800
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/** An I2C write command */
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/** An I2C read command */
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/** Bit indices used for I2C bit-bashing interface */
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/** Delay required for bit-bashing operation */
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/** Maximum number of cycles to use when attempting a bus reset */
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#define I2C_RESET_MAX_CYCLES 32
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* Check presence of I2C device
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* @v i2c I2C interface
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* @v i2cdev I2C device
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* @ret rc Return status code
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* Checks for the presence of the device on the I2C bus by attempting
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* a zero-length write.
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static inline int i2c_check_presence ( struct i2c_interface *i2c,
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struct i2c_device *i2cdev ) {
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return i2c->write ( i2c, i2cdev, 0, NULL, 0 );
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extern int init_i2c_bit_basher ( struct i2c_bit_basher *i2cbit,
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struct bit_basher_operations *bash_op );
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* Initialise generic I2C EEPROM device
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* @v i2cdev I2C device
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static inline __always_inline void
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init_i2c_eeprom ( struct i2c_device *i2cdev, unsigned int dev_addr ) {
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i2cdev->dev_addr = dev_addr;
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i2cdev->dev_addr_len = 1;
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i2cdev->word_addr_len = 1;
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* Initialise Atmel AT24C11
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* @v i2cdev I2C device
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static inline __always_inline void
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init_at24c11 ( struct i2c_device *i2cdev ) {
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/* This chip has no device address; it must be the only chip
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* on the bus. The word address is contained entirely within
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* the device address field.
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i2cdev->dev_addr = 0;
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i2cdev->dev_addr_len = 1;
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i2cdev->word_addr_len = 0;
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#endif /* _GPXE_I2C_H */