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Viewing changes to src/VBox/Devices/EFI/Firmware/MdePkg/Include/Protocol/SmmCpu.h

  • Committer: Package Import Robot
  • Author(s): Gianfranco Costamagna
  • Date: 2016-02-23 14:28:26 UTC
  • Revision ID: package-import@ubuntu.com-20160223142826-bdu69el2z6wa2a44
Tags: upstream-4.3.36-dfsg
Import upstream version 4.3.36-dfsg

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src/VBox/Devices/EFI/Firmware/MdePkg/Include/Protocol/SmmCpu.h
 
1
/** @file
 
2
  EFI SMM CPU Protocol as defined in the PI 1.2 specification.
 
3
 
 
4
  This protocol allows SMM drivers to access architecture-standard registers from any of the CPU 
 
5
  save state areas. In some cases, difference processors provide the same information in the save state, 
 
6
  but not in the same format. These so-called pseudo-registers provide this information in a standard 
 
7
  format.  
 
8
 
 
9
  Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.<BR>
 
10
  This program and the accompanying materials                          
 
11
  are licensed and made available under the terms and conditions of the BSD License         
 
12
  which accompanies this distribution.  The full text of the license may be found at        
 
13
  http://opensource.org/licenses/bsd-license.php                                            
 
14
 
 
15
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
 
16
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
 
17
 
 
18
**/
 
19
 
 
20
#ifndef _SMM_CPU_H_
 
21
#define _SMM_CPU_H_
 
22
 
 
23
#define EFI_SMM_CPU_PROTOCOL_GUID \
 
24
  { \
 
25
    0xeb346b97, 0x975f, 0x4a9f, { 0x8b, 0x22, 0xf8, 0xe9, 0x2b, 0xb3, 0xd5, 0x69 } \
 
26
  }
 
27
 
 
28
///
 
29
/// Save State register index
 
30
///
 
31
typedef enum {
 
32
  ///
 
33
  /// x86/X64 standard registers
 
34
  ///
 
35
  EFI_SMM_SAVE_STATE_REGISTER_GDTBASE       = 4,
 
36
  EFI_SMM_SAVE_STATE_REGISTER_IDTBASE       = 5,
 
37
  EFI_SMM_SAVE_STATE_REGISTER_LDTBASE       = 6,
 
38
  EFI_SMM_SAVE_STATE_REGISTER_GDTLIMIT      = 7,
 
39
  EFI_SMM_SAVE_STATE_REGISTER_IDTLIMIT      = 8,
 
40
  EFI_SMM_SAVE_STATE_REGISTER_LDTLIMIT      = 9,
 
41
  EFI_SMM_SAVE_STATE_REGISTER_LDTINFO       = 10,
 
42
  EFI_SMM_SAVE_STATE_REGISTER_ES            = 20,
 
43
  EFI_SMM_SAVE_STATE_REGISTER_CS            = 21,
 
44
  EFI_SMM_SAVE_STATE_REGISTER_SS            = 22,
 
45
  EFI_SMM_SAVE_STATE_REGISTER_DS            = 23,
 
46
  EFI_SMM_SAVE_STATE_REGISTER_FS            = 24,
 
47
  EFI_SMM_SAVE_STATE_REGISTER_GS            = 25,
 
48
  EFI_SMM_SAVE_STATE_REGISTER_LDTR_SEL      = 26,
 
49
  EFI_SMM_SAVE_STATE_REGISTER_TR_SEL        = 27,
 
50
  EFI_SMM_SAVE_STATE_REGISTER_DR7           = 28,
 
51
  EFI_SMM_SAVE_STATE_REGISTER_DR6           = 29,
 
52
  EFI_SMM_SAVE_STATE_REGISTER_R8            = 30,
 
53
  EFI_SMM_SAVE_STATE_REGISTER_R9            = 31,
 
54
  EFI_SMM_SAVE_STATE_REGISTER_R10           = 32,
 
55
  EFI_SMM_SAVE_STATE_REGISTER_R11           = 33,
 
56
  EFI_SMM_SAVE_STATE_REGISTER_R12           = 34,
 
57
  EFI_SMM_SAVE_STATE_REGISTER_R13           = 35,
 
58
  EFI_SMM_SAVE_STATE_REGISTER_R14           = 36,
 
59
  EFI_SMM_SAVE_STATE_REGISTER_R15           = 37,  
 
60
  EFI_SMM_SAVE_STATE_REGISTER_RAX           = 38,
 
61
  EFI_SMM_SAVE_STATE_REGISTER_RBX           = 39,
 
62
  EFI_SMM_SAVE_STATE_REGISTER_RCX           = 40,
 
63
  EFI_SMM_SAVE_STATE_REGISTER_RDX           = 41,
 
64
  EFI_SMM_SAVE_STATE_REGISTER_RSP           = 42,
 
65
  EFI_SMM_SAVE_STATE_REGISTER_RBP           = 43,
 
66
  EFI_SMM_SAVE_STATE_REGISTER_RSI           = 44,
 
67
  EFI_SMM_SAVE_STATE_REGISTER_RDI           = 45,
 
68
  EFI_SMM_SAVE_STATE_REGISTER_RIP           = 46,
 
69
  EFI_SMM_SAVE_STATE_REGISTER_RFLAGS        = 51,
 
70
  EFI_SMM_SAVE_STATE_REGISTER_CR0           = 52,
 
71
  EFI_SMM_SAVE_STATE_REGISTER_CR3           = 53,
 
72
  EFI_SMM_SAVE_STATE_REGISTER_CR4           = 54,
 
73
  EFI_SMM_SAVE_STATE_REGISTER_FCW           = 256,
 
74
  EFI_SMM_SAVE_STATE_REGISTER_FSW           = 257,
 
75
  EFI_SMM_SAVE_STATE_REGISTER_FTW           = 258,  
 
76
  EFI_SMM_SAVE_STATE_REGISTER_OPCODE        = 259,
 
77
  EFI_SMM_SAVE_STATE_REGISTER_FP_EIP        = 260,
 
78
  EFI_SMM_SAVE_STATE_REGISTER_FP_CS         = 261,
 
79
  EFI_SMM_SAVE_STATE_REGISTER_DATAOFFSET    = 262,
 
80
  EFI_SMM_SAVE_STATE_REGISTER_FP_DS         = 263,
 
81
  EFI_SMM_SAVE_STATE_REGISTER_MM0           = 264,
 
82
  EFI_SMM_SAVE_STATE_REGISTER_MM1           = 265,
 
83
  EFI_SMM_SAVE_STATE_REGISTER_MM2           = 266,
 
84
  EFI_SMM_SAVE_STATE_REGISTER_MM3           = 267,
 
85
  EFI_SMM_SAVE_STATE_REGISTER_MM4           = 268,
 
86
  EFI_SMM_SAVE_STATE_REGISTER_MM5           = 269,
 
87
  EFI_SMM_SAVE_STATE_REGISTER_MM6           = 270,
 
88
  EFI_SMM_SAVE_STATE_REGISTER_MM7           = 271,
 
89
  EFI_SMM_SAVE_STATE_REGISTER_XMM0          = 272,
 
90
  EFI_SMM_SAVE_STATE_REGISTER_XMM1          = 273,
 
91
  EFI_SMM_SAVE_STATE_REGISTER_XMM2          = 274,
 
92
  EFI_SMM_SAVE_STATE_REGISTER_XMM3          = 275,
 
93
  EFI_SMM_SAVE_STATE_REGISTER_XMM4          = 276,
 
94
  EFI_SMM_SAVE_STATE_REGISTER_XMM5          = 277,
 
95
  EFI_SMM_SAVE_STATE_REGISTER_XMM6          = 278,
 
96
  EFI_SMM_SAVE_STATE_REGISTER_XMM7          = 279,
 
97
  EFI_SMM_SAVE_STATE_REGISTER_XMM8          = 280,
 
98
  EFI_SMM_SAVE_STATE_REGISTER_XMM9          = 281,
 
99
  EFI_SMM_SAVE_STATE_REGISTER_XMM10         = 282,
 
100
  EFI_SMM_SAVE_STATE_REGISTER_XMM11         = 283,
 
101
  EFI_SMM_SAVE_STATE_REGISTER_XMM12         = 284,
 
102
  EFI_SMM_SAVE_STATE_REGISTER_XMM13         = 285,
 
103
  EFI_SMM_SAVE_STATE_REGISTER_XMM14         = 286,
 
104
  EFI_SMM_SAVE_STATE_REGISTER_XMM15         = 287,  
 
105
  ///
 
106
  /// Pseudo-Registers
 
107
  ///
 
108
  EFI_SMM_SAVE_STATE_REGISTER_IO            = 512,
 
109
  EFI_SMM_SAVE_STATE_REGISTER_LMA           = 513
 
110
} EFI_SMM_SAVE_STATE_REGISTER;  
 
111
 
 
112
///
 
113
/// The EFI_SMM_SAVE_STATE_REGISTER_LMA pseudo-register values
 
114
/// If the processor acts in 32-bit mode at the time the SMI occurred, the pseudo register value 
 
115
/// EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT is returned in Buffer. Otherwise, 
 
116
/// EFI_SMM_SAVE_STATE_REGISTER_LMA_64BIT is returned in Buffer.
 
117
///
 
118
#define EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT  32
 
119
#define EFI_SMM_SAVE_STATE_REGISTER_LMA_64BIT  64
 
120
 
 
121
///
 
122
/// Size width of I/O instruction
 
123
///
 
124
typedef enum {
 
125
  EFI_SMM_SAVE_STATE_IO_WIDTH_UINT8      = 0,
 
126
  EFI_SMM_SAVE_STATE_IO_WIDTH_UINT16     = 1,
 
127
  EFI_SMM_SAVE_STATE_IO_WIDTH_UINT32     = 2,
 
128
  EFI_SMM_SAVE_STATE_IO_WIDTH_UINT64     = 3
 
129
} EFI_SMM_SAVE_STATE_IO_WIDTH;
 
130
 
 
131
///
 
132
/// Types of I/O instruction
 
133
///
 
134
typedef enum {
 
135
  EFI_SMM_SAVE_STATE_IO_TYPE_INPUT       = 1,
 
136
  EFI_SMM_SAVE_STATE_IO_TYPE_OUTPUT      = 2,
 
137
  EFI_SMM_SAVE_STATE_IO_TYPE_STRING      = 4,
 
138
  EFI_SMM_SAVE_STATE_IO_TYPE_REP_PREFIX  = 8
 
139
} EFI_SMM_SAVE_STATE_IO_TYPE;
 
140
 
 
141
///
 
142
/// Structure of the data which is returned when ReadSaveState() is called with 
 
143
/// EFI_SMM_SAVE_STATE_REGISTER_IO. If there was no I/O then ReadSaveState() will 
 
144
/// return EFI_NOT_FOUND.
 
145
///
 
146
/// This structure describes the I/O operation which was in process when the SMI was generated.
 
147
///
 
148
typedef struct _EFI_SMM_SAVE_STATE_IO_INFO {
 
149
  ///
 
150
  /// For input instruction (IN, INS), this is data read before the SMI occurred. For output 
 
151
  /// instructions (OUT, OUTS) this is data that was written before the SMI occurred. The 
 
152
  /// width of the data is specified by IoWidth.
 
153
  ///
 
154
  UINT64                        IoData;
 
155
  ///
 
156
  /// The I/O port that was being accessed when the SMI was triggered.
 
157
  ///
 
158
  UINT16                        IoPort;
 
159
  ///
 
160
  /// Defines the size width (UINT8, UINT16, UINT32, UINT64) for IoData.
 
161
  ///
 
162
  EFI_SMM_SAVE_STATE_IO_WIDTH   IoWidth;
 
163
  ///
 
164
  /// Defines type of I/O instruction.
 
165
  ///
 
166
  EFI_SMM_SAVE_STATE_IO_TYPE    IoType;
 
167
} EFI_SMM_SAVE_STATE_IO_INFO;
 
168
  
 
169
typedef struct _EFI_SMM_CPU_PROTOCOL  EFI_SMM_CPU_PROTOCOL;
 
170
 
 
171
/**
 
172
  Read data from the CPU save state.
 
173
 
 
174
  This function is used to read the specified number of bytes of the specified register from the CPU 
 
175
  save state of the specified CPU and place the value into the buffer. If the CPU does not support the
 
176
  specified register Register, then EFI_NOT_FOUND  should be returned. If the CPU does not 
 
177
  support the specified register width Width, then EFI_INVALID_PARAMETER is returned.
 
178
 
 
179
  @param[in]  This               The EFI_SMM_CPU_PROTOCOL instance.
 
180
  @param[in]  Width              The number of bytes to read from the CPU save state.
 
181
  @param[in]  Register           Specifies the CPU register to read form the save state.
 
182
  @param[in]  CpuIndex           Specifies the zero-based index of the CPU save state.
 
183
  @param[out] Buffer             Upon return, this holds the CPU register value read from the save state.
 
184
    
 
185
  @retval EFI_SUCCESS            The register was read from Save State.
 
186
  @retval EFI_NOT_FOUND          The register is not defined for the Save State of Processor.
 
187
  @retval EFI_INVALID_PARAMETER  Input parameters are not valid, for example, Processor No or register width 
 
188
                                 is not correct.This or Buffer is NULL.
 
189
**/
 
190
typedef
 
191
EFI_STATUS
 
192
(EFIAPI *EFI_SMM_READ_SAVE_STATE)(
 
193
  IN CONST EFI_SMM_CPU_PROTOCOL   *This,
 
194
  IN UINTN                        Width,
 
195
  IN EFI_SMM_SAVE_STATE_REGISTER  Register,
 
196
  IN UINTN                        CpuIndex,
 
197
  OUT VOID                        *Buffer
 
198
  );
 
199
 
 
200
 
 
201
/**
 
202
  Write data to the CPU save state.
 
203
 
 
204
  This function is used to write the specified number of bytes of the specified register to the CPU save 
 
205
  state of the specified CPU and place the value into the buffer. If the CPU does not support the 
 
206
  specified register Register, then EFI_UNSUPPORTED should be returned. If the CPU does not 
 
207
  support the specified register width Width, then EFI_INVALID_PARAMETER is returned.
 
208
 
 
209
  @param[in]  This               The EFI_SMM_CPU_PROTOCOL instance.
 
210
  @param[in]  Width              The number of bytes to write to the CPU save state.
 
211
  @param[in]  Register           Specifies the CPU register to write to the save state.
 
212
  @param[in]  CpuIndex           Specifies the zero-based index of the CPU save state.
 
213
  @param[in]  Buffer             Upon entry, this holds the new CPU register value.
 
214
  
 
215
  @retval EFI_SUCCESS            The register was written to Save State.
 
216
  @retval EFI_NOT_FOUND          The register is not defined for the Save State of Processor.
 
217
  @retval EFI_INVALID_PARAMETER  Input parameters are not valid. For example: 
 
218
                                 ProcessorIndex or Width is not correct.
 
219
**/
 
220
typedef
 
221
EFI_STATUS
 
222
(EFIAPI *EFI_SMM_WRITE_SAVE_STATE)(
 
223
  IN CONST EFI_SMM_CPU_PROTOCOL   *This,
 
224
  IN UINTN                        Width, 
 
225
  IN EFI_SMM_SAVE_STATE_REGISTER  Register,
 
226
  IN UINTN                        CpuIndex,
 
227
  IN CONST VOID                   *Buffer
 
228
  );
 
229
 
 
230
///
 
231
/// EFI SMM CPU Protocol provides access to CPU-related information while in SMM.
 
232
///
 
233
/// This protocol allows SMM drivers to access architecture-standard registers from any of the CPU 
 
234
/// save state areas. In some cases, difference processors provide the same information in the save state, 
 
235
/// but not in the same format. These so-called pseudo-registers provide this information in a standard 
 
236
/// format.  
 
237
///
 
238
struct _EFI_SMM_CPU_PROTOCOL {
 
239
  EFI_SMM_READ_SAVE_STATE   ReadSaveState;
 
240
  EFI_SMM_WRITE_SAVE_STATE  WriteSaveState;
 
241
};
 
242
 
 
243
extern EFI_GUID gEfiSmmCpuProtocolGuid;
 
244
 
 
245
#endif
 
246